On Wed, Feb 17, 2016 at 5:36 PM, Andy Lutomirski wrote:
> On Wed, Feb 17, 2016 at 8:18 AM, Daniel Vetter wrote:
>> On Tue, Feb 16, 2016 at 09:26:35AM -0800, Andy Lutomirski wrote:
>>> On Tue, Feb 16, 2016 at 9:12 AM, Andy Lutomirski
>>> wrote:
>>> > On Tue, Feb 16, 2016 at 8:12 AM, Daniel Vette
Hi Joonas:
Thanks for the comments! Let me cook a patch to improve it
immediately. :)
Thanks,
Zhi.
On 02/22/16 21:23, Joonas Lahtinen wrote:
Hi,
On to, 2016-02-18 at 19:42 +0800, Zhi Wang wrote:
As the PVINFO page definition is used by both GVT-g guest (vGPU) and GVT-g
host (GVT-g kerne
Hi all,
I'm an end user and I'm having problems which I believe are ultimately
caused by an issue with the Intel kernel driver.
When I am running programs that use a lot of images (e.g. GIMP, Firefox
with YouTube and Google Maps) then after a short while my whole machine
will grind to a halt, to
On Mon, Feb 22, 2016 at 02:18:10PM +, Lionel Landwerlin wrote:
> Patch based on a previous series by Shashank Sharma.
>
> v2: Do not read GAMMA_MODE register to figure what mode we're in
>
> v3: Program PREC_PAL_GC_MAX to clamp pixel values > 1.0
>
> Add documentation on how the Broadcas
On Mon, Feb 22, 2016 at 02:18:08PM +, Lionel Landwerlin wrote:
> Implement Daniel Stone's recommendation to not read registers to infer
> the hardware's state.
>
> Signed-off-by: Lionel Landwerlin
Do we need to ensure that software and hardware state are synchronized
at startup? A boot firm
On Mon, Feb 22, 2016 at 02:18:07PM +, Lionel Landwerlin wrote:
> The moves a couple of functions programming the gamma LUT and CSC
> units into their own file.
>
> On generations prior to Haswell there is only a gamma LUT. From
> haswell on there is also a new enhanced color correction unit th
On 02/20/2016 01:22 AM, Chris Wilson wrote:
> On Fri, Feb 19, 2016 at 11:28:05AM -0800, Jesse Barnes wrote:
>> On 02/18/2016 06:26 AM, john.c.harri...@intel.com wrote:
>>> From: John Harrison
>>>
>>> MMIO flips are the preferred mechanism now
>
> Because introducing variable latency in waking up
Hi Dave -
Here's the display power stuff that Daniel and I were a bit hesitant to
queue to v4.5 at this late stage, but since you said, "looks fairly self
contained, if it make skylake suck less I'm all for it", here goes.
Most of the commits are quite similar, ensuring the display power
doesn't
These warnings still seem to be present with DP MST configurations. They
don't actually indicate any impending doom, so we may as well use
I915_STATE_WARN_ON() here to help quiet things down a little bit for
distro kernel users.
Signed-off-by: Lyude
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1
On 17/02/16 10:40, Michał Winiarski wrote:
Used by production devices:
Intel(R) HD Graphics 510
Intel(R) HD Graphics 535
Intel(R) Iris(TM) Graphics 550
Intel(R) Iris(TM) Graphics P555
Signed-off-by: Michał Winiarski
Tested-by: Lionel Landwerlin
On Mon, Feb 22, 2016 at 04:18:33PM +0200, Imre Deak wrote:
> On pe, 2016-02-19 at 20:47 +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > for_each_pipe_masked() can be used to iterate over the pipes
> > included in the user provided pipe mask. Removes a few lines of
> >
On Mon, Feb 22, 2016 at 02:37:25PM +0200, Imre Deak wrote:
> On pe, 2016-02-19 at 18:41 +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > After we've told the irq code we don't want to handle display irqs
> > anymore, we must make sure any display irq handling already
>
On Fri, Feb 19, 2016 at 05:37:49PM +0200, Imre Deak wrote:
> On to, 2016-02-18 at 21:54 +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > PIPESTAT registers live in the display power well on VLV/CHV, so we
> > shouldn't access them when things are powered down. Let's che
Hey! I figured I should let you guys know while this fixes all of the issues
with normal display connectors, you still get WARN_ON(!wm_changed) warnings if
you try using DisplayPort MST, even with this patch.
Cheers,
Lyude
On Fri, 2015-10-23 at 09:41 -0700, Matt Roper wrote:
> From: "Kuma
[Cc Chris as the author of the idea.]
Hi,
On 22/02/16 15:18, Dave Gordon wrote:
This is essentially Chris Wilson's patch of a similar name, reworked on
top of Alex Dai's recent patch:
drm/i915: Add i915_gem_object_vmap to map GEM object to virtual space
Chris' original commentary said:
On 19/02/16 15:11, Chris Wilson wrote:
On Thu, Feb 11, 2016 at 02:10:19PM +, Tvrtko Ursulin wrote:
On 11/02/16 13:29, Chris Wilson wrote:
On Thu, Feb 11, 2016 at 01:20:46PM +, Tvrtko Ursulin wrote:
On 11/01/16 10:45, Chris Wilson wrote:
By tracking the iomapping on the VMA itself,
On Fri, Feb 19, 2016 at 08:20:27AM -, Patchwork wrote:
> == Summary ==
>
> Series 3599v1 drm/i915: Skip PIPESTAT reads from irq handler on VLV/CHV when
> power well is down
> http://patchwork.freedesktop.org/api/1.0/series/3599/revisions/1/mbox/
>
> Subgroup force-load-detect:
>
On ma, 2016-02-22 at 17:13 +0200, Imre Deak wrote:
> On pe, 2016-02-19 at 11:35 +, Patchwork wrote:
> > == Summary ==
> >
> > Series 3587v3 gen9 dmc state harderning
> > http://patchwork.freedesktop.org/api/1.0/series/3587/revisions/3/mbox/
Thanks for the patches, I pushed them to -dinq.
--I
On 22/02/16 14:56, Maarten Lankhorst wrote:
Op 22-02-16 om 15:27 schreef Tvrtko Ursulin:
On 22/02/16 13:09, Maarten Lankhorst wrote:
Hey,
Op 22-02-16 om 12:52 schreef Tvrtko Ursulin:
From: Tvrtko Ursulin
Not sure if intel_wm_config->num_pipes_active is supposed to
ever be zero when intel_u
Now that we use this function for ringbuffers and other "small" objects,
it's worth avoiding an extra kmalloc()/kfree() cycle if the page array
is small enough to put on the stack. Here we've chosen an arbitrary
cutoff of 32 (4k) pages, which is big enough for a ringbuffer (4 pages)
or a context im
Alex Dai and Chris Wilson have both recently posted patches to
rationalise the use of vmap() for mapping GEM objects into kernel
virtual space. However, they addressed different areas, with Alex's
patch being derived from the copy_batch() code, whereas Chris' patch
refactored the dma-buf and ringbu
This is essentially Chris Wilson's patch of a similar name, reworked on
top of Alex Dai's recent patch:
drm/i915: Add i915_gem_object_vmap to map GEM object to virtual space
Chris' original commentary said:
We now have two implementations for vmapping a whole object, one for
dma-buf and one
From: Alex Dai
There are several places inside driver where a GEM object is mapped
to kernel virtual space. The mapping may be done either for the whole
object or only a subset of it.
This patch introduces a function i915_gem_object_vmap_range() to
implement the common functionality.
v2: Use ob
On pe, 2016-02-19 at 11:35 +, Patchwork wrote:
> == Summary ==
>
> Series 3587v3 gen9 dmc state harderning
> http://patchwork.freedesktop.org/api/1.0/series/3587/revisions/3/mbox
> /
>
> Test gem_ctx_param_basic:
> Subgroup basic-default:
> incomplete -> PASS (sn
On Mon, Feb 22, 2016 at 10:23:30AM -, Patchwork wrote:
> == Summary ==
>
> Series 3636v1 drm/i915: synchronize_irq() before turning off disp2d power
> well on VLV/CHV
> http://patchwork.freedesktop.org/api/1.0/series/3636/revisions/1/mbox/
>
> Test kms_force_connector_basic:
> Subgro
On Mon, Feb 22, 2016 at 11:18:21AM -, Patchwork wrote:
> == Summary ==
>
> Series 3639v1 Series without cover letter
> http://patchwork.freedesktop.org/api/1.0/series/3639/revisions/1/mbox/
>
> Test kms_force_connector_basic:
> Subgroup force-load-detect:
> dmesg-fail
Op 22-02-16 om 15:27 schreef Tvrtko Ursulin:
> On 22/02/16 13:09, Maarten Lankhorst wrote:
>> Hey,
>>
>> Op 22-02-16 om 12:52 schreef Tvrtko Ursulin:
>>> From: Tvrtko Ursulin
>>>
>>> Not sure if intel_wm_config->num_pipes_active is supposed to
>>> ever be zero when intel_update_watermarks gets cal
== Summary ==
Series 2720v6 Pipe level color management
http://patchwork.freedesktop.org/api/1.0/series/2720/revisions/6/mbox/
Test gem_cs_prefetch:
Subgroup basic-default:
incomplete -> PASS (ilk-hp8440p)
Test kms_flip:
Subgroup basic-flip-vs-modeset:
On 18/02/2016 14:51, Chris Wilson wrote:
On Thu, Feb 18, 2016 at 02:24:03PM +, john.c.harri...@intel.com wrote:
From: John Harrison
Does this pass igt?
AFAICT, it passes as much of IGT as was passing before this patch set.
If so, which are the bug fixes for the current
regressions fro
On 18/02/2016 14:48, Chris Wilson wrote:
On Thu, Feb 18, 2016 at 02:24:07PM +, john.c.harri...@intel.com wrote:
From: John Harrison
As I said, and have shown in patches several months ago, just fix the
underlying bug to remove the struct_mutex requirement for freeing the
request.
If you ha
On 18/02/2016 14:49, Chris Wilson wrote:
On Thu, Feb 18, 2016 at 02:24:06PM +, john.c.harri...@intel.com wrote:
From: John Harrison
The fence object used inside the request structure requires a sequence
number. Although this is not used by the i915 driver itself, it could
potentially be us
On to, 2016-02-18 at 08:56 -0800, Rodrigo Vivi wrote:
> Imre, Patrik, do you know if I'm missing something or what I'm doing
> wrong with this power domain handler for vblanks to avoid DC states
> when we need a reliable frame counter in place.
>
> Do you have better ideas?
Would it be possible t
On 22/02/16 13:09, Maarten Lankhorst wrote:
> Hey,
>
> Op 22-02-16 om 12:52 schreef Tvrtko Ursulin:
>> From: Tvrtko Ursulin
>>
>> Not sure if intel_wm_config->num_pipes_active is supposed to
>> ever be zero when intel_update_watermarks gets called. But
>> since it can be triggered in early platf
Implement Daniel Stone's recommendation to not read registers to infer
the hardware's state.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/intel_color.c | 7 +--
drivers/gpu/drm/i915/intel_drv.h | 3 +++
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu
Patch based on a previous series by Shashank Sharma.
v2: Update contributors
v3: Refactor degamma/gamma LUTs load into a single function
v4: Remove unused variable
Signed-off-by: Shashank Sharma
Signed-off-by: Lionel Landwerlin
Signed-off-by: Kumar, Kiran S
Signed-off-by: Kausal Malladi
---
Patch based on a previous series by Shashank Sharma.
v2: Do not read GAMMA_MODE register to figure what mode we're in
v3: Program PREC_PAL_GC_MAX to clamp pixel values > 1.0
Add documentation on how the Broadcast RGB property is affected by CTM
v4: Update contributors
v5: Refactor degamma/
Patch based on a previous series by Shashank Sharma.
This introduces optional properties to enable color correction at the
pipe level. It relies on 3 transformations applied to every pixels
displayed. First a lookup into a degamma table, then a multiplication
of the rgb components by a 3x3 matrix
On pe, 2016-02-19 at 20:47 +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> for_each_pipe_masked() can be used to iterate over the pipes
> included in the user provided pipe mask. Removes a few lines of
> duplicated code.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Imre
This series introduces pipe level color management through a set of properties
attached to the CRTC. It also provides an implementation for some Intel
platforms.
This series is based of a previous set of patches by Shashank Sharma.
Cheers,
Lionel
Lionel Landwerlin (5):
drm/i915: Extract out
The moves a couple of functions programming the gamma LUT and CSC
units into their own file.
On generations prior to Haswell there is only a gamma LUT. From
haswell on there is also a new enhanced color correction unit that
isn't used yet. This is why we need to set the GAMMA_MODE register,
either
On Mon, Feb 22, 2016 at 03:59:28PM +0200, Imre Deak wrote:
> On pe, 2016-02-19 at 20:47 +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Starting from BDW the DE_PIPE interrupts for pipe B and C belong to the
> > relevant display power well. So we should make sure we've
On Mon, 22 Feb 2016, Deepak M wrote:
> From: Uma Shankar
>
> Added the BXT GPIO pin configuration and programming logic for
> backlight and panel control.
>
> v2 by Deepak
> - Added the GPIO table got BXT.
> - Added gpio_free
>
> Cc: Jani Nikula
> Cc: Ville Syrjälä
> Signed-off-by: Uma Shan
On pe, 2016-02-19 at 20:47 +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Starting from BDW the DE_PIPE interrupts for pipe B and C belong to the
> relevant display power well. So we should make sure we've finished
> processing them before turning off the power well.
>
> T
== Summary ==
Series 3623v4 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/3623/revisions/4/mbox/
Test gem_cs_prefetch:
Subgroup basic-default:
incomplete -> PASS (ilk-hp8440p)
Test kms_flip:
Subgroup basic-flip-vs-modeset:
On Mon, 22 Feb 2016, Deepak M wrote:
> From: Yogesh Mohan Marimuthu
>
> The GPIO configuration and register offsets are different from
> baytrail for cherrytrail. Port the gpio programming accordingly
> for cherrytrail in this patch.
>
> v2: Removing the duplication of parsing
>
> Cc: Jani Nikula
From: Uma Shankar
Added the BXT GPIO pin configuration and programming logic for
backlight and panel control.
v2 by Deepak
- Added the GPIO table got BXT.
- Added gpio_free
Cc: Jani Nikula
Cc: Ville Syrjälä
Signed-off-by: Uma Shankar
Signed-off-by: Deepak M
---
drivers/gpu/drm/i915/int
From: Yogesh Mohan Marimuthu
The GPIO configuration and register offsets are different from
baytrail for cherrytrail. Port the gpio programming accordingly
for cherrytrail in this patch.
v2: Removing the duplication of parsing
Cc: Jani Nikula
Cc: Ville Syrjälä
Signed-off-by: Yogesh Mohan Mari
Hi,
I don't know how much sense whould this make:
igt_display_t has a universal_plane bool var, can't we have one as well
that can be set in igt_display_init() when trying to set the cap?
This way in case DRM_CLIENT_CAP_ATOMIC is not enabled an ATOMIC
commit can fail ``gracef
Hi,
On to, 2016-02-18 at 19:42 +0800, Zhi Wang wrote:
> As the PVINFO page definition is used by both GVT-g guest (vGPU) and GVT-g
> host (GVT-g kernel device model), factor it out for better code structure.
>
> Signed-off-by: Zhi Wang
> ---
> drivers/gpu/drm/i915/i915_pvinfo.h | 113
> +++
Hey,
Op 22-02-16 om 12:52 schreef Tvrtko Ursulin:
> From: Tvrtko Ursulin
>
> Not sure if intel_wm_config->num_pipes_active is supposed to
> ever be zero when intel_update_watermarks gets called. But
> since it can be triggered in early platform bringup perhaps
> we want to guard against it rather
So is the summary that currently MMIO flips do not work on some platforms?
That could be a problem because the scheduler is intended to be enabled
for everything and thus will be forcing MMIO flips on everything. So
should I reverse the logic here - only enable the scheduler if MMIO
flips are
== Summary ==
Series 3678v1 drm/i915: Avoid selecting unavailable BSD2 ring
http://patchwork.freedesktop.org/api/1.0/series/3678/revisions/1/mbox/
Test drv_getparams_basic:
Subgroup basic-eu-total:
pass -> FAIL (bsw-nuc-2)
pass -> FAIL
On pe, 2016-02-19 at 18:41 +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> After we've told the irq code we don't want to handle display irqs
> anymore, we must make sure any display irq handling already
> kicked off has finished before we actually turn off the power well.
>
Ville, Daniel,
any additional info I could provide? I have to return dual-link DVI
cable back, so let me know if I could reveal more details if necessary.
Regards,
Oleksandr
16.02.2016 14:54, Daniel Vetter написав:
On Tue, Feb 16, 2016 at 12:58:56PM +0200, Oleksandr Natalenko wrote:
Ville
== Summary ==
Series 3677v1 drm/i915: Avoid divbyzero in modesetting
http://patchwork.freedesktop.org/api/1.0/series/3677/revisions/1/mbox/
Test gem_cs_prefetch:
Subgroup basic-default:
incomplete -> PASS (ilk-hp8440p)
Test kms_flip:
Subgroup basic-flip-vs-dp
Return error when I915_EXEC_BSD_RING2 flag is set but BSD2 ring
is not available in the HW.
Signed-off-by: Gabriel Feceoru
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffe
From: Tvrtko Ursulin
Not sure if intel_wm_config->num_pipes_active is supposed to
ever be zero when intel_update_watermarks gets called. But
since it can be triggered in early platform bringup perhaps
we want to guard against it rather than divide by zero.
Signed-off-by: Tvrtko Ursulin
Cc: Matt
Op 19-02-16 om 11:08 schreef Pratik Vishwakarma:
> From: Mayuresh Gharpure
>
> Co-Author : Marius Vlad
> Co-Author : Pratik Vishwakarma
>
> So far we have had only two commit styles, COMMIT_LEGACY
> and COMMIT_UNIVERSAL. This patch adds another commit style
> COMMIT_ATOMIC which makes use of drm
== Summary ==
Series 3639v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/3639/revisions/1/mbox/
Test kms_force_connector_basic:
Subgroup force-load-detect:
dmesg-fail -> FAIL (snb-x220t)
fail -> DMESG-FAIL (snb-del
== Summary ==
Series 3636v1 drm/i915: synchronize_irq() before turning off disp2d power well
on VLV/CHV
http://patchwork.freedesktop.org/api/1.0/series/3636/revisions/1/mbox/
Test kms_force_connector_basic:
Subgroup force-load-detect:
dmesg-fail -> FAIL (snb-x220t)
The cache line offset for the Indirect CS context (0x21C8) varies from gen
to gen.
v2: Move it into a function (Arun), use MISSING_CASE (Chris)
v3: Rebased (catched by ci bat)
Cc: Arun Siluvery
Cc: Chris Wilson
Reviewed-by: Arun Siluvery
Signed-off-by: Michel Thierry
---
drivers/gpu/drm/i915
== Summary ==
Series 3521v2 drm/i915/bxt: Remove DSP CLK_GATE programming for BXT
http://patchwork.freedesktop.org/api/1.0/series/3521/revisions/2/mbox/
Test kms_flip:
Subgroup basic-flip-vs-modeset:
pass -> INCOMPLETE (ilk-hp8440p) UNSTABLE
Test kms_force_connector_
== Summary ==
Series 3628v1 drm/i915: Get the i2c bus number from the ACPI
http://patchwork.freedesktop.org/api/1.0/series/3628/revisions/1/mbox/
Test kms_flip:
Subgroup basic-flip-vs-dpms:
incomplete -> PASS (ilk-hp8440p) UNSTABLE
Test kms_force_connector_basic:
== Summary ==
Series 3541v1 drm/i915: Some FDI related dotclock stuff
http://patchwork.freedesktop.org/api/1.0/series/3541/revisions/1/mbox/
Test kms_flip:
Subgroup basic-flip-vs-dpms:
dmesg-warn -> PASS (ilk-hp8440p) UNSTABLE
Subgroup basic-flip-vs-wf_vblank
== Summary ==
Series 2720v5 Pipe level color management
http://patchwork.freedesktop.org/api/1.0/series/2720/revisions/5/mbox/
Test gem_sync:
Subgroup basic-render:
pass -> INCOMPLETE (ilk-hp8440p)
Test gem_tiled_pread_basic:
incomplete -> PASS
== Summary ==
Series 3554v1 Add i915_gem_object_vmap
http://patchwork.freedesktop.org/api/1.0/series/3554/revisions/1/mbox/
Test gem_ctx_param_basic:
Subgroup basic-default:
pass -> DMESG-WARN (bdw-nuci7)
Subgroup invalid-param-set:
pass
== Summary ==
Series 3587v2 gen9 dmc state harderning
http://patchwork.freedesktop.org/api/1.0/series/3587/revisions/2/mbox/
Test gem_cs_prefetch:
Subgroup basic-default:
incomplete -> PASS (snb-x220t)
Test kms_flip:
Subgroup basic-plain-flip:
== Summary ==
Series 3585v1 GPU scheduler for i915 driver
2016-02-18T14:27:54.467402
http://patchwork.freedesktop.org/api/1.0/series/3585/revisions/1/mbox/
Applying: drm/i915: Add total count to context status debugfs output
Repository lacks necessary blobs to fall back on 3-way merge.
Cannot fal
== Summary ==
Series 3630v1 drm/i915: Prevent runaway head from denying hangcheck
http://patchwork.freedesktop.org/api/1.0/series/3630/revisions/1/mbox/
Test kms_force_connector_basic:
Subgroup force-load-detect:
fail -> DMESG-FAIL (snb-x220t)
dmesg-f
== Summary ==
Series 3624v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/3624/revisions/1/mbox/
Test gem_cs_prefetch:
Subgroup basic-default:
incomplete -> PASS (ilk-hp8440p)
Test gem_ctx_param_basic:
Subgroup basic-default:
== Summary ==
Series 3623v2 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/3623/revisions/2/mbox/
Test kms_flip:
Subgroup basic-flip-vs-dpms:
incomplete -> PASS (ilk-hp8440p) UNSTABLE
Test kms_force_connector_basic:
Subgroup force
== Summary ==
Series 3623v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/3623/revisions/1/mbox/
Test gem_ctx_param_basic:
Subgroup basic-default:
incomplete -> PASS (snb-x220t)
Subgroup invalid-ctx-get:
incomplet
== Summary ==
Series 1068v3 Convert requests to use struct fence
2016-02-18T14:23:35.102012
http://patchwork.freedesktop.org/api/1.0/series/1068/revisions/3/mbox/
Applying: drm/i915: Convert requests to use struct fence
Repository lacks necessary blobs to fall back on 3-way merge.
Cannot fall bac
== Summary ==
Series 3568v1 drm/atomic: Fix encoder stealing.
http://patchwork.freedesktop.org/api/1.0/series/3568/revisions/1/mbox/
Test kms_flip:
Subgroup basic-flip-vs-dpms:
dmesg-warn -> PASS (ilk-hp8440p) UNSTABLE
Subgroup basic-flip-vs-modeset:
== Summary ==
Series 3572v1 drm/i915: Add RPS debugfs disabling for gen6+ platforms
http://patchwork.freedesktop.org/api/1.0/series/3572/revisions/1/mbox/
Test drv_module_reload_basic:
pass -> DMESG-WARN (ilk-hp8440p)
Test kms_flip:
Subgroup basic-flip-vs-dpms:
== Summary ==
Series 3629v2 drm/i915/gen9: Set value of Indirect Context Offset based on gen
version
2016-02-19T14:57:22.102741
http://patchwork.freedesktop.org/api/1.0/series/3629/revisions/2/mbox/
Applying: drm/i915/gen9: Set value of Indirect Context Offset based on gen
version
Repository la
== Summary ==
Series 3554v2 Add i915_gem_object_vmap
http://patchwork.freedesktop.org/api/1.0/series/3554/revisions/2/mbox/
Test core_auth:
Subgroup basic-auth:
pass -> INCOMPLETE (ilk-hp8440p)
Test gem_cs_prefetch:
Subgroup basic-default:
inc
== Summary ==
Series 659v10 Support for creating/using Stolen memory backed objects
2016-02-19T07:14:23.836239
http://patchwork.freedesktop.org/api/1.0/series/659/revisions/10/mbox/
Applying: drm/i915: Add support for mapping an object page by page
Applying: drm/i915: Introduce i915_gem_object_ge
== Summary ==
Series 3599v1 drm/i915: Skip PIPESTAT reads from irq handler on VLV/CHV when
power well is down
http://patchwork.freedesktop.org/api/1.0/series/3599/revisions/1/mbox/
Test core_auth:
Subgroup basic-auth:
pass -> INCOMPLETE (ilk-hp8440p)
Test core_prop_
== Summary ==
Series 3605v1 drm/i915: Before waiting for a vblank update drm frame counter.
http://patchwork.freedesktop.org/api/1.0/series/3605/revisions/1/mbox/
Test drv_getparams_basic:
Subgroup basic-subslice-total:
pass -> INCOMPLETE (snb-x220t)
Test drv_hangman
== Summary ==
Series 3587v3 gen9 dmc state harderning
http://patchwork.freedesktop.org/api/1.0/series/3587/revisions/3/mbox/
Test gem_ctx_param_basic:
Subgroup basic-default:
incomplete -> PASS (snb-x220t)
Subgroup invalid-ctx-get:
incomplete
Hey,
Jesse Barnes schreef op vr 19-02-2016 om 12:01 [-0800]:
> On 02/19/2016 11:53 AM, Ville Syrjälä wrote:
> > On Fri, Feb 19, 2016 at 11:28:05AM -0800, Jesse Barnes wrote:
> >> On 02/18/2016 06:26 AM, john.c.harri...@intel.com wrote:
> >>> From: John Harrison
> >>>
> >>> MMIO flips are the pre
On Sat, 20 Feb 2016, Rodrigo Vivi wrote:
> We have a duplicated patch on drm-intel-nightly
>
> commits d7006964d and cc1de6e80
[I snipped the extra trailing 'q' off the 2nd commit id.]
> causing:
>
> drivers/gpu/drm//amd/amdgpu/amdgpu_ttm.c:818:6: error: redefinition of
> ‘amdgpu_ttm_tt_affect_u
Hi,
This fixes the issue for my machine, we'll try in our CI system, too.
CC'd Daniel for that. By R-b and T-b below.
On ma, 2016-02-22 at 10:27 +0530, Viresh Kumar wrote:
> The intel-pstate driver is using intel_pstate_hwp_set() from two
> separate paths, i.e. ->set_policy() callback and sysfs
Op 19-02-16 om 04:21 schreef Dave Airlie:
> On 16 February 2016 at 21:37, Ville Syrjälä
> wrote:
>> On Mon, Feb 15, 2016 at 02:17:01PM +0100, Maarten Lankhorst wrote:
>>> Because we record connector_mask using 1 << drm_connector_index now
>>> the connector_mask should stay the same even when other
On Mon, 22 Feb 2016, "shadow.yang" wrote:
> The system platform is Bay trail-M N2920.
> The DDI1_BKLTCTL has output at S3 resume on WIN7 /8.
> but Linux ubuntu 1404 Kernel 3.19 the DDI1_BKLTCTL is no signal at S3
> resume.
>
> The xrand and dmesg file please reference the attachment.
> "dmesg.log"
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