== Series Details ==
Series: drm/i915/Gen9+: optional IPC enablement (rev2)
URL : https://patchwork.freedesktop.org/series/5203/
State : success
== Summary ==
Series 5203v2 drm/i915/Gen9+: optional IPC enablement
http://patchwork.freedesktop.org/api/1.0/series/5203/revisions/2/mbox/
Test kms_
On Mon, 04 Apr 2016, Ville Syrjälä wrote:
> On Fri, Mar 18, 2016 at 01:11:10PM +0200, Jani Nikula wrote:
>> In sequence block v2, and only in v2, the gpio source (i.e. IOSF port)
>> is specified separately.
>>
>> v2: initialize gpio_source to 0 and handle v1 and v2 in the same branch
>>
>> Signe
On Mon, 04 Apr 2016, Ville Syrjälä wrote:
> On Fri, Mar 18, 2016 at 01:11:15PM +0200, Jani Nikula wrote:
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Ville Syrjälä
Pushed to drm-intel-next-queued, thanks for the review.
BR,
Jani.
>
>> ---
>> drivers/gpu/drm/i915/i915_reg.h | 4
>> 1
On ma, 2016-04-04 at 14:46 +0100, Chris Wilson wrote:
> Since we only attempt to purge an object if can_release_pages() report
> true, we should also only add it to the count of potential recoverable
> pages when can_release_pages() is true.
>
> Signed-off-by: Chris Wilson
> Cc: Joonas Lahtinen
On ma, 2016-04-04 at 14:46 +0100, Chris Wilson wrote:
> vmaps are temporary kernel mappings that may be of long duration.
> Reusing a vmap on an object is preferrable for a driver as the cost of
> setting up the vmap can otherwise dominate the operation on the object.
> However, the vmap address sp
On ma, 2016-04-04 at 14:46 +0100, Chris Wilson wrote:
> If the core runs out of vmap address space, it will call a notifier in
> case any driver can reap some of its vmaps. As i915.ko is possibily
> holding onto vmap address space that could be recovered, hook into the
> notifier chain and try and
Others should be preserved across suspend. BUT they are not context saved
(I Know!) so any sort of dirty test won't work. The current test will
check the other engines values as they are programmed on start-up (with
the new patches) and should be preserved (or be reprogrammed) when coming
out o
On Mon, Apr 04, 2016 at 12:34:30PM +0200, Patrik Jakobsson wrote:
> On Fri, Apr 01, 2016 at 04:02:36PM +0300, Imre Deak wrote:
> > So far we only power well enabling was synchronous not disabling. Since
> > we don't exactly know how the firmware (both DMC and PCU) synchronizes
> > against the actua
On Mon, 04 Apr 2016, Ramalingam C wrote:
> On Thursday 31 March 2016 12:34 AM, Daniel Vetter wrote:
>> On Wed, Mar 30, 2016 at 07:49:40PM +0530, Ramalingam C wrote:
>>> On Wednesday 30 March 2016 05:02 PM, Daniel Vetter wrote:
On Tue, Mar 29, 2016 at 11:04:51PM +0530, Ramalingam C wrote:
Op 04-04-16 om 17:47 schreef Marius Vlad:
> igt_atomic_prepare_plane_commit() assumes that the framebuffer is always
> set-up.
>
> Signed-off-by: Marius Vlad
> ---
> lib/igt_kms.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/lib/igt_kms.c b/lib/igt_kms.c
> index 82257a
On 04/04/16 19:58, Chris Wilson wrote:
On Mon, Apr 04, 2016 at 05:51:09PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Current implementation releases the forcewake at any time between
straight away, and one jiffie from the last put, or first automatic
grab.
That isn't the problem thou
On Tue, Apr 05, 2016 at 09:54:58AM +0100, Tvrtko Ursulin wrote:
>
> On 04/04/16 19:58, Chris Wilson wrote:
> >On Mon, Apr 04, 2016 at 05:51:09PM +0100, Tvrtko Ursulin wrote:
> >>From: Tvrtko Ursulin
> >>
> >>Current implementation releases the forcewake at any time between
> >>straight away, and
On 04/04/16 20:07, Chris Wilson wrote:
On Mon, Apr 04, 2016 at 05:51:11PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
On platforms with multiple forcewake domains it seems more efficient
to request all desired ones and then to wait for acks to avoid
needlessly serializing on each domain
On Tue, Apr 05, 2016 at 11:19:38AM +0300, Joonas Lahtinen wrote:
> On ma, 2016-04-04 at 14:46 +0100, Chris Wilson wrote:
> > If the core runs out of vmap address space, it will call a notifier in
> > case any driver can reap some of its vmaps. As i915.ko is possibily
> > holding onto vmap address s
On 04/04/16 20:14, Dave Gordon wrote:
On 04/04/16 17:51, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
As the vast majority of users does not use the domain id variable,
"do not use"
Yep.
we can eliminate it from the iterator and also change the latter
using the same principle as was rec
Hi,
On 25/03/16 13:18, Kukanova, Svetlana wrote:
Hi everyone,
Yes, this breaks userspace ABI and in particular it broke VTune work.
Ring ids are seen via i915 tracepoints, and VTune Amplifier uses them.
We were relying on the old ring ids, and assuming that the new rings would be
added to the
Both the oom and vmap notifier callbacks have a loop to acquire the
struct_mutex and set the device as uninterruptible, within a certain
time. Refactor the common code into a pair of functions.
Suggested-by: Joonas Lahtinen
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Tvrtko Ursulin
---
Op 01-04-16 om 03:46 schreef Matt Roper:
> We currently only setup intel_state->active_crtcs if we plan to modify
> it and write the modification back to dev_priv. Let's ensure that
> this value is always valid, even when it isn't changing as part of an
> atomic transaction.
It should be noted tha
On ti, 2016-04-05 at 10:26 +0200, Patrik Jakobsson wrote:
> On Mon, Apr 04, 2016 at 12:34:30PM +0200, Patrik Jakobsson wrote:
> > On Fri, Apr 01, 2016 at 04:02:36PM +0300, Imre Deak wrote:
> > > So far we only power well enabling was synchronous not disabling.
> > > Since
> > > we don't exactly kno
Op 01-04-16 om 03:46 schreef Matt Roper:
> We eventually want to calculate watermark values at atomic 'check' time
> instead of atomic 'commit' time so that any requested configurations
> that result in impossible watermark requirements are properly rejected.
> The first step along this path is to
On Tue, Apr 05, 2016 at 10:05:24AM +0100, Tvrtko Ursulin wrote:
> On 04/04/16 20:14, Dave Gordon wrote:
> >On 04/04/16 17:51, Tvrtko Ursulin wrote:
> >>diff --git a/drivers/gpu/drm/i915/i915_drv.h
> >>b/drivers/gpu/drm/i915/i915_drv.h
> >>index 7d4c704d7d75..160f980f0368 100644
> >>--- a/drivers/gp
Op 01-04-16 om 03:46 schreef Matt Roper:
> Calculate the DDB blocks needed to satisfy the current atomic
> transaction at atomic check time. This is a prerequisite to calculating
> SKL watermarks during the 'check' phase and rejecting any configurations
> that we can't find valid watermarks for.
>
On Tue, Apr 05, 2016 at 10:02:28AM +0100, Tvrtko Ursulin wrote:
>
> On 04/04/16 20:07, Chris Wilson wrote:
> >On Mon, Apr 04, 2016 at 05:51:11PM +0100, Tvrtko Ursulin wrote:
> >>From: Tvrtko Ursulin
> >>
> >>On platforms with multiple forcewake domains it seems more efficient
> >>to request all d
On Tuesday 05 April 2016 02:00 PM, Jani Nikula wrote:
On Mon, 04 Apr 2016, Ramalingam C wrote:
On Thursday 31 March 2016 12:34 AM, Daniel Vetter wrote:
On Wed, Mar 30, 2016 at 07:49:40PM +0530, Ramalingam C wrote:
On Wednesday 30 March 2016 05:02 PM, Daniel Vetter wrote:
On Tue, Mar 29, 201
Op 01-04-16 om 03:46 schreef Matt Roper:
> In an upcoming patch we'll move this calculation to the atomic 'check'
> phase so that the display update can be rejected early if no valid
> watermark programming is possible.
>
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/intel_drv.h | 21 +
== Series Details ==
Series: drm/i915/skl: Disable underrun reporting on MST unplug
URL : https://patchwork.freedesktop.org/series/5297/
State : success
== Summary ==
Series 5297v1 drm/i915/skl: Disable underrun reporting on MST unplug
http://patchwork.freedesktop.org/api/1.0/series/5297/revis
On ti, 2016-04-05 at 10:22 +0100, Chris Wilson wrote:
> Both the oom and vmap notifier callbacks have a loop to acquire the
> struct_mutex and set the device as uninterruptible, within a certain
> time. Refactor the common code into a pair of functions.
>
> Suggested-by: Joonas Lahtinen
> Signed-
On 05/04/16 09:59, Chris Wilson wrote:
On Tue, Apr 05, 2016 at 09:54:58AM +0100, Tvrtko Ursulin wrote:
On 04/04/16 19:58, Chris Wilson wrote:
On Mon, Apr 04, 2016 at 05:51:09PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Current implementation releases the forcewake at any time betwe
== Series Details ==
Series: series starting with [v2,1/3] drm/i915/shrinker: Account for
unshrinkable unbound pages (rev2)
URL : https://patchwork.freedesktop.org/series/5276/
State : failure
== Summary ==
CC [M] drivers/net/ethernet/intel/igbvf/mbx.o
LD drivers/net/ethernet/synops
gcc-6 provides a neat new warning that can spot some cases
of misleading indentation.
One such case was flagged in gen3_mixed_blits; this patch fixes it.
Signed-off-by: David Weinehall
---
tests/gen3_mixed_blits.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/gen3_mix
Op 01-04-16 om 03:46 schreef Matt Roper:
> We calculate the watermark config into intel_atomic_state and then save
> it into dev_priv, but never actually use it from there. This is
> left-over from some early ILK-style watermark programming designs that
> got changed over time.
For patch 1-5, 7, a
DMC forces on power well 1 and the misc IO power well by setting the
corresponding request bits both in the BIOS and the DEBUG power well
request registers. This is somewhat unexpected since the firmware should
really just save and restore state but not alter it. We also depend on
being able to dis
On Tue, Apr 05, 2016 at 10:46:37AM +0200, Maarten Lankhorst wrote:
> Op 04-04-16 om 17:47 schreef Marius Vlad:
> > igt_atomic_prepare_plane_commit() assumes that the framebuffer is always
> > set-up.
> >
> > Signed-off-by: Marius Vlad
> > ---
> > lib/igt_kms.c | 2 +-
> > 1 file changed, 1 insert
On Tue, Apr 05, 2016 at 11:02:15AM +0100, Tvrtko Ursulin wrote:
>
> On 05/04/16 09:59, Chris Wilson wrote:
> >On Tue, Apr 05, 2016 at 09:54:58AM +0100, Tvrtko Ursulin wrote:
> >>
> >>On 04/04/16 19:58, Chris Wilson wrote:
> >>>On Mon, Apr 04, 2016 at 05:51:09PM +0100, Tvrtko Ursulin wrote:
> F
On Tue, Apr 05, 2016 at 12:03:44PM +0530, Kumar, Shobhit wrote:
> On Thursday 31 March 2016 03:57 PM, Lluís Batlle i Rossell wrote:
> >Hello,
> >
> >I saw that you did some work for LPSS PWM:
> >https://lists.freedesktop.org/archives/intel-gfx/2016-January/085006.html
> >
>
> Apart from above appl
Add force_reset_modeset_test as a parameter to force the modeset path during
gpu reset.
This allows a IGT test to set the knob and trigger a hang to force the gpu
reset.
Signed-off-by: Maarten Lankhorst
Fixes: e2c8b8701e2d ("drm/i915: Use atomic helpers for suspend, v2.")
Cc: drm-intel-fi...@li
Op 05-04-16 om 12:29 schreef Marius Vlad:
> On Tue, Apr 05, 2016 at 10:46:37AM +0200, Maarten Lankhorst wrote:
>> Op 04-04-16 om 17:47 schreef Marius Vlad:
>>> igt_atomic_prepare_plane_commit() assumes that the framebuffer is always
>>> set-up.
>>>
>>> Signed-off-by: Marius Vlad
>>> ---
>>> lib/i
On Tue, Apr 05, 2016 at 01:02:14PM +0300, Joonas Lahtinen wrote:
> On ti, 2016-04-05 at 10:22 +0100, Chris Wilson wrote:
> > Both the oom and vmap notifier callbacks have a loop to acquire the
> > struct_mutex and set the device as uninterruptible, within a certain
> > time. Refactor the common cod
This adds a test that forces a modeset during gpu reset, which has broken
a few times in the past during the atomic rework.
Signed-off-by: Maarten Lankhorst https://lists.freedesktop.org/mailman/listinfo/intel-gfx
From: Tvrtko Ursulin
On platforms with multiple forcewake domains it seems more efficient
to request all desired ones and then to wait for acks to avoid
needlessly serializing on each domain.
v2: Rebase.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_u
From: Tvrtko Ursulin
As the vast majority of users do not use the domain id variable,
we can eliminate it from the iterator and also change the latter
using the same principle as was recently done for for_each_engine.
For a couple of callers which do need the domain mask, store it
in the domain
From: Tvrtko Ursulin
Because it is based on jiffies, current implementation releases the
forcewake at any time between straight away and between 1ms and 10ms,
depending on the kernel configuration (CONFIG_HZ).
This is probably not what has been desired, since the dynamics of keeping
parts of the
This fixes potential crashes when the framebuffer is unset from a
given plane.
Signed-off-by: Lionel Landwerlin
Cc: Maarten Lankhorst
Cc: Marius Vlad
Cc: Ville Syrjälä
---
lib/igt_fb.h | 4
lib/igt_kms.c | 32
lib/igt_kms.h | 8
3 files change
On Tue, Apr 05, 2016 at 12:01:10PM +0100, Tvrtko Ursulin wrote:
> for_each_fw_domain(domain, dev_priv, id) {
> - if (del_timer_sync(&domain->timer) == 0)
> + if (hrtimer_cancel(&domain->timer) == 0)
> continue;
Had
On Tue, Apr 05, 2016 at 12:11:19PM +0100, Lionel Landwerlin wrote:
> This fixes potential crashes when the framebuffer is unset from a
> given plane.
>
> Signed-off-by: Lionel Landwerlin
> Cc: Maarten Lankhorst
> Cc: Marius Vlad
> Cc: Ville Syrjälä
> ---
> lib/igt_fb.h | 4
> lib/igt_k
On 05/04/16 07:56, Patchwork wrote:
== Series Details ==
Series: GuC reset-and-retry patches (resend)
URL : https://patchwork.freedesktop.org/series/5287/
State : failure
== Summary ==
Series 5287v1 GuC reset-and-retry patches (resend)
http://patchwork.freedesktop.org/api/1.0/series/5287/rev
On 03/04/16 18:14, Chris Wilson wrote:
In order to ensure that all invalidations are completed before the
operation returns to userspace (i.e. before the mmap() syscall returns)
we need to flush the outstanding operations. To this end, we submit all
the per-object invalidation work to a private
From: Ville Syrjälä
Actually use the builtin register spec on gen4. Makes intel_reg dump
actually do something on gen4.
Signed-off-by: Ville Syrjälä
---
tools/intel_reg_decode.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/intel_reg_decode.c b/tools/intel_reg_decod
Reviewed-by: Matthew Auld
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
== Series Details ==
Series: drm/i915/bxt: Fix/enable display power well support/runtime PM (rev5)
URL : https://patchwork.freedesktop.org/series/5177/
State : success
== Summary ==
Series 5177v5 drm/i915/bxt: Fix/enable display power well support/runtime PM
http://patchwork.freedesktop.org/ap
On 03/04/16 18:14, Chris Wilson wrote:
Holding a reference to the containing task_struct is not sufficient to
prevent the mm_struct from being reaped under memory pressure. If this
happens whilst we are calling get_user_pages(), explosions errupt -
sometimes an immediate GPF, sometimes page flag
On 05/04/16 13:03, Dave Gordon wrote:
On 05/04/16 07:56, Patchwork wrote:
== Series Details ==
Series: GuC reset-and-retry patches (resend)
URL : https://patchwork.freedesktop.org/series/5287/
State : failure
== Summary ==
Series 5287v1 GuC reset-and-retry patches (resend)
http://patchwork
On Tue, Apr 05, 2016 at 01:05:05PM +0100, Tvrtko Ursulin wrote:
>
> On 03/04/16 18:14, Chris Wilson wrote:
> >In order to ensure that all invalidations are completed before the
> >operation returns to userspace (i.e. before the mmap() syscall returns)
> >we need to flush the outstanding operations
_DSM is added to program HPD_CTL(0x1094) register
of PMC from i915 driver which will be called
based on driver feature flag. PMC hpd control register
programming will enable PMC to get hpd interrupt
during dc9.
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/intel_acpi.c | 45 +
While suspending the device hpd related interrupts are enabled
to get the interrupt when device is in suspend state.
Though display is in DC9 but system can be in S0 or S0i3 state.
Hot plug during S0 state will generate de_port_interrupt but if
system is in S0i3 state then display driver will get
To support hpd during sleep a new feature flag is
added in vbt and also in dev_priv for enabling/disabling
inside deiver. By default this feature will be
diabled and based on oem request this feature can
be enabled by changing vbt feature flag.
Signed-off-by: Animesh Manna
Signed-off-by: A.Sunil
For BXT, display engine can not generate interrupt when in D3.
On the othen hand S0ix can be achieved without display in D3. So,
Display should not put into D3 for HPD to work and will not
have any power impact.
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/i915_drv.c | 6 ++
1 file
Along with below patches sharing some background details/design.
- On BXT, Display cannot generate an interrupt when in D3.
- Without display in D3, S0ix can be achieved, Power impact
will be zero if d3 is blocked. PMCSR for Graphics/Display
is irrelevant, as the power management for them is taken
2016-04-02 15:08 GMT+01:00 Oskar Berggren :
> Hi,
>
> After trying two different machines I'm beginning to feel like Skylake is
> completely unusable with multiple monitors connected. Is this a known
> limitation? Am I the only one experiencing this?
>
> First I tested on laptop Dell XPS 15 9550 w
Based on vbt entry enabling i915 driver to act on
hpd support during suspend.
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/intel_bios.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_bios.c
b/drivers/gpu/drm/i915/intel_bios.c
index 9c406b0..8ed084
Guid is changed for bxt platform, so corrected the guid for bxt.
Signed-off-by: Ananth Krishna R
Signed-off-by: Bharath K Veera
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/intel_acpi.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/int
These patches add support for Backlight Control using DPCD registers on eDP
displays.
- Patch 1 Reads the eDP DPCD Display Control capability registers.
- Patch 2 Implements functionaly for DPCD Backlight Control
Yetunde Adebisi (2):
drm/i915: Add edp_dpcd variable
drm/i915: Add Backlight
Add new edp_dpcd variable to intel_dp.
Read and save eDP Display control capability registers to edp_dpcd.
Signed-off-by: Yetunde Adebisi
---
drivers/gpu/drm/i915/intel_dp.c | 15 ++-
drivers/gpu/drm/i915/intel_drv.h | 1 +
2 files changed, 11 insertions(+), 5 deletions(-)
diff --
This patch adds support for eDP backlight control using DPCD registers to
backlight hooks in intel_panel.
It checks for backlight control over AUX channel capability and sets up
function pointers to get and set the backlight brightness level if
supported.
v2: Moved backlight functions from intel_
For all gt3 and gt4 skylake variants, extend the usage of
WaRsDisableCoarsePowerGating for all revisions. Without this
gt3 and gt4 skylakes up to atleast rev 0xa can gpu hang or
system hang.
Cc: Abdiel Janulgue
Cc: Ben Widawsky
Cc: Timo Aaltonen
Cc:
Reported-by: Mikael Djurfeldt
References: h
Experiments with heaven 4.0 benchmark and skylake gt3e (rev 0xa)
suggest that WaForceContextSaveRestoreNonCoherent is needed for all
revs. Extending this to all revs cures a gpu hang with rev 0xa when
running heaven4.0 gpu benchmark.
We have been here before, with problems enabling gt4e and extend
We only need the struct_mutex to manipulate the pages_pin_count on the
object, we do not need to hold our BKL when freeing the exported
scatterlist.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_dmabuf.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drive
After we pin the ringbuffer into the GGTT, all error paths need to unpin
it again. Move this common step into one block, and make the unable to
iomap error code consistent (i.e. treat it as out of memory to avoid
confusing it with a invalid argument).
Signed-off-by: Chris Wilson
---
drivers/gpu/
When called because we have run out of vmap address space, we only need
to recover objects that have vmappings and not all.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gem_shrinker.c | 10 +-
2 files changed, 10 insertions(+)
If we want a contiguous mapping of a single page sized object, we can
forgo using vmap() and just use a regular kmap(). Note that this is only
suitable if the desired pgprot_t is comptabitible.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c | 22 --
1 file ch
I have instances where I want to use drm_malloc_ab() but with a custom
gfp mask. And with those, where I want a temporary allocation, I want to
try a high-order kmalloc() before using a vmalloc().
So refactor my usage into drm_malloc_gfp().
Signed-off-by: Chris Wilson
Cc: dri-de...@lists.freedes
We have a couple of pieces of code that wish to take further advantange
of prolonged vmappings: execlists (ringbuffers), the cmdparser and the GuC
(workqueues). This series refactors the whole-object vmapping code and
caches it on the drm_i915_gem_object until it is released along with the
object's
We now have two implementations for vmapping a whole object, one for
dma-buf and one for the ringbuffer. If we couple the vmapping into the
obj->pages lifetime, then we can reuse an obj->vmapping for both and at
the same time couple it into the shrinker.
v2: Mark the failable kmalloc() as __GFP_NO
On Thu, Mar 31, 2016 at 06:46:36PM -0700, Matt Roper wrote:
> Moving watermark calculation into the check phase will allow us to to
> reject display configurations for which there are no valid watermark
> values before we start trying to program the hardware (although those
> tests will come in a s
05.04.2016, 15:56, Mika Kuoppala kirjoitti:
> For all gt3 and gt4 skylake variants, extend the usage of
> WaRsDisableCoarsePowerGating for all revisions. Without this
> gt3 and gt4 skylakes up to atleast rev 0xa can gpu hang or
> system hang.
>
> Cc: Abdiel Janulgue
> Cc: Ben Widawsky
> Cc: Timo
On Tue, Apr 05, 2016 at 01:57:37PM +0100, Chris Wilson wrote:
> If we want a contiguous mapping of a single page sized object, we can
> forgo using vmap() and just use a regular kmap(). Note that this is only
> suitable if the desired pgprot_t is comptabitible.
One day, I will enable :set spell. D
On Tue, Apr 05, 2016 at 12:56:37PM +0200, Maarten Lankhorst wrote:
> Add force_reset_modeset_test as a parameter to force the modeset path during
> gpu reset.
> This allows a IGT test to set the knob and trigger a hang to force the gpu
> reset.
>
> Signed-off-by: Maarten Lankhorst
> Fixes: e2c8
Hi,
On 4 April 2016 at 22:17, Matt Roper wrote:
> i915 does not yet support the atomic modesetting interface by default;
> at the moment it must be turned on explicitly via an
> 'i915.nuclear_pageflip' kernel command line option. We should skip
> (rather than fail) this IGT test when running on
On Tue, Apr 05, 2016 at 01:57:36PM +0100, Chris Wilson wrote:
> I have instances where I want to use drm_malloc_ab() but with a custom
> gfp mask. And with those, where I want a temporary allocation, I want to
> try a high-order kmalloc() before using a vmalloc().
>
> So refactor my usage into drm
On 05/04/16 12:48, Ville Syrjälä wrote:
On Tue, Apr 05, 2016 at 12:11:19PM +0100, Lionel Landwerlin wrote:
This fixes potential crashes when the framebuffer is unset from a
given plane.
Signed-off-by: Lionel Landwerlin
Cc: Maarten Lankhorst
Cc: Marius Vlad
Cc: Ville Syrjälä
---
lib/igt_fb
I use :autocmd FileType gitcommit setlocal spell
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
This fixes potential crashes when the framebuffer is unset from a
given plane.
v2: s/with/within/ typo in header
Signed-off-by: Lionel Landwerlin
Cc: Maarten Lankhorst
Cc: Marius Vlad
Cc: Ville Syrjälä
---
lib/igt_fb.h | 4
lib/igt_kms.c | 32
lib/igt_
Hi Yetunde,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.6-rc2 next-20160405]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Yetunde-Adebisi/DPCD-Backlight
On Tue, Apr 05, 2016 at 02:12:43PM +0100, Lionel Landwerlin wrote:
> On 05/04/16 12:48, Ville Syrjälä wrote:
> > On Tue, Apr 05, 2016 at 12:11:19PM +0100, Lionel Landwerlin wrote:
> >> This fixes potential crashes when the framebuffer is unset from a
> >> given plane.
> >>
> >> Signed-off-by: Lione
== Series Details ==
Series: drm/i915: Add a way to test the modeset done during gpu reset.
URL : https://patchwork.freedesktop.org/series/5314/
State : failure
== Summary ==
Series 5314v1 drm/i915: Add a way to test the modeset done during gpu reset.
http://patchwork.freedesktop.org/api/1.0/s
On 08/03/16 13:15, Tvrtko Ursulin wrote:
On 11/01/16 09:16, Chris Wilson wrote:
If we move the release of the GEM request (i.e. decoupling it from the
various lists used for client and context tracking) after it is complete
(either by the GPU retiring the request, or by the caller cancelling t
These patches add support for Backlight Control using DPCD registers on eDP
displays.
- Patch 1 Adds macro for DPCD registers capability size to drm_dp_helper.h
- Patch 2 Reads the eDP DPCD Display Control capability registers.
- Patch 2 Implements functionaly for DPCD Backlight Control
Yetunde
This patch adds support for eDP backlight control using DPCD registers to
backlight hooks in intel_panel.
It checks for backlight control over AUX channel capability and sets up
function pointers to get and set the backlight brightness level if
supported.
v2: Moved backlight functions from intel_
This is used when reading Display Control capability Registers on the sink
device.
cc: Jani Nikula
cc: dri-de...@lists.freedesktop.org
Signed-off-by: Yetunde Adebisi
---
include/drm/drm_dp_helper.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm
Add new edp_dpcd variable to intel_dp.
Read and save eDP Display control capability registers to edp_dpcd.
Signed-off-by: Yetunde Adebisi
---
drivers/gpu/drm/i915/intel_dp.c | 15 ++-
drivers/gpu/drm/i915/intel_drv.h | 1 +
2 files changed, 11 insertions(+), 5 deletions(-)
diff --
On Tue, 05 Apr 2016, ville.syrj...@linux.intel.com wrote:
> [ text/plain ]
> From: Ville Syrjälä
>
> Actually use the builtin register spec on gen4. Makes intel_reg dump
> actually do something on gen4.
>
> Signed-off-by: Ville Syrjälä
> ---
> tools/intel_reg_decode.c | 2 +-
> 1 file changed, 1
Since we only ever use the drm_i915_private from the stored
i915_mm_struct->dev, save some electrons by storing the right
backpointer.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Cc: Michał Winiarski
Reviewed-by: Michał Winiarski
---
drivers/gpu/drm/i915/i915_gem_userptr.c | 10 +-
Holding a reference to the containing task_struct is not sufficient to
prevent the mm_struct from being reaped under memory pressure. If this
happens whilst we are calling get_user_pages(), explosions erupt -
sometimes an immediate GPF, sometimes page flag corruption. To prevent
the target mm from
On Tue, 05 Apr 2016, Animesh Manna wrote:
> To support hpd during sleep a new feature flag is
> added in vbt and also in dev_priv for enabling/disabling
> inside deiver. By default this feature will be
> diabled and based on oem request this feature can
> be enabled by changing vbt feature flag.
>
In order to ensure that all invalidations are completed before the
operation returns to userspace (i.e. before the munmap() syscall returns)
we need to wait upon the outstanding operations.
We are allowed to block inside the invalidate_range_start callback, and
as struct_mutex is the inner lock wi
On Tue, Apr 05, 2016 at 02:42:16PM +0100, Tvrtko Ursulin wrote:
> I felt was so close in getting rid of execlist_retired_req_queue,
> using this patch as a starting point, when I realised this patch
> does not play nicely with the GuC. Back to the drawing board. :(
I will also say that we need to
This patch adds support for eDP backlight control using DPCD registers to
backlight hooks in intel_panel.
It checks for backlight control over AUX channel capability and sets up
function pointers to get and set the backlight brightness level if
supported.
v2: Moved backlight functions from intel_
These patches add support for Backlight Control using DPCD registers on eDP
displays.
- Patch 1 Adds macro for DPCD registers capability size to drm_dp_helper.h
- Patch 2 Reads the eDP DPCD Display Control capability registers.
- Patch 2 Implements functionaly for DPCD Backlight Control
Yetunde
On 05/04/16 15:09, Chris Wilson wrote:
On Tue, Apr 05, 2016 at 02:42:16PM +0100, Tvrtko Ursulin wrote:
@@ -587,9 +587,6 @@ static int execlists_context_queue(struct
drm_i915_gem_request *request)
struct drm_i915_gem_request *cursor;
int num_elements = 0;
-if (request->ctx != ri
This is used when reading Display Control capability Registers on the sink
device.
cc: dri-de...@lists.freedesktop.org
Signed-off-by: Yetunde Adebisi
Reviewed-by: Jani Nikula
---
include/drm/drm_dp_helper.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/drm/drm_dp_helper.h b/includ
1 - 100 of 148 matches
Mail list logo