[Intel-gfx] DPIO Sideband Registers

2016-05-11 Thread Sanchez, AdolfoX
Hello I'm looking for information about the Sideband registers of the DPIO interface, but I have not being able to find it on the PRMs? Can anyone here provide some guidance about this? Also is there any documentation about the DPIO_CFG register? The source code mentions a file calle VLV2_Sideba

[Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: cdclk code cleanup

2016-05-11 Thread Patchwork
== Series Details == Series: drm/i915: cdclk code cleanup URL : https://patchwork.freedesktop.org/series/7038/ State : failure == Summary == Series 7038v1 drm/i915: cdclk code cleanup http://patchwork.freedesktop.org/api/1.0/series/7038/revisions/1/mbox Test drv_hangman: Subgroup erro

[Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: s/DPPL/DPLL/ for SKL DPLLs

2016-05-11 Thread Patchwork
== Series Details == Series: drm/i915: s/DPPL/DPLL/ for SKL DPLLs URL : https://patchwork.freedesktop.org/series/7034/ State : failure == Summary == Series 7034v1 drm/i915: s/DPPL/DPLL/ for SKL DPLLs http://patchwork.freedesktop.org/api/1.0/series/7034/revisions/1/mbox Test drv_hangman:

[Intel-gfx] [PATCH 05/13] drm/i915: Use ilk_max_pixel_rate() for BXT cdclk calculation

2016-05-11 Thread ville . syrjala
From: Ville Syrjälä BXT uses the "pch" panel fitter configuration, so we can use ilk_max_pixel_rate() instead of intel_mode_max_pixclk() to compute the pipe pixel rate. ilk_max_pixel_rate() will account for the pipe scaler downscaling factor whereas intel_mode_max_pixclk() will not. I'm pretty s

[Intel-gfx] [PATCH 07/13] drm/i915: Remove 10% cdclk guardband on BXT

2016-05-11 Thread ville . syrjala
From: Ville Syrjälä We don't need any pixel clock vs. cdclk guardband since HSW. BXT still tries to add one though. Get rid of it. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/

[Intel-gfx] [PATCH 12/13] drm/i915: Program BXT_CDCLK_CD2X_PIPE

2016-05-11 Thread ville . syrjala
From: Ville Syrjälä BXT could change the CD2X divider synchronized with a single pipe. So assuming the DE PLL frequency doesn't need to be changed, we could change cdclk without shutting off the pipe (when only a single pipe is enabled). In the meantime let's configure CDCLK_CTL for non-double bu

[Intel-gfx] [PATCH 06/13] drm/i915: Use skl_cdclk_decimal() on bxt

2016-05-11 Thread ville . syrjala
From: Ville Syrjälä Both SKL and BXT need to fill in the "decimal" cdclk frequency into the CDCLK_CTL register. SKL uses a small helper to do the kHz->"decimal" conversion, whereas BXT has it open-coded. Use the helper on BXT too. While at it, change it to round to closest rather than down. It d

[Intel-gfx] [PATCH 09/13] drm/i915: Kill off dead code from skl_dpll0_enable()

2016-05-11 Thread ville . syrjala
From: Ville Syrjälä We calculate the CDCLK_CTL value from scratch so no need to attempt some form of RMW first. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 5 - 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/

[Intel-gfx] [PATCH 02/13] drm/i915: Extract broadwell_calc_cdclk()

2016-05-11 Thread ville . syrjala
From: Ville Syrjälä Try to reduce the amount of duplicated cdclk magic numbers by moving the max_pixclk->cdclk conversion into a helper. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 23 ++- 1 file changed, 14 insertions(+), 9 deletions(-) diff --

[Intel-gfx] [PATCH 04/13] drm/i915: Don't pass dev_priv to broxton_calc_cdclk()

2016-05-11 Thread ville . syrjala
From: Ville Syrjälä broxton_calc_cdclk() doesn't need dev_priv for anything, so let's not bother passing it around. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_displ

[Intel-gfx] [PATCH 08/13] drm/i915: Extract skl_dpll0_disable()

2016-05-11 Thread ville . syrjala
From: Ville Syrjälä Make thins a bit easier to read by extracting the SKL DPLL0 disable into separate functions. We already have the enable counterpart. Down the line this will also help make the cdclk programming on SKL, BXT, and following platforms look rather consistent. Signed-off-by: Ville

[Intel-gfx] [PATCH 11/13] drm/i915: s/required_vco/vco/ in skl cdclk code

2016-05-11 Thread ville . syrjala
From: Ville Syrjälä The 'required' part of 'required_vco' should be obvious. Let's just call it 'vco' for brevity. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_d

[Intel-gfx] [PATCH 13/13] drm/i915: Eliminate the CDCLK_CTL RMW on BXT

2016-05-11 Thread ville . syrjala
From: Ville Syrjälä All the fields in CDCLK_CTL we don't program should be left at zero, so let's just get rid of the RMW. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 8 +--- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel

[Intel-gfx] [PATCH 01/13] drm/i915: Drop checks for max_pixclk failures in cdclk computation

2016-05-11 Thread ville . syrjala
From: Ville Syrjälä commit 565602d7501a ("drm/i915: Do not acquire crtc state to check clock during modeset, v4.") removed the possibility that intel_mode_max_pixclk() or ilk_max_pixel_rate() might return an error, so let's get rid of the error checks in the callers as well. Cc: Maarten Lankhor

[Intel-gfx] [PATCH 03/13] drm/i915: Untangle .fdi_link_train and cdclk vfunc setup

2016-05-11 Thread ville . syrjala
From: Ville Syrjälä Split the .fdi_link_train and .modeset_commit_cdclk/.modeset_calc_cdclk into two separate if ladders. Much easier to read when you're not confusing two totally separate subjects. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 13 +++-- 1 fil

[Intel-gfx] [PATCH 10/13] drm/i915: s/freq/cdclk/

2016-05-11 Thread ville . syrjala
From: Ville Syrjälä Rename the generic sounding freq/frequency parameters to the cdclk functions to 'cdclk' so that we'll know which clock we're talking about once we have to deal with the vco frequencies as well. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 44 +

[Intel-gfx] [PATCH 00/13] drm/i915: cdclk code cleanup

2016-05-11 Thread ville . syrjala
From: Ville Syrjälä Here's a bunch of cleanup, refactoring, etc. of the cdclk code. Much of this serves as prep work for a larger series I have lined up which takes Clint's SKL cdclk patch, expands on it, and then tries to unify a lot of the SKL and BXT cdclk and display core init/uninit code. Th

[Intel-gfx] [PATCH] drm/i915: s/DPPL/DPLL/ for SKL DPLLs

2016-05-11 Thread ville . syrjala
From: Ville Syrjälä SKL DPLLs shouldn't be called DPPLs. Cc: Ander Conselvan de Oliveira Fixes: 2edd6443e3d0 ("drm/i915: Use a table to initilize shared dplls") Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_dpll_mgr.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)

[Intel-gfx] [PATCH i-g-t 2/2] lib/igt_aux: Polish docs for igt_timeout

2016-05-11 Thread Daniel Vetter
Add docs, rename parameter and rename the macro to igt_do_timeout to make it clear it works like a loop. Signed-off-by: Daniel Vetter --- lib/igt_aux.h | 14 -- tests/gem_close_race.c | 2 +- tests/gem_exec_flush.c | 4 ++-- tests/gem_shrink.c | 6 +++--- 4 files chan

[Intel-gfx] [PATCH i-g-t 1/2] lib/igt_aux: Polish docs for igt_interruptible

2016-05-11 Thread Daniel Vetter
- Give __ prefix to internal funcstion and structs, only igt_interruptible is used by tests. - Move docs to igt_interruptible and adjust. - Explain more clearly how the timeout is getting doubled each iteration until no more interruptions happen. Also rename the argument to give it a more m

[Intel-gfx] ✗ Ro.CI.BAT: failure for Pre-calculate SKL-style atomicwatermarks (rev2)

2016-05-11 Thread Patchwork
== Series Details == Series: Pre-calculate SKL-style atomicwatermarks (rev2) URL : https://patchwork.freedesktop.org/series/6944/ State : failure == Summary == Applying: drm/i915: Reorganize WM structs/unions in CRTC state Applying: drm/i915: Rename s/skl_compute_pipe_wm/skl_build_pipe_wm/ App

[Intel-gfx] [PATCH v4 08/17] drm/i915: Add distrust_bios_wm flag to dev_priv (v2)

2016-05-11 Thread Matt Roper
SKL-style platforms can't fully trust the watermark/DDB settings programmed by the BIOS and need to do extra sanitization on their first atomic update. Add a flag to dev_priv that is set during hardware readout and cleared at the end of the first commit. Note that for the somewhat common case whe

Re: [Intel-gfx] [PATCH i-g-t 1/2] lib/igt_aux: update encoder and type names

2016-05-11 Thread Marius Vlad
Pushed. Thanks! On Wed, May 11, 2016 at 12:42:05PM +0300, Jani Nikula wrote: > Virtual, DSI, DP MST. > > Signed-off-by: Jani Nikula > --- > lib/igt_aux.c | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/lib/igt_aux.c b/lib/igt_aux.c > index 68c9fba1628b..5dbbe4dd4a85 100644 > --- a

Re: [Intel-gfx] [PATCH v4 08/17] drm/i915: Add distrust_bios_wm flag to dev_priv

2016-05-11 Thread Matt Roper
On Wed, May 11, 2016 at 12:38:36PM +0200, Maarten Lankhorst wrote: > Op 10-05-16 om 03:21 schreef Matt Roper: > > SKL-style platforms can't fully trust the watermark/DDB settings > > programmed by the BIOS and need to do extra sanitization on their first > > atomic update. Add a flag to dev_priv t

Re: [Intel-gfx] [PATCH i-g-t v4 5/5] lib/igt_kms: Added pipe_id_to_vbl_flag() to igt_kms.

2016-05-11 Thread Robert Foss
On 2016-05-11 09:45 AM, Robert Foss wrote: On 2016-05-10 03:44 AM, Daniel Vetter wrote: On Tue, Apr 26, 2016 at 11:54:22AM -0400, robert.f...@collabora.com wrote: From: Robert Foss Added function pipe_id_to_vbl_flag() to igt_kms. This function formats a pipe_id into the format expected by

Re: [Intel-gfx] [PATCH v2] drm/i915: Mark all objects as having being written to following hibernation

2016-05-11 Thread Imre Deak
On Wed, 2016-04-20 at 20:00 +0100, Chris Wilson wrote: > During hibernation, all objects will have had their page contents > written to disk and then restored upon resume. This means that every > page will be dirty and we need to treat all objects as being in the CPU > domain and require their cont

[Intel-gfx] [PULL] drm-intel-fixes

2016-05-11 Thread Jani Nikula
Hi Dave, final fixes for v4.6. BR, Jani. The following changes since commit 4ea3959018d09edfa36a9e7b5ccdbd4ec4b99e49: drm/i915: Make RPS EI/thresholds multiple of 25 on SNB-BDW (2016-04-27 10:57:00 +0300) are available in the git repository at: git://anongit.freedesktop.org/drm-intel tag

Re: [Intel-gfx] [PATCH i-g-t v4 5/5] lib/igt_kms: Added pipe_id_to_vbl_flag() to igt_kms.

2016-05-11 Thread Robert Foss
On 2016-05-10 01:54 PM, Ville Syrjälä wrote: On Tue, Apr 26, 2016 at 11:54:22AM -0400, robert.f...@collabora.com wrote: From: Robert Foss Added function pipe_id_to_vbl_flag() to igt_kms. This function formats a pipe_id into the format expected by DRM while processing DRM_IOCTL_WAIT_VBLANK.

Re: [Intel-gfx] [PATCH i-g-t v4 5/5] lib/igt_kms: Added pipe_id_to_vbl_flag() to igt_kms.

2016-05-11 Thread Robert Foss
On 2016-05-10 03:44 AM, Daniel Vetter wrote: On Tue, Apr 26, 2016 at 11:54:22AM -0400, robert.f...@collabora.com wrote: From: Robert Foss Added function pipe_id_to_vbl_flag() to igt_kms. This function formats a pipe_id into the format expected by DRM while processing DRM_IOCTL_WAIT_VBLANK.

Re: [Intel-gfx] [PATCH i-g-t v2] tests/kms_flip: Adjust tolerance when counting frames

2016-05-11 Thread Gabriel Feceoru
On 10.05.2016 18:39, Jani Nikula wrote: On Tue, 10 May 2016, Gabriel Feceoru wrote: If count == 100 and expected == 99 this condition fails (99*101/100 = 99.99). (v2): Increased the tolerance range, as suggested by Jani. Cc: Jani Nikula Cc: Daniel Vetter Signed-off-by: Gabriel Feceoru --

Re: [Intel-gfx] [PATCH] drm/i915: Use bitmask for IS_REVID checking

2016-05-11 Thread Jani Nikula
On Tue, 10 May 2016, Tvrtko Ursulin wrote: > Hi, > > On 10/05/16 14:33, Jani Nikula wrote: >> On Tue, 10 May 2016, Tvrtko Ursulin wrote: >>> From: Tvrtko Ursulin >>> >>> With this scheme all call sites of IS_SKL_REVID and IS_BXT_REVID >>> result in a maximum of one conditional jump instruction (

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Introduce IS_GEN macro

2016-05-11 Thread Joonas Lahtinen
On ti, 2016-05-10 at 10:57 +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > To be used for more efficient Gen range checking. > > v2: Remove spurious chunk. (Chris Wilson) > v3: Rebase. > v4: Renamed from INTEL_GEN_RANGE and added GEN_FOREVER. > > Signed-off-by: Tvrtko Ursulin > Reviewe

Re: [Intel-gfx] ✓ Ro.CI.BAT: success for series starting with [1/5] drm/i915: Make IS_GENx macros work on a mask

2016-05-11 Thread Tvrtko Ursulin
On 10/05/16 20:53, Patchwork wrote: == Series Details == Series: series starting with [1/5] drm/i915: Make IS_GENx macros work on a mask URL : https://patchwork.freedesktop.org/series/6960/ State : success == Summary == Series 6960v1 Series without cover letter http://patchwork.freedesktop.o

Re: [Intel-gfx] [PATCH] drm/i915: add missing condition for committing planes on crtc

2016-05-11 Thread Maarten Lankhorst
Op 09-05-16 om 16:40 schreef Lionel Landwerlin: > We are currently missing the color management update condition to > commit planes on crtc. > > v2: add comment about moving the commit of color management registers > to an async worker > > v3: Commit color management register right after vblank

Re: [Intel-gfx] [PATCH v4 08/17] drm/i915: Add distrust_bios_wm flag to dev_priv

2016-05-11 Thread Maarten Lankhorst
Op 10-05-16 om 03:21 schreef Matt Roper: > SKL-style platforms can't fully trust the watermark/DDB settings > programmed by the BIOS and need to do extra sanitization on their first > atomic update. Add a flag to dev_priv that is set during hardware > readout and cleared at the end of the first co

[Intel-gfx] [PATCH] drm: use seqlock for vblank time/count

2016-05-11 Thread Matthew Auld
This patch aims to replace the roll-your-own seqlock implementation with full-blown seqlock'. We also remove the timestamp ring-buffer in favour of single timestamp/count pair protected by a seqlock. In turn this means we can now increment the vblank freely without the need for clamping. v2: - r

[Intel-gfx] [PATCH i-g-t 1/2] lib/igt_aux: update encoder and type names

2016-05-11 Thread Jani Nikula
Virtual, DSI, DP MST. Signed-off-by: Jani Nikula --- lib/igt_aux.c | 5 + 1 file changed, 5 insertions(+) diff --git a/lib/igt_aux.c b/lib/igt_aux.c index 68c9fba1628b..5dbbe4dd4a85 100644 --- a/lib/igt_aux.c +++ b/lib/igt_aux.c @@ -957,6 +957,9 @@ struct type_name encoder_type_names[] = {

[Intel-gfx] [PATCH i-g-t 2/2] lib/igt_aux: define actual functions for kmstest_*_str

2016-05-11 Thread Jani Nikula
Macro generated function definitions considered harmful. You can't find them with code search tools or grep. There may be places where such things might be useful, but this is not it. Define actual functions for kmstest_encoder_type_str(), kmstest_connector_status_str() and kmstest_connector_type_

Re: [Intel-gfx] [PATCH] drm/i915/dmc: Step away from symbolic links

2016-05-11 Thread Mika Kuoppala
Jani Nikula writes: > [ text/plain ] > On Tue, 10 May 2016, Patrik Jakobsson > wrote: >> On Tue, May 10, 2016 at 03:52:02PM +0300, Mika Kuoppala wrote: >>> Patrik Jakobsson writes: >>> >>> > [ text/plain ] >>> > Load specific firmware versions for the DMC instead of using symbolic >>> > links

Re: [Intel-gfx] [PATCH 15/19] drm/i915: Prepare MST connector removal for async unpin.

2016-05-11 Thread Patrik Jakobsson
On Tue, Apr 19, 2016 at 09:52:35AM +0200, Maarten Lankhorst wrote: > check_connector_state might get called from unpin_work, which means verify_connector_state and not check_connector_state? Otherwise looks good Reviewed-by: Patrik Jakobsson > that the mst removal function has to flush it, and

Re: [Intel-gfx] [PATCH 14/19] drm/i915: Pass atomic states to fbc update functions.

2016-05-11 Thread Patrik Jakobsson
On Tue, Apr 19, 2016 at 09:52:34AM +0200, Maarten Lankhorst wrote: > This is required to let fbc updates run async. It has a lot of > checks whether certain locks are taken, which can be removed when > the relevant states are passed in as pointers. > > Signed-off-by: Maarten Lankhorst Reviewed-b

Re: [Intel-gfx] [PATCHv4 3/3] drm/i915/dp: Enable Upfront link training for typeC DP support on BXT

2016-05-11 Thread Ander Conselvan De Oliveira
On Mon, 2016-05-09 at 10:43 +, R, Durgadoss wrote: > Hi Ander, > > Thanks for looking at it. > Few queries below.. > > > > > -Original Message- > > From: Ander Conselvan De Oliveira [mailto:conselv...@gmail.com] > > Sent: Friday, May 6, 2016 6:39 PM > > To: R, Durgadoss ; intel-gfx@l

Re: [Intel-gfx] [PATCH 13/19] drm/i915: Remove queue_flip pointer.

2016-05-11 Thread Patrik Jakobsson
On Tue, Apr 19, 2016 at 09:52:33AM +0200, Maarten Lankhorst wrote: > With the removal of cs support this is no longer reachable. > Can be revived if needed. > > Signed-off-by: Maarten Lankhorst Reviewed-by: Patrik Jakobsson > --- > drivers/gpu/drm/i915/i915_drv.h | 5 - > drivers/gpu/d

Re: [Intel-gfx] [PATCH 12/19] drm/i915: Remove use_mmio_flip kernel parameter.

2016-05-11 Thread Patrik Jakobsson
On Tue, Apr 19, 2016 at 09:52:32AM +0200, Maarten Lankhorst wrote: > With the removal of cs flips this is always force enabled. > > Signed-off-by: Maarten Lankhorst Reviewed-by: Patrik Jakobsson > --- > drivers/gpu/drm/i915/i915_params.c | 5 - > drivers/gpu/drm/i915/i915_params.h | 1 - >

[Intel-gfx] [PATCH v3 1/2] drm/i915: Fix modeset handling during gpu reset, v4.

2016-05-11 Thread Maarten Lankhorst
Op 10-05-16 om 09:48 schreef Daniel Vetter: > On Mon, May 09, 2016 at 03:54:15PM +0300, Ville Syrjälä wrote: >> On Mon, May 09, 2016 at 01:04:21PM +0200, Maarten Lankhorst wrote: >>> This function would call drm_modeset_lock_all, while the suspend/resume >>> functions already have their own locking

Re: [Intel-gfx] [PATCH 27/35] drm/tegra: Use lockless gem BO free callback

2016-05-11 Thread Daniel Vetter
On Tue, May 10, 2016 at 03:33:00PM +0200, Thierry Reding wrote: > On Tue, Apr 26, 2016 at 07:30:00PM +0200, Daniel Vetter wrote: > > No dev->struct_mutex anywhere to be seen. > > > > Cc: Thierry Reding > > Cc: Terje Bergström > > Cc: linux-te...@vger.kernel.org > > Signed-off-by: Daniel Vetter