On Wed, 18 May 2016, "Sanchez, AdolfoX" wrote:
> A customer of mine decided to work with a modified DP port with only
> two lanes and is facing issues. I guess modifying the suggested
> values might be useful at O.S leve, however I was wondering if
> modifyint the register that I mentioned earli
== Series Details ==
Series: drm/i915: Additional PSR stuff
URL : https://patchwork.freedesktop.org/series/7360/
State : failure
== Summary ==
Applying: drm/dp: Add drm_dp_psr_setup_time()
Applying: drm/i915: Check PSR setup time vs. vblank length
Applying: drm/dp: Add drm_dp_psr_need_train_on
From: Robert Foss
Change igt_wait_for_vblank() to use kmstest_get_vbl_flag() helper function.
Signed-off-by: Robert Foss
---
lib/igt_kms.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/lib/igt_kms.c b/lib/igt_kms.c
index 0e781ef..9ca204c 100644
--- a/lib/igt_kms.c
+
From: Robert Foss
Fix issue where the plane counting fails due to the number and
configuration of planes being unlike the intel configuration.
Signed-off-by: Robert Foss
---
lib/igt_kms.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/lib/igt_kms.c b/lib/igt_kms.c
in
From: Robert Foss
Increase the number of planes supported to 10.
kmstest_plane_name only previously supported 4 planes,
this patch adds support for up to 10 planes.
Signed-off-by: Robert Foss
---
lib/igt_kms.c | 6 ++
lib/igt_kms.h | 8 +++-
2 files changed, 13 insertions(+), 1 deleti
From: Robert Foss
Changes since v1:
- kms_vblank: Removed un-used members of data_t struct.
- Rename plane_counter to n_planes.
- Removed un-needed handling CURSOR plane location.
- Added names for additional planes in update kmstest_plane_name.
Changes since v2:
- Rebased onto trunk which alrea
From: Robert Foss
Change __wait_for_vblank() to use kmstest_get_vbl_flag() helper function.
Signed-off-by: Robert Foss
---
tests/kms_flip.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/tests/kms_flip.c b/tests/kms_flip.c
index 6ec97d0..b3fcb40 100644
--- a/tests/
From: Robert Foss
Switch igt_assert to igt_assert_lte to provide more diagnostic
information.
Signed-off-by: Robert Foss
---
lib/igt_kms.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/igt_kms.c b/lib/igt_kms.c
index 1dc2521..1113f57 100644
--- a/lib/igt_kms.c
+++ b/l
From: Robert Foss
Added function kmstest_get_vbl_flag() to igt_kms.
This function formats a pipe_id into the format
expected by DRM while processing DRM_IOCTL_WAIT_VBLANK.
Signed-off-by: Robert Foss
---
lib/igt_kms.c | 19 +++
lib/igt_kms.h | 1 +
2 files changed, 20 insertion
From: Robert Foss
Previously crtc0 was statically used for VBLANK tests, but
that assumption is not valid for the VC4 platform.
Instead we're now explicitly setting the mode.
Also add support for testing all connected connectors during
the same test.
Signed-off-by: Robert Foss
---
tests/kms_v
On Tue, May 17, 2016 at 03:08:02PM +0200, Maarten Lankhorst wrote:
> This reapplies commit acf4e84d6167317ff21be5c03e1ea76ea5783701.
> With async unpin this should no longer break.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/i915/intel_display.c
On Tue, May 17, 2016 at 03:07:59PM +0200, Maarten Lankhorst wrote:
> This is required to let fbc updates run async. It has a lot of
> checks whether certain locks are taken, which can be removed when
> the relevant states are passed in as pointers.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-b
On Tue, May 17, 2016 at 03:07:58PM +0200, Maarten Lankhorst wrote:
> With the removal of cs-based flips all mmio waits will
> finish without requiring the reset counter, because the
> waits will complete during gpu reset.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Patrik Jakobsson
> ---
SKL+ really means "Gen9 onwards" in bspec terminology, so it includes BXT, KBL,
etc.
I don't remember why this one is not labeled as a workaround in PSR2_CTL. It
is listed in the bspec workaround table. In general everything is going in the
table now, not in the associated registers. I'll sen
On Wed, May 18, 2016 at 4:29 PM, Daniel Vetter wrote:
> This was added in
>
> commit 0a3e67a4caac273a3bfc4ced3da364830b1ab241
> Author: Jesse Barnes
> Date: Tue Sep 30 12:14:26 2008 -0700
>
> drm: Rework vblank-wait handling to allow interrupt reduction.
>
> to stay backwards-compatible wit
From: Lyude Paul
DRM does not always update the status of each connector during a
hotplug event, and it's generally expected that userspace is supposed to
handle that by reprobing. This happens in a couple situations:
suspend/resume, MST hotplugs, and probably a few others. As a result,
making th
On 5/18/16 2:08 AM, Ville Syrjälä wrote:
On Tue, May 17, 2016 at 07:09:58PM -0500, Pierre-Louis Bossart wrote:
On 05/17/2016 01:16 PM, Ville Syrjälä wrote:
On Tue, May 17, 2016 at 01:00:13PM -0500, Pierre-Louis Bossart wrote:
Hi,
I was porting the HDMI audio patch to 4.6 as a service to seve
On Tue, May 17, 2016 at 03:07:57PM +0200, Maarten Lankhorst wrote:
> With the removal of cs support this is no longer reachable.
> Can be revived if needed.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/i915/i915_drv.h | 5 -
> drivers/gpu/d
On Tue, May 17, 2016 at 03:07:56PM +0200, Maarten Lankhorst wrote:
> With the removal of cs flips this is always force enabled.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/i915/i915_params.c | 5 -
> drivers/gpu/drm/i915/i915_params.h | 1 -
>
On Tue, May 17, 2016 at 03:07:55PM +0200, Maarten Lankhorst wrote:
> With mmio flips now available on all platforms it's time to remove
> support for cs flips.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 19 +-
> drivers/g
This was added in
commit 0a3e67a4caac273a3bfc4ced3da364830b1ab241
Author: Jesse Barnes
Date: Tue Sep 30 12:14:26 2008 -0700
drm: Rework vblank-wait handling to allow interrupt reduction.
to stay backwards-compatible with old UMS code that didn't even tell
the kernel when it did a modeset,
On Wed, May 18, 2016 at 3:47 PM, Daniel Vetter wrote:
> This was added in
>
> commit 0a3e67a4caac273a3bfc4ced3da364830b1ab241
> Author: Jesse Barnes
> Date: Tue Sep 30 12:14:26 2008 -0700
>
> drm: Rework vblank-wait handling to allow interrupt reduction.
>
> to stay backwards-compatible wit
Hi Dave,
Update drm-misc pull with a few more fixes included, plus the two from
Arnd for the fallout from the drm_gem_object_lookup() refactor that I
failed to spot :(
Cheers, Daniel
The following changes since commit 99ee87295017e36abb6925e6139ca303cb55aee7:
Merge tag 'topic/drm-misc-2016-0
This was added in
commit 0a3e67a4caac273a3bfc4ced3da364830b1ab241
Author: Jesse Barnes
Date: Tue Sep 30 12:14:26 2008 -0700
drm: Rework vblank-wait handling to allow interrupt reduction.
to stay backwards-compatible with old UMS code that didn't even tell
the kernel when it did a modeset,
Thanks Jani
A customer of mine decided to work with a modified DP port with only two lanes
and is facing issues.
I guess modifying the suggested values might be useful at O.S leve, however I
was wondering if modifyint the register that I mentioned earlier in the VBIOS
would accomplish the same
On Wed, May 18, 2016 at 09:34:22PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Determine the value of psr.link_standby at runtime rather than at init
> time. This helps in testing since you can change between link-off and
> link-standby at runtime.
>
> Signed-off-by: Vi
On Wed, May 18, 2016 at 09:34:21PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> The sink can tell us if link training needs to be performed when
> exiting PSR main-link off mode. Currently we get that information
> from the VBT, but at least on my HSW the VBT says one thi
On Wed, May 18, 2016 at 8:22 PM, Ville Syrjälä
wrote:
> On Wed, May 18, 2016 at 06:47:16PM +0200, Daniel Vetter wrote:
>> Found this while browsing Bspec. Looks like it applies to both skl and
>> kbl.
>
> BXT too perhaps. Actually PSR2_CTL says SKL+, but CHICKEN_MISC_1 seems
> to say SKL only.
>
>
From: Ville Syrjälä
The sink can tell us if link training needs to be performed when
exiting PSR main-link off mode. Currently we get that information
from the VBT, but at least on my HSW the VBT says one thing, the sink
another. And in practice the sink doesn't seem to notice any screen
updates
From: Ville Syrjälä
Add a small helper to parse from the DPCD whether link training
is required when exiting PSR main-link off mode.
Cc: Daniel Vetter
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_dp_helper.c | 14 ++
include/drm/drm_dp_helper.h | 1 +
2 files changed,
From: Ville Syrjälä
Bspec says:
"Restriction : SRD must not be enabled when the PSR Setup time from DPCD
00071h is greater than the time for vertical blank minus one line."
Let's check for that and disallow PSR if we exceed the limit.
Cc: Daniel Vetter
Reviewed-by: Daniel Vetter
Signed-off-by
From: Ville Syrjälä
Determine the value of psr.link_standby at runtime rather than at init
time. This helps in testing since you can change between link-off and
link-standby at runtime.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_psr.c | 41 -
From: Ville Syrjälä
Some more PSR stuff. Some of this depends on Daniel's PSR fixes [1].
The most important thing here for my HSW HSB machine is the
drm_dp_psr_need_train_on_exit() check, since apparently the VBT on that
thing is no good.
[1] https://lists.freedesktop.org/archives/intel-gfx/201
From: Ville Syrjälä
Add a small helper to parse the PSR setup time from the DPCD PSR
capabilities and return the value in microseconds.
Cc: Daniel Vetter
Reviewed-by: Daniel Vetter
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_dp_helper.c | 28
include/drm
On Wed, May 18, 2016 at 06:47:16PM +0200, Daniel Vetter wrote:
> Found this while browsing Bspec. Looks like it applies to both skl and
> kbl.
BXT too perhaps. Actually PSR2_CTL says SKL+, but CHICKEN_MISC_1 seems
to say SKL only.
w/a db is having issues it seems, so I can't check if there's anyt
On Wed, May 18, 2016 at 06:47:10PM +0200, Daniel Vetter wrote:
> The definitions for the error register should be valid on bdw/skl too,
> but there we haven't even enabled DE_MISC handling yet.
>
> Somewhat confusing the the moved register offset on bdw is only for
> the _CTL/_AUX register, and th
On Wed, May 18, 2016 at 08:04:02PM +0200, Daniel Vetter wrote:
> On Wed, May 18, 2016 at 7:39 PM, Ville Syrjälä
> wrote:
> > On Wed, May 18, 2016 at 06:47:11PM +0200, Daniel Vetter wrote:
> >> Oops. Hw default for programming these fields to 0 is "skip link
> >> training". Display won't take that
On Wed, May 18, 2016 at 7:39 PM, Ville Syrjälä
wrote:
> On Wed, May 18, 2016 at 06:47:11PM +0200, Daniel Vetter wrote:
>> Oops. Hw default for programming these fields to 0 is "skip link
>> training". Display won't take that too well usually.
>
> s/skip/500 usec/
Yeah, my reading skills have reac
On Wed, May 18, 2016 at 06:47:15PM +0200, Daniel Vetter wrote:
> I just wanted to get rid of the rmw cycle for gen9, but this also
> fixes some bugs we haven't carried over, like using recommended
> precharge and timeout values.
>
> Also I noticed that we don't set the fastwake sync length on skl,
On Wed, May 18, 2016 at 06:47:14PM +0200, Daniel Vetter wrote:
> On bdw/hsw we have a separate psr dp aux registers to set up, but on
> bdw it's shared with the main dp aux thing. Which means any subsequent
> dp aux transaction will trample over it, and hence must be done
> beforehand.
>
> Also th
On Wed, May 18, 2016 at 06:47:13PM +0200, Daniel Vetter wrote:
> Not sure we can trust VBT on this one, but let's try.
>
> Cc: Rodrigo Vivi
> Cc: Sonika Jindal
> Cc: Durgadoss R
> Cc: "Pandiyan, Dhinakaran"
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/intel_psr.c | 3 +++
> 1
On Wed, May 18, 2016 at 06:47:12PM +0200, Daniel Vetter wrote:
> This reverts
>
> commit dfaf37baa07513d2c37afff79978807d2d10221a
> Author: Rodrigo Vivi
> Date: Mon Dec 7 14:45:20 2015 -0800
>
> drm/i915: Fix idle_frames counter.
>
> and
>
> commit 97173eaf5f33b1e85efdb06d593d333480b60bf
On Wed, May 18, 2016 at 06:47:11PM +0200, Daniel Vetter wrote:
> Oops. Hw default for programming these fields to 0 is "skip link
> training". Display won't take that too well usually.
s/skip/500 usec/
>
> v2: Unbotch the math a bit.
>
> v3: Drop debug hunk.
>
> Tested-by: Lyude
> Cc: Lyude
== Series Details ==
Series: series starting with [1/7] drm/i915: Enable edp psr error interrupts on
hsw
URL : https://patchwork.freedesktop.org/series/7357/
State : failure
== Summary ==
Series 7357v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/7357/revisions/
Not sure we can trust VBT on this one, but let's try.
Cc: Rodrigo Vivi
Cc: Sonika Jindal
Cc: Durgadoss R
Cc: "Pandiyan, Dhinakaran"
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/intel_psr.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/driv
I just wanted to get rid of the rmw cycle for gen9, but this also
fixes some bugs we haven't carried over, like using recommended
precharge and timeout values.
Also I noticed that we don't set the fastwake sync length on skl, and
that's used by PSR2 selective updates. Fix that.
Cc: Rodrigo Vivi
The definitions for the error register should be valid on bdw/skl too,
but there we haven't even enabled DE_MISC handling yet.
Somewhat confusing the the moved register offset on bdw is only for
the _CTL/_AUX register, and that _IIR/IMR stayed where they have been
on bdw.
v2: Fixes from Ville.
v
Found this while browsing Bspec. Looks like it applies to both skl and
kbl.
Cc: Rodrigo Vivi
Cc: Sonika Jindal
Cc: Durgadoss R
Cc: "Pandiyan, Dhinakaran"
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 13 +++--
2 files chang
Oops. Hw default for programming these fields to 0 is "skip link
training". Display won't take that too well usually.
v2: Unbotch the math a bit.
v3: Drop debug hunk.
Tested-by: Lyude
Cc: Lyude
Cc: sta...@vger.kernel.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95176
Cc: Rodrigo
This reverts
commit dfaf37baa07513d2c37afff79978807d2d10221a
Author: Rodrigo Vivi
Date: Mon Dec 7 14:45:20 2015 -0800
drm/i915: Fix idle_frames counter.
and
commit 97173eaf5f33b1e85efdb06d593d333480b60bf3
Author: Rodrigo Vivi
Date: Tue Jul 7 16:28:55 2015 -0700
drm/i915: PSR: Inc
On bdw/hsw we have a separate psr dp aux registers to set up, but on
bdw it's shared with the main dp aux thing. Which means any subsequent
dp aux transaction will trample over it, and hence must be done
beforehand.
Also this means we can't do any dp aux transactions while PSR is
active, or at lea
There's an updated version of this patch already on the ml [1], which
I Cc'd you in on. I take it that your @tuebingen.mpg.de is in fact an
old email address?
[1] https://patchwork.freedesktop.org/patch/86354/
___
Intel-gfx mailing list
Intel-gfx@lists.f
On Tue, May 17, 2016 at 03:07:53PM +0200, Maarten Lankhorst wrote:
> Set plane_state->base.fence to the dma_buf exclusive fence,
> and add a wait to the mmio function. This will make it easier
> to unify plane updates later on.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Patrik Jakobsson
On 05/09/2016 08:11 PM, Daniel Vetter wrote:
On Mon, May 09, 2016 at 08:16:07PM +0300, Ville Syrjälä wrote:
On Mon, May 09, 2016 at 05:08:43PM +0100, Matthew Auld wrote:
This patch aims to replace the roll-your-own seqlock implementation with
full-blown seqlock'. We also remove the timestamp ri
On Wed, May 18, 2016 at 12:37:31PM +0300, Gabriel Feceoru wrote:
>
>
> On 17.05.2016 15:12, Marius Vlad wrote:
> >An attempt to have piglit not taking too much time when listing tests,
> >but also keep tests/gem_concurrent_blit into list of tests.
> >
> >This was added in a633ad03c6 (tests: Separ
On Tue, May 17, 2016 at 03:07:52PM +0200, Maarten Lankhorst wrote:
> This will be required to allow more than 1 update in the future.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Patrik Jakobsson
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 90 +++--
> drivers/gpu/drm/
On Wed, May 18, 2016 at 02:31:28PM +0100, Tvrtko Ursulin wrote:
>
> On 18/05/16 13:22, Chris Wilson wrote:
> >Advantage: we avoid the clflush after every update
> >Disadvantage: we invoke set_memory_*() on every page used by the ppggtt.
> >(To reduce that cost, I have in made keeping a pagevec cac
On Thu, May 12, 2016 at 01:58:07PM +0100, Lionel Landwerlin wrote:
> Signed-off-by: Lionel Landwerlin
> ---
> lib/igt_kms.c | 10 --
> 1 file changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/lib/igt_kms.c b/lib/igt_kms.c
> index 4da645a..795ecb0 100644
> --- a/lib/igt_kms.c
> ++
I'm fine with it. I assume the function will only be used by kms
drivers, whose writers probably know when it is safe to call the
function, ie. what kind of potential quirks the kms drivers timestamping
implementation has.
Reviewed-by: Mario Kleiner
On 05/17/2016 03:07 PM, Maarten Lankhorst
On 18/05/16 13:22, Chris Wilson wrote:
On Wed, May 18, 2016 at 01:06:06PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Rather than asking itself "am I a Broadwell, am I a Cherryview,
or am I neither of the two" on on low level page table operations,
like inserting and clearing PTEs; add
Op 18-05-16 om 14:49 schreef John Harrison:
> On 18/05/2016 13:22, Maarten Lankhorst wrote:
>> Op 13-05-16 om 11:16 schreef John Harrison:
>>> On 13/05/2016 08:39, Chris Wilson wrote:
On Thu, May 12, 2016 at 10:06:31PM +0100, john.c.harri...@intel.com wrote:
> From: John Harrison
>
>>
== Series Details ==
Series: drm/i915: Add ppgtt->kunmap_page_dma vfunc (rev2)
URL : https://patchwork.freedesktop.org/series/7296/
State : failure
== Summary ==
Series 7296v2 drm/i915: Add ppgtt->kunmap_page_dma vfunc
http://patchwork.freedesktop.org/api/1.0/series/7296/revisions/2/mbox
Test
On 18/05/2016 13:22, Maarten Lankhorst wrote:
Op 13-05-16 om 11:16 schreef John Harrison:
On 13/05/2016 08:39, Chris Wilson wrote:
On Thu, May 12, 2016 at 10:06:31PM +0100, john.c.harri...@intel.com wrote:
From: John Harrison
The fence object used inside the request structure requires a sequ
On Wed, May 18, 2016 at 05:19:47PM +0530, Pratik Vishwakarma wrote:
> From: pvishwak
>
> Modified tests to follow COMMIT_ATOMIC path if ATOMIC support is
> available from driver. If ATOMIC support is not present, tests
> will follow COMMIT_UNIVERSAL path.
>
> Signed-off-by: Pratik Vishwakarma
Op 13-05-16 om 11:16 schreef John Harrison:
> On 13/05/2016 08:39, Chris Wilson wrote:
>> On Thu, May 12, 2016 at 10:06:31PM +0100, john.c.harri...@intel.com wrote:
>>> From: John Harrison
>>>
>>> The fence object used inside the request structure requires a sequence
>>> number. Although this is n
On Wed, May 18, 2016 at 01:06:06PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Rather than asking itself "am I a Broadwell, am I a Cherryview,
> or am I neither of the two" on on low level page table operations,
> like inserting and clearing PTEs; add a new vfunc kunmap_page_dma
> and
From: Tvrtko Ursulin
Rather than asking itself "am I a Broadwell, am I a Cherryview,
or am I neither of the two" on on low level page table operations,
like inserting and clearing PTEs; add a new vfunc kunmap_page_dma
and set it to appropriate flavour at ppgtt init time.
v2: Fix platfrom conditi
On 18/05/16 12:53, Daniele Ceraolo Spurio wrote:
On 17/05/16 14:34, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Rather than asking itself "am I a Broadwell, am I a Cherryview,
or am I neither of the two" on on low level page table operations,
like inserting and clearing PTEs; add a new vfunc
On Tue, May 17, 2016 at 03:07:51PM +0200, Maarten Lankhorst wrote:
> With intel_pipe_update begin/end we ensure that the mmio updates
> don't run during vblank interrupt, using the hw counter we can
> be sure that when current vblank count != vblank count at the time
> of pipe_update_end the mmio u
On 17/05/16 14:34, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Rather than asking itself "am I a Broadwell, am I a Cherryview,
or am I neither of the two" on on low level page table operations,
like inserting and clearing PTEs; add a new vfunc kunmap_page_dma
and set it to appropriate flavour
On Tue, May 17, 2016 at 03:07:50PM +0200, Maarten Lankhorst wrote:
> This reverts commit acf4e84d6167317ff21be5c03e1ea76ea5783701.
> Unfortunately this breaks the next commit with a use-after-free, so
> temporarily revert until we can apply a solution.
>
> Signed-off-by: Maarten Lankhorst
Review
On 18/05/16 12:10, Dave Gordon wrote:
On 17/05/16 17:03, Patchwork wrote:
== Series Details ==
Series: drm/i915/bxt: reserve space for RC6 in the the GuC WOPCM
URL : https://patchwork.freedesktop.org/series/7300/
State : failure
== Summary ==
Series 7300v1 drm/i915/bxt: reserve space for R
On Tue, May 17, 2016 at 03:07:49PM +0200, Maarten Lankhorst wrote:
> Rename intel_unpin_work to intel_flip_work and use it for mmio flips
> and unpinning. Use flip_queued_req to hold the wait request in the
> mmio case, and the vblank counter from intel_crtc_get_vblank_counter.
>
> MMIO flips get
From: pvishwak
Modified tests to follow COMMIT_ATOMIC path if ATOMIC support is
available from driver. If ATOMIC support is not present, tests
will follow COMMIT_UNIVERSAL path.
Signed-off-by: Pratik Vishwakarma
---
tests/kms_plane_scaling.c | 33 +
1 file chang
On 17/05/16 09:19, Zhi Wang wrote:
This patch introduces the very basic framework of GVT-g device model,
includes basic prototypes, definitions, initialization.
v5:
Take Tvrtko's comments:
- Fix the misspelled words in Kconfg
- Let functions take drm_i915_private * instead of struct drm_device
On Wed, May 18, 2016 at 02:07:53PM +0300, Mika Kuoppala wrote:
> Chris Wilson writes:
>
> > [ text/plain ]
> > On Tue, May 17, 2016 at 06:43:23PM +0300, Mika Kuoppala wrote:
> >> Promising 1us accuracy where we timeout using jiffies is
> >> misleading. Convert the _wait_for macro to use milliseco
On Tue, May 17, 2016 at 06:43:28PM +0300, Mika Kuoppala wrote:
> Warn if we timeout on waiting register or other condition.
>
> Signed-off-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_drv.h | 25 -
> drivers/gpu/drm/i915/intel_drv.h| 10 +-
> driver
Chris Wilson writes:
> [ text/plain ]
> On Wed, May 18, 2016 at 10:20:22AM +0200, Daniel Vetter wrote:
>> On Tue, May 17, 2016 at 06:43:24PM +0300, Mika Kuoppala wrote:
>> > Usually the condition we are after appears within very short time.
>> > Spin few times before going into sleep. With this a
Chris Wilson writes:
> [ text/plain ]
> On Tue, May 17, 2016 at 06:43:23PM +0300, Mika Kuoppala wrote:
>> Promising 1us accuracy where we timeout using jiffies is
>> misleading. Convert the _wait_for macro to use milliseconds
>> and convert the 2 callsites.
>
> Note this is not about timeout but
On 17/05/16 17:03, Patchwork wrote:
== Series Details ==
Series: drm/i915/bxt: reserve space for RC6 in the the GuC WOPCM
URL : https://patchwork.freedesktop.org/series/7300/
State : failure
== Summary ==
Series 7300v1 drm/i915/bxt: reserve space for RC6 in the the GuC WOPCM
http://patchwork
On Tue, May 17, 2016 at 03:07:48PM +0200, Maarten Lankhorst wrote:
> This uses the newly created drm_accurate_vblank_count_and_time to accurately
> get a vblank count when the hw counter is unavailable.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Patrik Jakobsson
> ---
> drivers/gpu/drm
On Tue, May 17, 2016 at 03:07:47PM +0200, Maarten Lankhorst wrote:
> Instead of calling prepare_flip right before calling finish_page_flip
> do everything from prepare_page_flip in finish_page_flip.
>
> Putting prepare and finish page_flip in a single step removes the need
> for INTEL_FLIP_COMPLET
On Tue, May 17, 2016 at 06:43:23PM +0300, Mika Kuoppala wrote:
> Promising 1us accuracy where we timeout using jiffies is
> misleading. Convert the _wait_for macro to use milliseconds
> and convert the 2 callsites.
Note this is not about timeout but the the sleep. The timeout here is
still as inac
On 17/05/16 09:19, Zhi Wang wrote:
v5:
- Let functions take struct drm_i915_private *. (Tvrtko)
- Fold vGPU related active check into the inner functions. (Kevin)
Signed-off-by: Zhi Wang
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 11 ---
drivers/gpu/drm/i915/i915_vgpu.c| 13
On Wed, May 18, 2016 at 10:20:22AM +0200, Daniel Vetter wrote:
> On Tue, May 17, 2016 at 06:43:24PM +0300, Mika Kuoppala wrote:
> > Usually the condition we are after appears within very short time.
> > Spin few times before going into sleep. With this approximately
> > half of the wait_for in init
== Series Details ==
Series: series starting with [CI,1/8] async: Add support for explicit
fine-grained barriers
URL : https://patchwork.freedesktop.org/series/7334/
State : failure
== Summary ==
Series 7334v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/7334/re
Patrik Jakobsson writes:
> [ text/plain ]
> Load specific firmware versions for the DMC instead of using symbolic
> links. The currently recommended versions are: SKL 1.26, KBL 1.01 and
> BXT 1.07.
>
> Certain DMC versions need workarounds in the driver which forces us to
> have a tight dependenc
D'oh, wrong script. This was meant to be for trybot's eyes only.
Anyway, now that it is here, opinions? Is this a tractable method for
parallelising chunks of our interdependent init/resume/suspend?
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_
---
drivers/gpu/drm/i915/i915_drv.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 8b4f26b82e62..4de9fd44aa62 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i
---
drivers/gpu/drm/i915/i915_drv.c | 40 ++--
1 file changed, 30 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 60ce7373ab45..46f1fd542d73 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/d
---
drivers/gpu/drm/i915/i915_drv.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index dba03c026151..4f6de54c14fa 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/
---
drivers/gpu/drm/i915/i915_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 44c4743770ed..8b4f26b82e62 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -857,6
---
drivers/gpu/drm/i915/i915_drv.c | 98 ++---
1 file changed, 62 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 46f1fd542d73..44c4743770ed 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/
---
drivers/gpu/drm/i915/i915_dma.c | 12 ++--
drivers/gpu/drm/i915/i915_drv.c | 5 +
drivers/gpu/drm/i915/i915_drv.h | 4
3 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index a8c79f6512a4..b97d93
---
drivers/gpu/drm/i915/i915_drv.c | 131 +---
1 file changed, 97 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 5955cc869cf4..60ce7373ab45 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/
The current async-domain model supports running a multitude of
independent tasks with a coarse synchronisation point. This is
sufficient for its original purpose of allowing independent drivers to
run concurrently during various phases (booting, early resume, late
resume etc). However, for greater
On 17.05.2016 15:12, Marius Vlad wrote:
An attempt to have piglit not taking too much time when listing tests,
but also keep tests/gem_concurrent_blit into list of tests.
This was added in a633ad03c6 (tests: Separate tests with lots of subtests) and
tried to be fixed c785a89ee (autotools/: All
On Tue, May 17, 2016 at 03:07:46PM +0200, Maarten Lankhorst wrote:
> This function is duplicated with intel_finish_page_flip,
> and is only ever used from planes that could use the
> other function anyway.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Patrik Jakobsson
> ---
> drivers/gpu/
On Tue, May 17, 2016 at 03:07:45PM +0200, Maarten Lankhorst wrote:
> Both intel_unpin_work.pending and intel_unpin_work.enable_stall_check
> were used to see if work should be enabled. By only using pending
> some special cases are gone, and access to unpin_work can be simplified.
>
> A flip could
On Tue, 17 May 2016 23:11:10 +0200,
Daniel Vetter wrote:
>
> On Tue, May 17, 2016 at 08:19:32PM +0200, Takashi Iwai wrote:
> > On Tue, 17 May 2016 18:23:40 +0200,
> > Daniel Vetter wrote:
> > >
> > > On Tue, May 17, 2016 at 6:18 PM, Daniel Vetter wrote:
> > > > On Tue, May 17, 2016 at 3:20 PM, T
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