Re: [Intel-gfx] [PATCH v3] drm/i915/fbc: FBC causes display flicker when VT-d is enabled on Skylake

2016-06-23 Thread Jani Nikula
On Thu, 23 Jun 2016, "Zanoni, Paulo R" wrote: > Em Ter, 2016-06-21 às 08:25 +0100, Chris Wilson escreveu: >> Erratum SKL075: Display Flicker May Occur When Both VT-d And FBC Are >> Enabled >> >> "Display flickering may occur when both FBC (Frame Buffer >> Compression) >> and VT - d (Intel® Virtua

Re: [Intel-gfx] [PATCH 4/6] drm/i915/huc: Add debugfs for HuC loading status check

2016-06-23 Thread Xiang, Haihao
Hi Peter, Besides debugfs, could you add a IOCTL to check HuC loading status? Userspace media driver needs to advertise the features based on HuC to user. Thanks Haihao > From: Alex Dai > > Add debugfs entry for HuC loading status check. > > Signed-off-by: Alex Dai > Signed-off-by: Peter A

[Intel-gfx] ✗ Ro.CI.BAT: failure for series starting with [1/2] lib/gt: Omit illegal instruction on hang injection with gen 8+

2016-06-23 Thread Patchwork
== Series Details == Series: series starting with [1/2] lib/gt: Omit illegal instruction on hang injection with gen 8+ URL : https://patchwork.freedesktop.org/series/8452/ State : failure == Summary == Applying: lib/gt: Omit illegal instruction on hang injection with gen 8+ fatal: sha1 inform

[Intel-gfx] ✗ Ro.CI.BAT: failure for Runtime: set the sub slice according to kernel pooled EU configure.

2016-06-23 Thread Patchwork
== Series Details == Series: Runtime: set the sub slice according to kernel pooled EU configure. URL : https://patchwork.freedesktop.org/series/8724/ State : failure == Summary == Applying: Runtime: set the sub slice according to kernel pooled EU configure. fatal: sha1 information is lacking o

[Intel-gfx] ✗ Ro.CI.BAT: failure for Convert requests to use struct fence (rev9)

2016-06-23 Thread Patchwork
== Series Details == Series: Convert requests to use struct fence (rev9) URL : https://patchwork.freedesktop.org/series/1068/ State : failure == Summary == Applying: drm/i915: Add per context timelines for fence objects fatal: sha1 information is lacking or useless (drivers/gpu/drm/i915/i915_g

[Intel-gfx] ✗ Ro.CI.BAT: failure for series starting with [1/3] drm/i915/dp: Free the drm_dp_aux along with the encoder

2016-06-23 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/dp: Free the drm_dp_aux along with the encoder URL : https://patchwork.freedesktop.org/series/8847/ State : failure == Summary == Applying: drm/i915/dp: Free the drm_dp_aux along with the encoder Using index info to reconstruct

[Intel-gfx] [RFC 0/8] Add two-stage watermark programming for VLV/CHV (v4)

2016-06-23 Thread Chi Ding
From: root In addition to calculating final watermarks, we also pre-calculate a set of intermediate watermark values at atomic check time. These intermediate watermarks are a combination of the watermarks for the old state and the new state; they should satisfy the requirements of both states

[Intel-gfx] [RFC 4/8] drm/i915/vlv: return EINVAL when computed watermark exceeds system limitation

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst When computing normal watermarks in vlv_compute_wm(), if the value is bigger than system limitation, return EINVAL Signed-off-by: Maarten Lankhorst Signed-off-by: Chi Ding --- drivers/gpu/drm/i915/intel_pm.c | 11 --- 1 file changed, 8 insertions(+), 3 deletion

Re: [Intel-gfx] DP link training and performance issues with HDMI USB-C dongle and Skylake

2016-06-23 Thread Jani Nikula
On Thu, 23 Jun 2016, Andy Lutomirski wrote: > I have a Dell XPS 13 9350 (Skylake) and a Dell DA200 adapter. The > latter is a Thunderbolt device that includes an HDMI port and connects > over USB Type C. I believe that it's internally using DP Alternate > Mode. > I don't know whether this is a

[Intel-gfx] [RFC 2/8] drm/i915: Rename skl_plane_id to wm_plane_id

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst This function will be used not only by SKL but also VLV/CHV. Therefore it's renamed Signed-off-by: Maarten Lankhorst Signed-off-by: Chi Ding --- drivers/gpu/drm/i915/intel_pm.c | 59 + 1 file changed, 30 insertions(+), 29 deletio

[Intel-gfx] [RFC 5/8] drm/i915/vlv: Change to use intel_crtc_state instead of base CRTC object

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst This commit changs some functions to operate on intel_crtc_state rather than the base CRTC objects in order to transit to atomic. The reason we want to do this is to allow future patches to move the computation steps into the atomic 'check' phase where they'll be operating

[Intel-gfx] [RFC 3/8] drm/i915/vlv: Move fifo_size from intel_plane_wm_parameters to vlv_wm_state

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst This commit saves watermark for each plane in vlv_wm_state to prepare for two-level watermark because we'll compute and save intermediate and optimal watermark and fifo size for each plane. v2: - remove redundant debug statements in vlv_pipe_set_fifo_size() - reverse pass

[Intel-gfx] [RFC 1/8] drm/i915: Remove unused parameters from intel_plane_wm_parameters

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst Everything except fifo_size is unused and therefore removed Signed-off-by: Maarten Lankhorst Signed-off-by: Chi Ding --- drivers/gpu/drm/i915/intel_drv.h | 15 --- 1 file changed, 15 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/

[Intel-gfx] [RFC 7/8] drm/i915/vlv: Move active watermarks into intel_crtc->wm.active.vlv

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst Previously the active watermarks is saved in intel_crtc->wm_state This commit adds a new field "vlv" into intel_crtc->wm.active and save the active watermarks in it to be consistent with what we do on other platforms. Signed-off-by: Maarten Lankhorst Signed-off-by: Chi D

[Intel-gfx] [RFC 8/8] drm/i915/vlv: Add intermediate field in intel_crtc_wm_state and handlers for two-level watermark

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst Rename vlv_compute_wm to vlv_compute_pipe_wm to compute optimal watermark Add vlv_compute_intermediate_wm to computer intermediate watermark Add vlv_initial_watermarks to write intermediate watermark into hardware Add vlv_optimize_watermarks to write optimal watermark into

[Intel-gfx] [RFC 6/8] drm/i915/vlv: Add optimal field in intel_crtc_wm_state

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst For two-stage watermark programming, we need to calculate optimal watermark which is set after vblank and intermediate watermark which can be set without waiting for vblank. This commit adds optimal watermark field and changes the code to use it in vlv_compute_wm(), vlv_u

[Intel-gfx] ✗ Ro.CI.BAT: failure for Add two-stage watermark programming for VLV/CHV (v4)

2016-06-23 Thread Patchwork
== Series Details == Series: Add two-stage watermark programming for VLV/CHV (v4) URL : https://patchwork.freedesktop.org/series/9067/ State : failure == Summary == Applying: drm/i915: Remove unused parameters from intel_plane_wm_parameters Applying: drm/i915: Rename skl_plane_id to wm_plane_i

Re: [Intel-gfx] drm/i915 4.5/4.6 stable backport request for CHV

2016-06-23 Thread Peter Frühberger
Hi guys, 2016-06-06 11:32 GMT+02:00 Ville Syrjälä : > On Sat, Jun 04, 2016 at 02:06:58PM -0700, Greg KH wrote: > > On Fri, May 27, 2016 at 11:30:30AM +0300, ville.syrj...@linux.intel.com > wrote: > > > From: Ville Syrjälä > > > > > > Several nasty i915 regressions affecting CHV slipped through >

[Intel-gfx] [PACTH i-g-t v4 00/13] Remove compile time depencencies on libdrm_intel.

2016-06-23 Thread robert . foss
From: Robert Foss Hey, I've been looking at the possibilty of removing the compile time depency on libdrm_intel. There are two technical solutions to this problem as far as I can see; stubs and conditional compilation. This series uses the stubbing approach. Changes since v1: - Replaced the a

[Intel-gfx] [PACTH i-g-t v4 01/13] configure.ac: Test for libdrm_intel and build for it if present.

2016-06-23 Thread robert . foss
From: Robert Foss Test for libdrm_intel and build for it if present. Also expose the HAVE_INTEL #define to allow code to be conditionally compiled. Signed-off-by: Robert Foss --- configure.ac | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/configure.ac b/c

[Intel-gfx] [PACTH i-g-t v4 10/13] benchmarks/Makefile: Replace automake specific name of listing in Makfile.sources

2016-06-23 Thread robert . foss
From: Robert Foss Replace the automake specific name of listings in Makefile.sources with something not automake specific. Signed-off-by: Robert Foss --- benchmarks/Android.mk | 2 +- benchmarks/Makefile.am | 2 ++ benchmarks/Makefile.sources | 2 +- 3 files changed, 4 insertions(+)

[Intel-gfx] [PACTH i-g-t v4 06/13] tools/Makefile: Format whitespace.

2016-06-23 Thread robert . foss
From: Robert Foss Harmonize tabs/spaces etc. Signed-off-by: Robert Foss --- tools/Makefile.sources | 57 +- 1 file changed, 29 insertions(+), 28 deletions(-) diff --git a/tools/Makefile.sources b/tools/Makefile.sources index 07d8d9b..7ed5fe5 100

[Intel-gfx] [PACTH i-g-t v4 08/13] lib/stubs: Add stubs for intel_bufmgr.

2016-06-23 Thread robert . foss
From: Robert Foss This patch provides stubs for functionality otherwise provided by intel_bufmgr. The stubbed functions all fail with a call to igt_require_f(false,""). Defines and enums have been copied from libdrm_intel. Due to the stubbed tests failing with an igt_require_f() call, these stu

[Intel-gfx] [PACTH i-g-t v4 04/13] benchmarks/Makefile: Don't build benchmarks that depend on libdrm_intel.

2016-06-23 Thread robert . foss
From: Robert Foss Use the HAS_INTEL automake flag to avoid building benchmarks that won't compile unless libdrm_intel is available in the build system. Signed-off-by: Robert Foss --- benchmarks/Android.mk | 4 benchmarks/Makefile.am | 5 - benchmarks/Makefile.sources | 13

[Intel-gfx] [PACTH i-g-t v4 02/13] configure.ac: Harmonize HAVE_XXX flag for all drm platforms to HAVE_LIBDRM_XXX.

2016-06-23 Thread robert . foss
From: Robert Foss Replace the automake flag HAVE_XXX for VC4/NOUVEAU with HAVE_LIBDRM_XXX in order for the flags to be more descriptive and also follow the same convention as HAVE_LIBDRM_INTEL. Signed-off-by: Robert Foss --- configure.ac | 8 lib/Makefile.am | 2 +- tests/Makef

[Intel-gfx] [PACTH i-g-t v4 11/13] tools/Makefile: Replace automake specific name of listings in Makfile.sources

2016-06-23 Thread robert . foss
From: Robert Foss Replace the automake specific names of listings in Makefile.sources with something not automake specific. Signed-off-by: Robert Foss --- tools/Android.mk | 1 + tools/Makefile.am | 2 ++ tools/Makefile.sources | 2 +- 3 files changed, 4 insertions(+), 1 deletion(-)

[Intel-gfx] [PACTH i-g-t v4 12/13] lib/tests/Makefile: Replace automake specific names of listings in Makefile.sources

2016-06-23 Thread robert . foss
From: Robert Foss Replace the automake specific names of listings with something that isn't automake specific. Signed-off-by: Robert Foss --- lib/tests/Android.mk | 2 +- lib/tests/Makefile.am | 3 +++ lib/tests/Makefile.sources | 8 3 files changed, 8 insertions(+), 5 dele

[Intel-gfx] [PACTH i-g-t v4 09/13] demos/Makefile: Replace automake specific name of listing in Makfile.sources

2016-06-23 Thread robert . foss
From: Robert Foss Replace the automake specific name of listings in Makefile.sources with something not automake specific. Signed-off-by: Robert Foss --- demos/Android.mk | 2 +- demos/Makefile.am | 2 ++ demos/Makefile.sources | 2 +- 3 files changed, 4 insertions(+), 2 deletions(-

[Intel-gfx] [PACTH i-g-t v4 07/13] demos/Makefile: Don't build tools that depend on libdrm_intel.

2016-06-23 Thread robert . foss
From: Robert Foss Use the HAS_INTEL automake flag to avoid building tools that won't compile unless libdrm_intel is available in the build system. Signed-off-by: Robert Foss --- demos/Android.mk | 5 - demos/Makefile.am | 8 +--- demos/Makefile.sources | 7 +++ 3 files c

[Intel-gfx] [PACTH i-g-t v4 13/13] lib/Makefile: Replace automake specific names of listings in Makefile.sources

2016-06-23 Thread robert . foss
From: Robert Foss Replace the automake specific variable names for listings in Makefile.sources with something not automake specific. Signed-off-by: Robert Foss --- lib/Android.mk | 2 +- lib/Makefile.am | 2 ++ lib/Makefile.sources | 2 +- 3 files changed, 4 insertions(+), 2 deleti

[Intel-gfx] [PACTH i-g-t v4 05/13] tools/Makefile: Don't build tools that depend on libdrm_intel.

2016-06-23 Thread robert . foss
From: Robert Foss Use the HAS_INTEL automake flag to avoid building tools that won't compile unless libdrm_intel is available in the build system. Signed-off-by: Robert Foss --- tools/Android.mk | 5 + tools/Makefile.am | 5 + tools/Makefile.sources | 16 ++--

[Intel-gfx] [PACTH i-g-t v4 03/13] Enable HAVE_LIBDRM_INTEL unconditionally for Android.

2016-06-23 Thread robert . foss
From: Robert Foss Always set HAVE_LIBDRM_INTEL to true for Android targets. Signed-off-by: Robert Foss --- Android.mk | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Android.mk b/Android.mk index 681d114..3690fc5 100644 --- a/Android.mk +++ b/Android.mk @@ -1,2 +1,4 @@ +HAVE_LIBDRM_INTEL

Re: [Intel-gfx] [PATCH 4/6] drm/i915/huc: Add debugfs for HuC loading status check

2016-06-23 Thread Peter Antoine
On Thu, 23 Jun 2016, Xiang, Haihao wrote: Hi Peter, Besides debugfs, could you add a IOCTL to check HuC loading status? Userspace media driver needs to advertise the features based on HuC to user. Thanks Haihao From: Alex Dai Add debugfs entry for HuC loading status check. Signed-off-

Re: [Intel-gfx] [PATCH] drm/i915/gen9: Add WaInPlaceDecompressionHang

2016-06-23 Thread Arun Siluvery
On 17/06/2016 13:39, Mika Kuoppala wrote: Add this workaround to prevent hang when in place compression is used. References: HSD#2135774 Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/i

Re: [Intel-gfx] [PATCH 4/6] drm/i915/huc: Add debugfs for HuC loading status check

2016-06-23 Thread Peter Antoine
Daniel, Is this suggestion acceptable? I don't want to waste time and effort writing code that is not going to be accepted? Peter. On Thu, 23 Jun 2016, Xiang, Haihao wrote: Hi Peter, Besides debugfs, could you add a IOCTL to check HuC loading status? Userspace media driver needs to advert

Re: [Intel-gfx] [PATCH 3/6] drm/i915/huc: Add HuC fw loading support

2016-06-23 Thread Dave Gordon
On 22/06/16 09:31, Daniel Vetter wrote: On Tue, Jun 21, 2016 at 07:11:22PM +0100, Peter Antoine wrote: From: Alex Dai The HuC loading process is similar to GuC. The intel_uc_fw_fetch() is used for both cases. HuC loading needs to be before GuC loading. The WOPCM setting must be done early bef

Re: [Intel-gfx] [PATCH v2] drm/i915: Small compaction of the engine init code

2016-06-23 Thread Tvrtko Ursulin
On 22/06/16 17:59, Chris Wilson wrote: On Wed, Jun 22, 2016 at 05:35:48PM +0100, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Effectively removes one layer of indirection between the mask of possible engines and the engine constructors. Instead of spelling out in code the mapping of HAS_ to con

Re: [Intel-gfx] [PATCH v2] drm/i915: Small compaction of the engine init code

2016-06-23 Thread Chris Wilson
On Thu, Jun 23, 2016 at 11:26:27AM +0100, Tvrtko Ursulin wrote: > > On 22/06/16 17:59, Chris Wilson wrote: > >On Wed, Jun 22, 2016 at 05:35:48PM +0100, Tvrtko Ursulin wrote: > >>From: Tvrtko Ursulin > >> > >>Effectively removes one layer of indirection between the mask of > >>possible engines and

Re: [Intel-gfx] [PATCH 4/6] drm/i915/huc: Add debugfs for HuC loading status check

2016-06-23 Thread Michel Thierry
On 6/23/2016 11:01 AM, Peter Antoine wrote: Daniel, Is this suggestion acceptable? I don't want to waste time and effort writing code that is not going to be accepted? Peter. Reuse I915_GETPARAM and do more-less what Chris did for i915.enable_gvt? [1] [1] https://cgit.freedesktop.org/drm-

[Intel-gfx] [PATCH v3] drm/i915: Small compaction of the engine init code

2016-06-23 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Effectively removes one layer of indirection between the mask of possible engines and the engine constructors. Instead of spelling out in code the mapping of HAS_ to constructors, makes more use of the recently added data driven approach by putting engine constructor vfuncs i

Re: [Intel-gfx] [PATCH i-g-t] assembler/: Fix lex warnings for %empty and %nonassoc.

2016-06-23 Thread Marius Vlad
Thanks for the tip. I haven't noticed any differences in the generated output, so I've applied it. On Thu, May 19, 2016 at 03:07:46PM +0100, Damien Lespiau wrote: > On Thu, May 19, 2016 at 07:02:40AM -0700, Ben Widawsky wrote: > > On Thu, May 19, 2016 at 12:28:10PM +0100, Damien Lespiau wrote: > >

Re: [Intel-gfx] [PATCH v3] drm/i915: Small compaction of the engine init code

2016-06-23 Thread Chris Wilson
On Thu, Jun 23, 2016 at 12:12:29PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Effectively removes one layer of indirection between the mask of > possible engines and the engine constructors. Instead of spelling > out in code the mapping of HAS_ to constructors, makes > more use of th

Re: [Intel-gfx] Bad flicker on skylake HQD due to code in the 4.7 merge window

2016-06-23 Thread James Bottomley
On Tue, 2016-06-21 at 17:00 -0400, James Bottomley wrote: > On Tue, 2016-06-21 at 18:44 +0300, Ville Syrjälä wrote: > > On Tue, Jun 21, 2016 at 09:53:15AM -0400, James Bottomley wrote: > > > On Mon, 2016-06-20 at 11:03 +0300, Jani Nikula wrote: > > > > Cc: Ville > > > > > > > > On Mon, 20 Jun 2016

[Intel-gfx] [PATCH] drm/atomic: Make drm_atomic_legacy_backoff reset crtc->acquire_ctx

2016-06-23 Thread Maarten Lankhorst
Atomic updates may acquire more state than initially locked through drm_modeset_lock_crtc, running with heavy stress can cause a WARN_ON(crtc->acquire_ctx) in drm_modeset_lock_crtc: [ 601.491296] [ cut here ] [ 601.491366] WARNING: CPU: 0 PID: 2411 at drivers/gpu/drm/drm_

Re: [Intel-gfx] [PATCH v3] drm/i915: Small compaction of the engine init code

2016-06-23 Thread Tvrtko Ursulin
On 23/06/16 12:25, Chris Wilson wrote: On Thu, Jun 23, 2016 at 12:12:29PM +0100, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Effectively removes one layer of indirection between the mask of possible engines and the engine constructors. Instead of spelling out in code the mapping of HAS_ to con

Re: [Intel-gfx] [PATCH v3] drm/i915: Small compaction of the engine init code

2016-06-23 Thread Chris Wilson
On Thu, Jun 23, 2016 at 12:46:42PM +0100, Tvrtko Ursulin wrote: > > On 23/06/16 12:25, Chris Wilson wrote: > >On Thu, Jun 23, 2016 at 12:12:29PM +0100, Tvrtko Ursulin wrote: > >>From: Tvrtko Ursulin > >> > >>Effectively removes one layer of indirection between the mask of > >>possible engines and

Re: [Intel-gfx] [PATCH i-g-t 1/6] tests/kms_flip: Print timestamps in a consistent form

2016-06-23 Thread Ville Syrjälä
On Wed, Jun 22, 2016 at 09:33:13PM +0100, Chris Wilson wrote: > On Wed, Jun 22, 2016 at 04:26:01PM +0300, Ville Syrjälä wrote: > > On Wed, Jun 22, 2016 at 02:11:51PM +0100, Chris Wilson wrote: > > > On Wed, Jun 22, 2016 at 04:01:12PM +0300, Ville Syrjälä wrote: > > > > On Wed, Jun 22, 2016 at 01:34

[Intel-gfx] [RFC 0/8] Add two-stage watermark programming for VLV/CHV (v5)

2016-06-23 Thread Chi Ding
From: root In addition to calculating final watermarks, we also pre-calculate a set of intermediate watermark values at atomic check time. These intermediate watermarks are a combination of the watermarks for the old state and the new state; they should satisfy the requirements of both states

[Intel-gfx] [RFC 4/8] drm/i915/vlv: return EINVAL when computed watermark exceeds system limitation

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst When computing normal watermarks in vlv_compute_wm(), if the value is bigger than system limitation, return EINVAL Signed-off-by: Maarten Lankhorst Signed-off-by: Chi Ding --- drivers/gpu/drm/i915/intel_pm.c | 11 --- 1 file changed, 8 insertions(+), 3 deletion

[Intel-gfx] [RFC 3/8] drm/i915/vlv: Move fifo_size from intel_plane_wm_parameters to vlv_wm_state

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst This commit saves watermark for each plane in vlv_wm_state to prepare for two-level watermark because we'll compute and save intermediate and optimal watermark and fifo size for each plane. v2: - remove redundant debug statements in vlv_pipe_set_fifo_size() - reverse pass

[Intel-gfx] [RFC 1/8] drm/i915: Remove unused parameters from intel_plane_wm_parameters

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst Everything except fifo_size is unused and therefore removed Signed-off-by: Maarten Lankhorst Signed-off-by: Chi Ding --- drivers/gpu/drm/i915/intel_drv.h | 15 --- 1 file changed, 15 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/

[Intel-gfx] [RFC 7/8] drm/i915/vlv: Move active watermarks into intel_crtc->wm.active.vlv

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst Previously the active watermarks is saved in intel_crtc->wm_state This commit adds a new field "vlv" into intel_crtc->wm.active and save the active watermarks in it to be consistent with what we do on other platforms. Signed-off-by: Maarten Lankhorst Signed-off-by: Chi D

[Intel-gfx] [RFC 6/8] drm/i915/vlv: Add optimal field in intel_crtc_wm_state

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst For two-stage watermark programming, we need to calculate optimal watermark which is set after vblank and intermediate watermark which can be set without waiting for vblank. This commit adds optimal watermark field and changes the code to use it in vlv_compute_wm(), vlv_u

[Intel-gfx] [RFC 5/8] drm/i915/vlv: Change to use intel_crtc_state instead of base CRTC object

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst This commit changs some functions to operate on intel_crtc_state rather than the base CRTC objects in order to transit to atomic. The reason we want to do this is to allow future patches to move the computation steps into the atomic 'check' phase where they'll be operating

[Intel-gfx] [RFC 2/8] drm/i915: Rename skl_wm_plane_id to wm_plane_id

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst This function will be used not only by SKL but also VLV/CHV. Therefore it's renamed Signed-off-by: Maarten Lankhorst Signed-off-by: Chi Ding --- drivers/gpu/drm/i915/intel_pm.c | 57 + 1 file changed, 29 insertions(+), 28 deletio

[Intel-gfx] [RFC 8/8] drm/i915/vlv: Add intermediate field in intel_crtc_wm_state and handlers for two-level watermark

2016-06-23 Thread Chi Ding
From: Maarten Lankhorst Rename vlv_compute_wm to vlv_compute_pipe_wm to compute optimal watermark Add vlv_compute_intermediate_wm to computer intermediate watermark Add vlv_initial_watermarks to write intermediate watermark into hardware Add vlv_optimize_watermarks to write optimal watermark into

Re: [Intel-gfx] Bad flicker on skylake HQD due to code in the 4.7 merge window

2016-06-23 Thread Jani Nikula
On Thu, 23 Jun 2016, Steven Newbury wrote: > [ Unknown signature status ] > On Sun, 2016-06-19 at 14:53 -0700, James Bottomley wrote: >> On Fri, 2016-06-17 at 16:06 -0700, James Bottomley wrote: >> > On Fri, 2016-06-17 at 16:34 +0300, Jani Nikula wrote: >> > > On Fri, 17 Jun 2016, Daniel Vetter w

Re: [Intel-gfx] ✗ Ro.CI.BAT: warning for drm/i915: Eliminate DDI encoder->type frobbery (rev2)

2016-06-23 Thread Ville Syrjälä
On Thu, Jun 23, 2016 at 05:42:33AM -, Patchwork wrote: > == Series Details == > > Series: drm/i915: Eliminate DDI encoder->type frobbery (rev2) > URL : https://patchwork.freedesktop.org/series/8439/ > State : warning > > == Summary == > > Series 8439v2 drm/i915: Eliminate DDI encoder->type

Re: [Intel-gfx] Bad flicker on skylake HQD due to code in the 4.7 merge window

2016-06-23 Thread Steven Newbury
On Thu, 2016-06-23 at 15:59 +0300, Jani Nikula wrote: > On Thu, 23 Jun 2016, Steven Newbury wrote: > > [ Unknown signature status ] > > On Sun, 2016-06-19 at 14:53 -0700, James Bottomley wrote: > > > On Fri, 2016-06-17 at 16:06 -0700, James Bottomley wrote: > > > > On Fri, 2016-06-17 at 16:34 +030

Re: [Intel-gfx] [PATCH v3] drm/i915: Small compaction of the engine init code

2016-06-23 Thread Tvrtko Ursulin
On 23/06/16 13:11, Chris Wilson wrote: On Thu, Jun 23, 2016 at 12:46:42PM +0100, Tvrtko Ursulin wrote: On 23/06/16 12:25, Chris Wilson wrote: On Thu, Jun 23, 2016 at 12:12:29PM +0100, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Effectively removes one layer of indirection between the mask o

Re: [Intel-gfx] Bad flicker on skylake HQD due to code in the 4.7 merge window

2016-06-23 Thread Steven Newbury
On Sun, 2016-06-19 at 14:53 -0700, James Bottomley wrote: > On Fri, 2016-06-17 at 16:06 -0700, James Bottomley wrote: > > On Fri, 2016-06-17 at 16:34 +0300, Jani Nikula wrote: > > > On Fri, 17 Jun 2016, Daniel Vetter wrote: > > > > On Thu, Jun 16, 2016 at 03:42:12PM -0700, James Bottomley > > > >

Re: [Intel-gfx] [PATCH v3] drm/i915: Small compaction of the engine init code

2016-06-23 Thread Chris Wilson
On Thu, Jun 23, 2016 at 02:16:55PM +0100, Tvrtko Ursulin wrote: > > On 23/06/16 13:11, Chris Wilson wrote: > >On Thu, Jun 23, 2016 at 12:46:42PM +0100, Tvrtko Ursulin wrote: > >> > >>On 23/06/16 12:25, Chris Wilson wrote: > >>>On Thu, Jun 23, 2016 at 12:12:29PM +0100, Tvrtko Ursulin wrote: > F

Re: [Intel-gfx] [PATCH] drm/atomic: Make drm_atomic_legacy_backoff reset crtc->acquire_ctx

2016-06-23 Thread Daniel Vetter
On Thu, Jun 23, 2016 at 01:45:06PM +0200, Maarten Lankhorst wrote: > Atomic updates may acquire more state than initially locked through > drm_modeset_lock_crtc, running with heavy stress can cause a > WARN_ON(crtc->acquire_ctx) in drm_modeset_lock_crtc: > > [ 601.491296] [ cut here ]

Re: [Intel-gfx] [PATCH 3/6] drm/i915/huc: Add HuC fw loading support

2016-06-23 Thread Peter Antoine
On Thu, 23 Jun 2016, Dave Gordon wrote: On 22/06/16 09:31, Daniel Vetter wrote: On Tue, Jun 21, 2016 at 07:11:22PM +0100, Peter Antoine wrote: From: Alex Dai The HuC loading process is similar to GuC. The intel_uc_fw_fetch() is used for both cases. HuC loading needs to be before GuC loading

[Intel-gfx] [PATCH v4] drm/i915: Small compaction of the engine init code

2016-06-23 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Effectively removes one layer of indirection between the mask of possible engines and the engine constructors. Instead of spelling out in code the mapping of HAS_ to constructors, makes more use of the recently added data driven approach by putting engine constructor vfuncs i

Re: [Intel-gfx] [PATCH v4] drm/i915: Small compaction of the engine init code

2016-06-23 Thread Chris Wilson
On Thu, Jun 23, 2016 at 02:52:41PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Effectively removes one layer of indirection between the mask of > possible engines and the engine constructors. Instead of spelling > out in code the mapping of HAS_ to constructors, makes > more use of th

[Intel-gfx] [PATCH 1/3] drm/vgem: Fix mmaping

2016-06-23 Thread Chris Wilson
The vGEM mmap code has bitrotted slightly and now immediately BUGs. Since vGEM was last updated, there are new core GEM facilities to provide more common functions, so let's use those here. v2: drm_gem_free_mmap_offset() is performed from drm_gem_object_release() so we can remove the redundant cal

[Intel-gfx] [PATCH 2/3] drm/vgem: Enable dmabuf interface for export

2016-06-23 Thread Chris Wilson
Enable the standard GEM dma-buf interface provided by the DRM core, but only for exporting the VGEM object. This allows passing around the VGEM objects created from the dumb interface and using them as sources elsewhere. Creating a VGEM object for a foriegn handle is not supported. v2: With additi

[Intel-gfx] [PATCH 3/3] drm/vgem: Attach sw fences to exported vGEM dma-buf (ioctl)

2016-06-23 Thread Chris Wilson
vGEM buffers are useful for passing data between software clients and hardware renders. By allowing the user to create and attach fences to the exported vGEM buffers (on the dma-buf), the user can implement a deferred renderer and queue hardware operations like flipping and then signal the buffer r

[Intel-gfx] [PATCH i-g-t 1/2] tests/{kms_cursor_legacy, drv_missed_irq}, lib/drmtest: Fix warnings about unused function return values.

2016-06-23 Thread Marius Vlad
Signed-off-by: Marius Vlad CC: Chris Wilson --- lib/drmtest.c | 8 +++- tests/drv_missed_irq.c| 2 +- tests/kms_cursor_legacy.c | 8 ++-- 3 files changed, 10 insertions(+), 8 deletions(-) diff --git a/lib/drmtest.c b/lib/drmtest.c index 9a1232f..1e28f60 100644 --- a/lib/

[Intel-gfx] [PATCH i-g-t 2/2] lib/drmtest: Report proper err message when opening the driver.

2016-06-23 Thread Marius Vlad
Signed-off-by: Marius Vlad CC: Chris Wilson --- lib/drmtest.c | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/lib/drmtest.c b/lib/drmtest.c index 1e28f60..d2ee2d1 100644 --- a/lib/drmtest.c +++ b/lib/drmtest.c @@ -261,7 +261,17 @@ int __drm_open_driver(int chipse

Re: [Intel-gfx] [PATCH] drm/i915/skl: Increase cursor ddb blocks in multi-pipe config

2016-06-23 Thread Runyan, Arthur J
The bspec says "These are basic methods that can be used for single and multi-pipe modes. For optimal power usage, the display driver can choose to use more advanced allocation techniques as desired." So we leave it up to the driver to optimize as it sees fit. -Original Message- From: Ro

Re: [Intel-gfx] [PATCH] drm/i915/skl: Increase cursor ddb blocks in multi-pipe config

2016-06-23 Thread Rodrigo Vivi
Thanks Art. I believe the commit message should be updated to reflect this is flexible. Probably coping and pasting this part of spec: "More allocation might be required to support deeper low power states." So I went now to the spec to review the code and besides the line above I also notice for t

Re: [Intel-gfx] [PATCH i-g-t 1/2] tests/{kms_cursor_legacy, drv_missed_irq}, lib/drmtest: Fix warnings about unused function return values.

2016-06-23 Thread Chris Wilson
On Thu, Jun 23, 2016 at 07:46:02PM +0300, Marius Vlad wrote: > Signed-off-by: Marius Vlad > CC: Chris Wilson > --- > lib/drmtest.c | 8 +++- > tests/drv_missed_irq.c| 2 +- > tests/kms_cursor_legacy.c | 8 ++-- > 3 files changed, 10 insertions(+), 8 deletions(-) > > diff

Re: [Intel-gfx] [PATCH i-g-t 2/2] lib/drmtest: Report proper err message when opening the driver.

2016-06-23 Thread Chris Wilson
On Thu, Jun 23, 2016 at 07:46:03PM +0300, Marius Vlad wrote: > Signed-off-by: Marius Vlad > CC: Chris Wilson > --- > lib/drmtest.c | 12 +++- > 1 file changed, 11 insertions(+), 1 deletion(-) > > diff --git a/lib/drmtest.c b/lib/drmtest.c > index 1e28f60..d2ee2d1 100644 > --- a/lib/drmt

Re: [Intel-gfx] [PATCH] drm/i915/skl: Increase cursor ddb blocks in multi-pipe config

2016-06-23 Thread Runyan, Arthur J
That part is trying to just allocate 8 to each cursor. The buffer used up will be 8*numpipes, but that's because its assuming you can end up enabling a cursor on each pipe. I think its good to go up to 16. The kind of latencies we get on skl mean that a 64x64 32bpp cursor with 8 blocks will b

[Intel-gfx] [PATCH 1/2] lib/intel_chipset: Add more Kabylake PCI IDs.

2016-06-23 Thread Rodrigo Vivi
The spec has been updated adding new PCI IDs. Signed-off-by: Rodrigo Vivi --- lib/intel_chipset.h | 14 ++ 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h index 2f2e435..1c894d5 100644 --- a/lib/intel_chipset.h +++ b/lib/intel_

[Intel-gfx] [PATCH 1/2] drm/i915: Add more Kabylake PCI IDs.

2016-06-23 Thread Rodrigo Vivi
The spec has been updated adding new PCI IDs. Signed-off-by: Rodrigo Vivi --- include/drm/i915_pciids.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index 9094599..87dde1c 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i91

[Intel-gfx] [PATCH 2/2] pciids: : Removing PCI IDs that are no longer listed as Kabylake.

2016-06-23 Thread Rodrigo Vivi
This is unusual. Usually IDs listed on early stages of platform definition are kept there as reserved for later use. However these IDs here are not listed anymore in any of steppings and devices IDs tables for Kabylake on configurations overview section of BSpec. So it is better removing them bef

[Intel-gfx] [PATCH 1/2] intel: Add more Kabylake PCI IDs.

2016-06-23 Thread Rodrigo Vivi
The spec has been updated adding new PCI IDs. Signed-off-by: Rodrigo Vivi --- intel/intel_chipset.h | 14 ++ 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index e2554c3..0c3ca82 100644 --- a/intel/intel_chipset.h +++ b/in

[Intel-gfx] [PATCH 1/2] i956: Add more Kabylake PCI IDs.

2016-06-23 Thread Rodrigo Vivi
The spec has been updated adding new PCI IDs. Signed-off-by: Rodrigo Vivi --- include/pci_ids/i965_pci_ids.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h index fce00da..7a7897f 100644 --- a/include/pci_ids/i965_pci_ids.h +

[Intel-gfx] [PATCH 2/2] lib/intel_chipset: Removing PCI IDs that are no longer listed as Kabylake.

2016-06-23 Thread Rodrigo Vivi
This is unusual. Usually IDs listed on early stages of platform definition are kept there as reserved for later use. However these IDs here are not listed anymore in any of steppings and devices IDs tables for Kabylake on configurations overview section of BSpec. So it is better removing them bef

[Intel-gfx] [PATCH 2/2] intel: Removing PCI IDs that are no longer listed as Kabylake.

2016-06-23 Thread Rodrigo Vivi
This is unusual. Usually IDs listed on early stages of platform definition are kept there as reserved for later use. However these IDs here are not listed anymore in any of steppings and devices IDs tables for Kabylake on configurations overview section of BSpec. So it is better removing them bef

[Intel-gfx] [PATCH 1/2] pciids: Add more Kabylake PCI IDs.

2016-06-23 Thread Rodrigo Vivi
The spec has been updated adding new PCI IDs. Signed-off-by: Rodrigo Vivi --- src/i915_pciids.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/i915_pciids.h b/src/i915_pciids.h index 9094599..87dde1c 100644 --- a/src/i915_pciids.h +++ b/src/i915_pciids.h @@ -309,6 +309,7 @@ I

[Intel-gfx] [PATCH 2/2] i965: Removing PCI IDs that are no longer listed as Kabylake.

2016-06-23 Thread Rodrigo Vivi
This is unusual. Usually IDs listed on early stages of platform definition are kept there as reserved for later use. However these IDs here are not listed anymore in any of steppings and devices IDs tables for Kabylake on configurations overview section of BSpec. So it is better removing them bef

[Intel-gfx] [PATCH 2/2] drm/i915: Removing PCI IDs that are no longer listed as Kabylake.

2016-06-23 Thread Rodrigo Vivi
This is unusual. Usually IDs listed on early stages of platform definition are kept there as reserved for later use. However these IDs here are not listed anymore in any of steppings and devices IDs tables for Kabylake on configurations overview section of BSpec. So it is better removing them bef

Re: [Intel-gfx] [PATCH 4/6] drm/i915/huc: Add debugfs for HuC loading status check

2016-06-23 Thread Kelley, Sean V
> -Original Message- > From: Thierry, Michel > Sent: Thursday, June 23, 2016 3:48 AM > To: Antoine, Peter ; Xiang, Haihao > ; daniel.vet...@ffwll.ch > Cc: Kelley, Sean V ; intel- > g...@lists.freedesktop.org; Li, Lawrence T ; Vivi, > Rodrigo > Subject: Re: [Intel-gfx] [PATCH 4/6] drm/i91

[Intel-gfx] drm/i915: Delay with fbc enabled

2016-06-23 Thread Manuel Groß
Hello, since Kernel 4.6, the fbc is broken for me. Some specific X software (e.g. wireshark-qt, sakura and sublime) display UI modifications, such as keyboard input, with a delay up to ~1s. Either downgrading to 4.5 or disabling fbc solve this problem. This affects at least multiple Thinkpad and