Re: [Intel-gfx] port intel-gpu-tools to Wayland

2016-10-13 Thread Daniel Vetter
On Thu, Sep 29, 2016 at 04:45:34PM +0300, Jani Nikula wrote: > > Oh, the list and Petri seem to have been dropped off the distribution, > adding back. I don't have an answer on the rest. Petri? > > On Thu, 29 Sep 2016, cornel panceac wrote: > > 2016-09-29 14:53 GMT+02:00 Jani Nikula : > > > >> O

Re: [Intel-gfx] [patch] drm/i915: fix a read size argument

2016-10-13 Thread walter harms
Am 13.10.2016 10:55, schrieb Dan Carpenter: > We want to read 3 bytes here, but because the parenthesis are in the > wrong place we instead read: > > sizeof(intel_dp->edp_dpcd) == sizeof(intel_dp->edp_dpcd) > > which is one byte. > > Fixes: fe5a66f91c88 ("drm/i915: Read PSR caps/intermed

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Fix HDMI DPLL configuration

2016-10-13 Thread Daniel Vetter
On Mon, Sep 26, 2016 at 06:02:20PM +0300, Jani Nikula wrote: > On Mon, 26 Sep 2016, Imre Deak wrote: > > a277ca7dc01d should've been a no-functional-change commit, but it > > removed the initialization of the dpll_hw_state for HDMI outputs, > > resulting in state mismatches and a failed modeset wi

Re: [Intel-gfx] [PATCH v4 8/8] drm/i915/bxt: Enable IPC support

2016-10-13 Thread Mahesh Kumar
Hi, On Thursday 13 October 2016 04:49 PM, Maarten Lankhorst wrote: Op 13-10-16 om 12:58 schreef Kumar, Mahesh: From: Mahesh Kumar This patch adds IPC support for platforms. This patch enables IPC only for BXT/KBL platform as for SKL recommendation is to keep is disabled. IPC (Isochronous Pri

[Intel-gfx] [i-g-t PATCH 1/3] tests: add more checks for finding the debugfs in script based tests

2016-10-13 Thread Jani Nikula
While at it, make debugfs_path point at the debugfs root, not dri. This'll be handy in future work. Signed-off-by: Jani Nikula --- tests/drm_lib.sh | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/tests/drm_lib.sh b/tests/drm_lib.sh index 113da4c7d645..87e3ad

[Intel-gfx] [i-g-t PATCH 3/3] tests: enable hda dynamic debug for module reload test

2016-10-13 Thread Jani Nikula
Hopefully, this will provide more clues for figuring out why snd_hda_intel unload fails sporadically. Signed-off-by: Jani Nikula --- tests/drv_module_reload_basic | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tests/drv_module_reload_basic b/tests/drv_module_reload_basic index 93cf7c00563

[Intel-gfx] [i-g-t PATCH 2/3] tests: add facility to enable/disable hda dynamic debug in script based tests

2016-10-13 Thread Jani Nikula
Test scripts can call hda_dynamic_debug_enable and hda_dynamic_debug_disable to enable/disable snd_hda_intel and snd_hda_core debug messages. The dynamic debug will be disabled automatically at test end by the exit handler. Signed-off-by: Jani Nikula --- tests/drm_lib.sh | 22 +++

Re: [Intel-gfx] [PATCH] drm/i915: Skip unbinding large unmappable global buffers

2016-10-13 Thread Chris Wilson
On Thu, Oct 13, 2016 at 12:29:44PM +0100, Tvrtko Ursulin wrote: > > On 13/10/2016 09:55, Chris Wilson wrote: > >If the user requests a mappable binding to the global GTT, we will first > >unbind an existing mapping if it doesn't match. We will unbind even if > >there is no possibility that the obj

Re: [Intel-gfx] [PATCH i-g-t] build: Fix assmebler/etc. tools build for 32bit x86

2016-10-13 Thread Joonas Lahtinen
Reviewed-by: Joonas Lahtinen Regards, Joonas -- Joonas Lahtinen Open Source Technology Center Intel Corporation ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 18/42] drm/i915: Move object backing storage manipulation to its own locking

2016-10-13 Thread Chris Wilson
On Thu, Oct 13, 2016 at 03:46:04PM +0300, Joonas Lahtinen wrote: > On pe, 2016-10-07 at 10:46 +0100, Chris Wilson wrote: > > @@ -4211,10 +4240,10 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void > > *data, > >   i915_gem_object_truncate(obj); > >   > >   args->retained = obj->mm.

Re: [Intel-gfx] [PATCH 18/42] drm/i915: Move object backing storage manipulation to its own locking

2016-10-13 Thread Joonas Lahtinen
On pe, 2016-10-07 at 10:46 +0100, Chris Wilson wrote: > @@ -4211,10 +4240,10 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void > *data, >   i915_gem_object_truncate(obj); >   >   args->retained = obj->mm.madv != __I915_MADV_PURGED; > + mutex_unlock(&obj->mm.lock); >   > +e

Re: [Intel-gfx] [PATCH] drm/i915: Fix mismatched INIT power domain disabling during suspend

2016-10-13 Thread Ville Syrjälä
On Thu, Oct 13, 2016 at 02:34:06PM +0300, Imre Deak wrote: > Currently the display INIT power domain disabling/enabling happens in a > mismatched way in the suspend/resume_early hooks respectively. This can > leave display power wells incorrectly disabled in the resume hook if the > suspend sequenc

Re: [Intel-gfx] Problem with emgd on fedora 18

2016-10-13 Thread Jani Nikula
On Thu, 13 Oct 2016, Anteja Vuk Macek wrote: > Hi, > I work with Fedora 18 and I'm new in linux world. I have problem with emgd > driver. I put emgd driver in kernel and build kernel. Moduled is build like > loadable module. But problem is when I load driver , you can see photo > https://my.syncpl

Re: [Intel-gfx] [PATCH] drm/i915: Fix mismatched INIT power domain disabling during suspend

2016-10-13 Thread Jani Nikula
On Thu, 13 Oct 2016, Imre Deak wrote: > Currently the display INIT power domain disabling/enabling happens in a > mismatched way in the suspend/resume_early hooks respectively. This can > leave display power wells incorrectly disabled in the resume hook if the > suspend sequence is aborted for som

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [CI,1/2] drm/i915: Record the current requests queue for execlists upon hang

2016-10-13 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: Record the current requests queue for execlists upon hang URL : https://patchwork.freedesktop.org/series/13716/ State : warning == Summary == Series 13716v1 Series without cover letter https://patchwork.freedesktop.org/api/1

[Intel-gfx] Problem with emgd on fedora 18

2016-10-13 Thread Anteja Vuk Macek
Hi, I work with Fedora 18 and I'm new in linux world. I have problem with emgd driver. I put emgd driver in kernel and build kernel. Moduled is build like loadable module. But problem is when I load driver , you can see photo https://my.syncplicity.com/share/skvhanon0sxj5f8/IMG_20161011_104347 . Wh

Re: [Intel-gfx] [patch] drm/i915: fix a read size argument

2016-10-13 Thread Jani Nikula
On Thu, 13 Oct 2016, walter harms wrote: > Am 13.10.2016 10:55, schrieb Dan Carpenter: >> We want to read 3 bytes here, but because the parenthesis are in the >> wrong place we instead read: >> >> sizeof(intel_dp->edp_dpcd) == sizeof(intel_dp->edp_dpcd) >> >> which is one byte. >> >> Fixes

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915: Shrink cxsr_latency_table

2016-10-13 Thread Tvrtko Ursulin
On 13/10/2016 12:50, Patchwork wrote: == Series Details == Series: series starting with [CI,1/4] drm/i915: Shrink cxsr_latency_table URL : https://patchwork.freedesktop.org/series/13715/ State : success == Summary == Series 13715v1 Series without cover letter https://patchwork.freedesktop.o

[Intel-gfx] [CI 1/3] drm/i915: Remove unused "valid" parameter from pte_encode

2016-10-13 Thread Michał Winiarski
We never used any invalid ptes, those were put in place for a possibility of doing gpu faults. However our batchbuffers are not restricted in length, so everything needs to be pointing to something and thus out-of-bounds is pointing to scratch. Remove the valid flag as it is always true. v2: Expa

[Intel-gfx] [CI 2/3] drm/i915/gtt: Split gen8_ppgtt_clear_pte_range

2016-10-13 Thread Michał Winiarski
Let's use more top-down approach, where each gen8_ppgtt_clear_* function is responsible for clearing the struct passed as an argument and calling relevant clear_range functions on lower-level tables. Doing this rather than operating on PTE ranges makes the implementation of shrinking page tables qu

[Intel-gfx] [CI 3/3] drm/i915/gtt: Free unused lower-level page tables

2016-10-13 Thread Michał Winiarski
Since "Dynamic page table allocations" were introduced, our page tables can grow (being dynamically allocated) with address space range usage. Unfortunately, their lifetime is bound to vm. This is not a huge problem when we're not using softpin - drm_mm is creating an upper bound on used range by c

Re: [Intel-gfx] [PATCH 19/42] drm/i915/dmabuf: Acquire the backing storage outside of struct_mutex

2016-10-13 Thread Joonas Lahtinen
On pe, 2016-10-07 at 10:46 +0100, Chris Wilson wrote: > @@ -72,21 +68,18 @@ static struct sg_table *i915_gem_map_dma_buf(struct > dma_buf_attachment *attachme >   } >   >   if (!dma_map_sg(attachment->dev, st->sgl, st->nents, dir)) { > - ret =-ENOMEM; > + ret = -ENO

Re: [Intel-gfx] [PATCH 21/42] drm/i915: Implement pwrite without struct-mutex

2016-10-13 Thread Chris Wilson
On Thu, Oct 13, 2016 at 02:17:52PM +0300, Joonas Lahtinen wrote: > On pe, 2016-10-07 at 10:46 +0100, Chris Wilson wrote: > > +/* Per-page copy function for the shmem pwrite fastpath. > > + * Flushes invalid cachelines before writing to the target if > > + * needs_clflush_before is set and flushes o

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915: Shrink cxsr_latency_table

2016-10-13 Thread Patchwork
== Series Details == Series: series starting with [CI,1/4] drm/i915: Shrink cxsr_latency_table URL : https://patchwork.freedesktop.org/series/13715/ State : success == Summary == Series 13715v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/13715/revisions/1/mbox/

Re: [Intel-gfx] [PATCH 22/42] drm/i915: Acquire the backing storage outside of struct_mutex in set-domain

2016-10-13 Thread Joonas Lahtinen
On pe, 2016-10-07 at 10:46 +0100, Chris Wilson wrote: > @@ -1499,25 +1523,40 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, > void *data, >      MAX_SCHEDULE_TIMEOUT, >      to_rps_client(file)); >   if (ret) > - goto er

[Intel-gfx] [PATCH] drm/i915: Fix mismatched INIT power domain disabling during suspend

2016-10-13 Thread Imre Deak
Currently the display INIT power domain disabling/enabling happens in a mismatched way in the suspend/resume_early hooks respectively. This can leave display power wells incorrectly disabled in the resume hook if the suspend sequence is aborted for some reason resulting in the suspend/resume hooks

Re: [Intel-gfx] [PATCH] drm/i915: Skip unbinding large unmappable global buffers

2016-10-13 Thread Tvrtko Ursulin
On 13/10/2016 09:55, Chris Wilson wrote: If the user requests a mappable binding to the global GTT, we will first unbind an existing mapping if it doesn't match. We will unbind even if there is no possibility that the object can fit in the mappable aperture. This may lead to a ping-pong migratio

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Save megabytes of wasted sg entries

2016-10-13 Thread Saarinen, Jani
> == Series Details == > > Series: Save megabytes of wasted sg entries > URL : https://patchwork.freedesktop.org/series/13706/ > State : failure > > == Summary == > > Series 13706v1 Save megabytes of wasted sg entries > https://patchwork.freedesktop.org/api/1.0/series/13706/revisions/1/mbox/ >

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,01/19] drm/i915: Make HAS_DDI and HAS_PCH_LPT_LP only take dev_priv

2016-10-13 Thread Patchwork
== Series Details == Series: series starting with [CI,01/19] drm/i915: Make HAS_DDI and HAS_PCH_LPT_LP only take dev_priv URL : https://patchwork.freedesktop.org/series/13713/ State : failure == Summary == Series 13713v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/se

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Skip unbinding large unmappable global buffers

2016-10-13 Thread Tvrtko Ursulin
On 13/10/2016 12:20, Saarinen, Jani wrote: == Series Details == Series: drm/i915: Skip unbinding large unmappable global buffers URL : https://patchwork.freedesktop.org/series/13702/ State : warning == Summary == Series 13702v1 drm/i915: Skip unbinding large unmappable global buffers https:

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Skip unbinding large unmappable global buffers

2016-10-13 Thread Saarinen, Jani
> == Series Details == > > Series: drm/i915: Skip unbinding large unmappable global buffers > URL : https://patchwork.freedesktop.org/series/13702/ > State : warning > > == Summary == > > Series 13702v1 drm/i915: Skip unbinding large unmappable global buffers > https://patchwork.freedesktop.or

Re: [Intel-gfx] [PATCH v4 8/8] drm/i915/bxt: Enable IPC support

2016-10-13 Thread Maarten Lankhorst
Op 13-10-16 om 12:58 schreef Kumar, Mahesh: > From: Mahesh Kumar > > This patch adds IPC support for platforms. This patch enables IPC > only for BXT/KBL platform as for SKL recommendation is to keep is disabled. > IPC (Isochronous Priority Control) is the hardware feature, which > dynamically con

Re: [Intel-gfx] [PATCH 21/42] drm/i915: Implement pwrite without struct-mutex

2016-10-13 Thread Joonas Lahtinen
On pe, 2016-10-07 at 10:46 +0100, Chris Wilson wrote: > +/* Per-page copy function for the shmem pwrite fastpath. > + * Flushes invalid cachelines before writing to the target if > + * needs_clflush_before is set and flushes out any written cachelines after > + * writing if needs_clflush is set. >

Re: [Intel-gfx] [PATCH 16/42] drm/i915: Refactor object page API

2016-10-13 Thread Chris Wilson
On Thu, Oct 13, 2016 at 02:04:18PM +0300, Joonas Lahtinen wrote: > On pe, 2016-10-07 at 10:46 +0100, Chris Wilson wrote: > > @@ -2483,24 +2474,25 @@ i915_gem_object_get_pages(struct > > drm_i915_gem_object *obj) > >   > >   lockdep_assert_held(&obj->base.dev->struct_mutex); > >   > > - if (obj

Re: [Intel-gfx] [PATCH 16/42] drm/i915: Refactor object page API

2016-10-13 Thread Joonas Lahtinen
On pe, 2016-10-07 at 10:46 +0100, Chris Wilson wrote: > +static inline int __must_check > +i915_gem_object_pin_pages(struct drm_i915_gem_object *obj) >  { > - BUG_ON(obj->pages == NULL); > - obj->pages_pin_count++; > + lockdep_assert_held(&obj->base.dev->struct_mutex); \n here. > +

[Intel-gfx] [PATCH v4 5/8] drm/i915/skl+: reset y_plane ddb structure also during calculation

2016-10-13 Thread Kumar, Mahesh
From: Mahesh Kumar Current code clears only plane ddb allocation if total ddb allocated to pipe in zero. y_plane ddb still contains old value, clear that as well. Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/intel_pm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH v4 7/8] drm/i915/skl+: change WM calc to fixed point 16.16

2016-10-13 Thread Kumar, Mahesh
From: Mahesh Kumar This patch changes Watermak calculation to fixed point calculation. Problem with current calculation is during plane_blocks_per_line calculation we divide intermediate blocks with min_scanlines and takes floor of the result because of integer operation. hence we end-up assignin

[Intel-gfx] [PATCH v4 6/8] drm/i915/skl: Add variables to check x_tile and y_tile

2016-10-13 Thread Kumar, Mahesh
From: Mahesh Kumar This patch adds variable to check for X_tiled & y_tiled planes, instead of always checking against framebuffer-modifiers. Changes: - Created separate patch as per Paulo's comment - Added x_tiled variable as well Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/intel_p

[Intel-gfx] [PATCH v4 1/8] drm/i915/skl+: use linetime latency instead of ddb size

2016-10-13 Thread Kumar, Mahesh
This patch make changes to use linetime latency instead of allocated DDB size during plane watermark calculation in switch case, This is required to implement new DDB allocation algorithm. In New Algorithm DDB is allocated based on WM values, because of which number of DDB blocks will not be avail

[Intel-gfx] [PATCH v4 8/8] drm/i915/bxt: Enable IPC support

2016-10-13 Thread Kumar, Mahesh
From: Mahesh Kumar This patch adds IPC support for platforms. This patch enables IPC only for BXT/KBL platform as for SKL recommendation is to keep is disabled. IPC (Isochronous Priority Control) is the hardware feature, which dynamically controles the memory read priority of Display. When IPC i

[Intel-gfx] [PATCH v4 2/8] drm/i915/skl: New ddb allocation algorithm

2016-10-13 Thread Kumar, Mahesh
From: Mahesh Kumar This patch implements new DDB allocation algorithm as per HW team recommendation. This algo takecare of scenario where we allocate less DDB for the planes with lower relative pixel rate, but they require more DDB to work. It also takes care of enabling same watermark level for

[Intel-gfx] [PATCH v4 3/8] drm/i915: Decode system memory bandwidth

2016-10-13 Thread Kumar, Mahesh
This patch adds support to decode system memory bandwidth which will be used for arbitrated display memory percentage calculation in GEN9 based system. Changes from v1: - Address comments from Paulo - implement decode function for SKL/KBL also Signed-off-by: "Kumar, Mahesh" --- drivers/gpu/dr

[Intel-gfx] [PATCH v4 0/8] New DDB Algo and WM fixes

2016-10-13 Thread Kumar, Mahesh
From: Mahesh Kumar This series implements new DDB allocation algorithm to solve the cases, where we have sufficient DDB available to enable multiple planes, But due to the current algorithm not dividing it properly among planes, we end-up failing the flip. It also takes care of enabling same wate

[Intel-gfx] [PATCH v4 4/8] drm/i915/gen9: WM memory bandwidth related workaround

2016-10-13 Thread Kumar, Mahesh
This patch implemnets Workariunds related to display arbitrated memory bandwidth. These WA are applicabe for all gen-9 based platforms. Changes since v1: - Rebase on top of Paulo's patch series Changes since v2: - Rebase/rework after addressing Paulo's comments in previous patch Signed-off-by:

[Intel-gfx] ✓ Fi.CI.BAT: success for .rodata.str diet (rev2)

2016-10-13 Thread Patchwork
== Series Details == Series: .rodata.str diet (rev2) URL : https://patchwork.freedesktop.org/series/13583/ State : success == Summary == Series 13583v2 .rodata.str diet https://patchwork.freedesktop.org/api/1.0/series/13583/revisions/2/mbox/ Test kms_pipe_crc_basic: Subgroup bad-sourc

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for Support for sustained capturing of GuC firmware logs (rev11)

2016-10-13 Thread Goel, Akash
On 10/13/2016 1:18 PM, Tvrtko Ursulin wrote: On 12/10/2016 19:36, Saarinen, Jani wrote: == Series Details == Series: Support for sustained capturing of GuC firmware logs (rev11) URL : https://patchwork.freedesktop.org/series/7910/ State : warning == Summary == Series 7910v11 Support for

[Intel-gfx] ✗ Fi.CI.BAT: failure for Save megabytes of wasted sg entries

2016-10-13 Thread Patchwork
== Series Details == Series: Save megabytes of wasted sg entries URL : https://patchwork.freedesktop.org/series/13706/ State : failure == Summary == Series 13706v1 Save megabytes of wasted sg entries https://patchwork.freedesktop.org/api/1.0/series/13706/revisions/1/mbox/ Test gem_cs_tlb:

[Intel-gfx] [CI 2/2] drm/i915: Fix misplaced '\n' in printing the GPU error's RING_HEAD

2016-10-13 Thread Chris Wilson
'\n' is supposed to be at the end of the line, not in the middle. Fixes: cdb324bde570 ("drm/i915: Show bounds of active request in the ring...") Signed-off-by: Chris Wilson Cc: Mika Kuoppala Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- 1 file changed, 1 insertio

[Intel-gfx] [CI 1/2] drm/i915: Record the current requests queue for execlists upon hang

2016-10-13 Thread Chris Wilson
Mika wanted to know what requests were pending at the time of a hang as we now track which requests we have submitted to the hardware. Signed-off-by: Chris Wilson Cc: Mika Kuoppala Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_drv.h | 3 +- drivers/gpu/drm/i915/i915_gpu_error

Re: [Intel-gfx] [PATCH] drm/i915: Record the current requests queue for execlists upon hang

2016-10-13 Thread Chris Wilson
On Thu, Oct 13, 2016 at 12:51:26PM +0300, Mika Kuoppala wrote: > Chris Wilson writes: > > +static void record_request(struct drm_i915_gem_request *request, > > + struct drm_i915_error_request *erq) > > +{ > > + erq->context = request->ctx->hw_id; > > + erq->seqno = request

Re: [Intel-gfx] [RFC 1/7] drm/i915: Extract sg creation into a helper

2016-10-13 Thread Chris Wilson
On Thu, Oct 13, 2016 at 10:55:12AM +0100, Tvrtko Ursulin wrote: > > On 13/10/2016 10:20, Chris Wilson wrote: > >On Thu, Oct 13, 2016 at 10:03:58AM +0100, Tvrtko Ursulin wrote: > >>From: Tvrtko Ursulin > >> > >>In order to reuse the same logic in several places in the driver, > >>extract the logic

[Intel-gfx] [CI 1/4] drm/i915: Shrink cxsr_latency_table

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin unsigned long is too wide - use smaller types in struct cxsr_latency to save 800-something bytes of .rodata. v2: All data even fits in u16 for even more saving. (Ville Syrjala) v3: Move bitfields to the end of the struct. (Joonas Lahtinen) Signed-off-by: Tvrtko Ursulin Rev

[Intel-gfx] [CI 2/4] drm/i915: Shrink sdvo_cmd_names

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Pack the struct _sdvo_cmd_name to save 736 bytes of .rodata. This is fine since the name pointers are used only for debug. Signed-off-by: Tvrtko Ursulin Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/intel_sdvo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(

[Intel-gfx] [CI 3/4] drm/i915: Shrink per-platform watermark configuration

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Use types of more appropriate size in struct intel_watermark_params to save 512 bytes of .rodata. Signed-off-by: Tvrtko Ursulin Acked-by: Ville Syrjälä Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/intel_drv.h | 10 +- drivers/gpu/drm/i915/intel_pm.c |

[Intel-gfx] [CI 4/4] drm/i915: Shrink TV modes const data

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Make struct video_levels and struct tv_mode use data types of sufficient width to save approximately one kilobyte in the .rodata section. v2: Do not align struct members. (Jani Nikula, Joonas Lahtinen) Signed-off-by: Tvrtko Ursulin Reviewed-by: Joonas Lahtinen --- driver

[Intel-gfx] [CI 11/19] drm/i915: Make IS_KABYLAKE only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 1320 bytes of .rodata strings. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst --- drivers/gpu/drm/i

[Intel-gfx] [CI 07/19] drm/i915: Make INTEL_DEVID only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 4472 bytes of .rodata strings. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst --- drivers/gpu/drm/i

[Intel-gfx] [CI 05/19] drm/i915: Do not use INTEL_INFO(dev_priv)->ring_mask inside WARNs

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 1520 bytes of .rodata strings. Signed-off-by: Tvrtko Ursulin Reviewed-by: Joonas Lahtinen Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_engine_cs.c | 7 --- 1 file changed, 4 i

[Intel-gfx] [CI 17/19] drm/i915: Make IS_VALLEYVIEW only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 944 bytes of .rodata strings and 128 bytes of .text. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst

[Intel-gfx] [CI 14/19] drm/i915: Make HAS_L3_DPF only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 472 bytes of .rodata strings. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst --- drivers/gpu/drm/i9

[Intel-gfx] [CI 18/19] drm/i915: Make INTEL_GEN only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 968 bytes of .rodata strings. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst --- drivers/gpu/drm/i9

[Intel-gfx] [CI 13/19] drm/i915: Make IS_BROXTON only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 1392 bytes of .rodata strings. Also change a few function/macro prototypes in i915_gem_gtt.c from dev to dev_priv where it made more sense to do so. v2: Add parantheses around dev_priv. (Ville Syrjala) v3: Mention function prototype changes. (David Weinehall) Signed-

[Intel-gfx] [CI 12/19] drm/i915: Make IS_SKYLAKE only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 1016 bytes of .rodata strings and couple hundred of .text. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankh

[Intel-gfx] [CI 10/19] drm/i915: Make IS_HASWELL only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 2432 bytes of .rodata strings. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst --- drivers/gpu/drm/i

[Intel-gfx] [CI 03/19] drm/i915: Make HAS_GMCH_DISPLAY only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin More .rodata string saving by avoid __I915__ magic inside WARNs. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankh

[Intel-gfx] [CI 19/19] drm/i915: Make IS_GEN macros only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 1416 bytes of .rodata strings. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst --- drivers/gpu/drm/i

[Intel-gfx] [CI 06/19] drm/i915: Make IS_GEN-range macro only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 944 bytes of .rodata strings. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst --- drivers/gpu/drm/i9

[Intel-gfx] [CI 15/19] drm/i915: Make IS_G4X only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 472 bytes of .rodata strings. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst --- drivers/gpu/drm/i9

[Intel-gfx] [CI 08/19] drm/i915: Make IS_IVYBRIDGE only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 848 bytes of .rodata strings. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst --- drivers/gpu/drm/i9

[Intel-gfx] [CI 02/19] drm/i915: Make INTEL_PCH_TYPE & co only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin This saves 1872 bytes of .rodata strings. v2: * Rebase. * Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst ---

[Intel-gfx] [CI 09/19] drm/i915: Make IS_BROADWELL only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 1808 bytes of .rodata strings. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst --- drivers/gpu/drm/i

[Intel-gfx] [CI 16/19] drm/i915: Make IS_CHERRYVIEW only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 864 bytes of .rodata strings and ~100 of .text. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst ---

[Intel-gfx] [CI 04/19] drm/i915: Make HAS_RUNTIME_PM only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 960 bytes of .rodata strings. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst --- drivers/gpu/drm/i9

[Intel-gfx] [CI 01/19] drm/i915: Make HAS_DDI and HAS_PCH_LPT_LP only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin This saves 3248 bytes of .rodata strings. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin Reviewed-by: David Weinehall Acked-by: Daniel Vetter Acked-by: Jani Nikula Acked-by: Chris Wilson Acked-by: Maarten Lankhorst --- drivers/gpu/

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Allow disabling error capture

2016-10-13 Thread Chris Wilson
On Thu, Oct 13, 2016 at 12:16:03PM +0300, Jani Nikula wrote: > On Tue, 11 Oct 2016, Chris Wilson wrote: > > +#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) > > {"i915_error_state", &i915_error_state_fops}, > > +#endif > > IGT tests/drm_lib.sh tests for existence of i915_error_state to find the

Re: [Intel-gfx] [PATCH v3 13/19] drm/i915: Make IS_BROXTON only take dev_priv

2016-10-13 Thread David Weinehall
On Thu, Oct 13, 2016 at 10:44:44AM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Saves 1392 bytes of .rodata strings. > > Also change a few function/macro prototypes in i915_gem_gtt.c > from dev to dev_priv where it made more sense to do so. > > v2: Add parantheses around dev_priv. (V

Re: [Intel-gfx] [patch] drm/i915: fix a read size argument

2016-10-13 Thread Dan Carpenter
On Thu, Oct 13, 2016 at 10:01:03AM +0100, Chris Wilson wrote: > On Thu, Oct 13, 2016 at 11:55:08AM +0300, Dan Carpenter wrote: > > We want to read 3 bytes here, but because the parenthesis are in the > > wrong place we instead read: > > > > sizeof(intel_dp->edp_dpcd) == sizeof(intel_dp->edp_dp

Re: [Intel-gfx] [RFC 1/7] drm/i915: Extract sg creation into a helper

2016-10-13 Thread Tvrtko Ursulin
On 13/10/2016 10:20, Chris Wilson wrote: On Thu, Oct 13, 2016 at 10:03:58AM +0100, Tvrtko Ursulin wrote: From: Tvrtko Ursulin In order to reuse the same logic in several places in the driver, extract the logic which adds pages to the sg list and does the potential coalescing, into separate fu

Re: [Intel-gfx] [PATCH] drm/i915: Record the current requests queue for execlists upon hang

2016-10-13 Thread Mika Kuoppala
Chris Wilson writes: > Mika wanted to know what requests were pending at the time of a hang as > we now track which requests we have submitted to the hardware. > > Signed-off-by: Chris Wilson > Cc: Mika Kuoppala > --- > drivers/gpu/drm/i915/i915_drv.h | 3 +- > drivers/gpu/drm/i915/i915

Re: [Intel-gfx] [RFC 6/7] lib/scatterlist: Add sg_trim_table

2016-10-13 Thread Tvrtko Ursulin
On 13/10/2016 10:23, Chris Wilson wrote: On Thu, Oct 13, 2016 at 10:04:03AM +0100, Tvrtko Ursulin wrote: From: Tvrtko Ursulin *** BROKEN *** RFC only *** BROKEN *** In cases where it is hard to know to minimum numbers of ents table will need to hold at sg_alloc_time, and we end up with a tab

Re: [Intel-gfx] [RFC 5/7] drm/i915: Use i915_sg_create for dmabuf

2016-10-13 Thread Tvrtko Ursulin
On 13/10/2016 10:15, Chris Wilson wrote: On Thu, Oct 13, 2016 at 10:04:02AM +0100, Tvrtko Ursulin wrote: - src = obj->pages->sgl; - dst = st->sgl; - for (i = 0; i < obj->pages->nents; i++) { - sg_set_page(dst, sg_page(src), src->length, 0); - dst =

Re: [Intel-gfx] [RFC i-g-t PATCH 2/3] igt/gem_wait: Use new igt_dummyload api

2016-10-13 Thread Chris Wilson
On Thu, Oct 13, 2016 at 12:31:13PM +0300, Abdiel Janulgue wrote: > > > On 10/12/2016 03:07 PM, Chris Wilson wrote: > > On Wed, Oct 12, 2016 at 02:59:53PM +0300, Abdiel Janulgue wrote: > >> Signed-off-by: Abdiel Janulgue > >> --- > >> tests/gem_wait.c | 77 > >> +

[Intel-gfx] [PATCH v3 13/19] drm/i915: Make IS_BROXTON only take dev_priv

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Saves 1392 bytes of .rodata strings. Also change a few function/macro prototypes in i915_gem_gtt.c from dev to dev_priv where it made more sense to do so. v2: Add parantheses around dev_priv. (Ville Syrjala) v3: Mention function prototype changes. (David Weinhall) Signed-o

Re: [Intel-gfx] [PATCH] drm/i915: Fix misplaced '\n' in printing the GPU error's RING_HEAD

2016-10-13 Thread Mika Kuoppala
Chris Wilson writes: > '\n' is supposed to be at the end of the line, not in the middle. > > Fixes: cdb324bde570 ("drm/i915: Show bounds of active request in the ring...") > Signed-off-by: Chris Wilson > Cc: Mika Kuoppala Oopsie. Reviewed-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/i915

Re: [Intel-gfx] [RFC i-g-t PATCH 2/3] igt/gem_wait: Use new igt_dummyload api

2016-10-13 Thread Abdiel Janulgue
On 10/12/2016 03:07 PM, Chris Wilson wrote: > On Wed, Oct 12, 2016 at 02:59:53PM +0300, Abdiel Janulgue wrote: >> Signed-off-by: Abdiel Janulgue >> --- >> tests/gem_wait.c | 77 >> +--- >> 1 file changed, 12 insertions(+), 65 deletions(-) >

Re: [Intel-gfx] [RFC 6/7] lib/scatterlist: Add sg_trim_table

2016-10-13 Thread Chris Wilson
On Thu, Oct 13, 2016 at 10:04:03AM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > *** BROKEN *** RFC only *** BROKEN *** > > In cases where it is hard to know to minimum numbers of ents > table will need to hold at sg_alloc_time, and we end up with > a table with unused sg entries at it

Re: [Intel-gfx] [patch] drm/i915: fix a read size argument

2016-10-13 Thread Eric Engestrom
On Thu, Oct 13, 2016 at 11:55:08AM +0300, Dan Carpenter wrote: > We want to read 3 bytes here, but because the parenthesis are in the > wrong place we instead read: > > sizeof(intel_dp->edp_dpcd) == sizeof(intel_dp->edp_dpcd) > > which is one byte. > > Fixes: fe5a66f91c88 ("drm/i915: Read

Re: [Intel-gfx] [RFC 1/7] drm/i915: Extract sg creation into a helper

2016-10-13 Thread Chris Wilson
On Thu, Oct 13, 2016 at 10:03:58AM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > In order to reuse the same logic in several places in the driver, > extract the logic which adds pages to the sg list and does the > potential coalescing, into separate functions. > > Code wanting to build

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Skip unbinding large unmappable global buffers

2016-10-13 Thread Patchwork
== Series Details == Series: drm/i915: Skip unbinding large unmappable global buffers URL : https://patchwork.freedesktop.org/series/13702/ State : warning == Summary == Series 13702v1 drm/i915: Skip unbinding large unmappable global buffers https://patchwork.freedesktop.org/api/1.0/series/137

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/hsw: Fix GPU hang during resume from S3-devices state

2016-10-13 Thread Imre Deak
On ke, 2016-10-12 at 21:32 +0300, Saarinen, Jani wrote: > > == Series Details == > > > > Series: drm/i915/hsw: Fix GPU hang during resume from S3-devices state > > URL   : https://patchwork.freedesktop.org/series/13654/ > > State : warning > > > > == Summary == > > > > Series 13654v1 drm/i915/hs

Re: [Intel-gfx] [RFC 5/7] drm/i915: Use i915_sg_create for dmabuf

2016-10-13 Thread Chris Wilson
On Thu, Oct 13, 2016 at 10:04:02AM +0100, Tvrtko Ursulin wrote: > - src = obj->pages->sgl; > - dst = st->sgl; > - for (i = 0; i < obj->pages->nents; i++) { > - sg_set_page(dst, sg_page(src), src->length, 0); > - dst = sg_next(dst); > - src = sg_next(s

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Allow disabling error capture

2016-10-13 Thread Jani Nikula
On Tue, 11 Oct 2016, Chris Wilson wrote: > +#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) > {"i915_error_state", &i915_error_state_fops}, > +#endif IGT tests/drm_lib.sh tests for existence of i915_error_state to find the debugfs path for i915. Perhaps not the cleverest thing to do, but I wo

[Intel-gfx] [RFC 6/7] lib/scatterlist: Add sg_trim_table

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin *** BROKEN *** RFC only *** BROKEN *** In cases where it is hard to know to minimum numbers of ents table will need to hold at sg_alloc_time, and we end up with a table with unused sg entries at its end, this function will trim (free) the unused sg entry blocks and adjust th

[Intel-gfx] [RFC 0/7] Save megabytes of wasted sg entries

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin We can decrease the i915 slab usage by 1-6 MiB* easily by doing more sg list coalescing and having the tables at the correct size at the same time. This series extracts the sg table building code into helper so that all places in i915 can benefit. Another problem is that it

[Intel-gfx] [RFC 3/7] drm/i915: Use i915_sg_create for partial views

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Simplify the partial view creation loop by using the newly introduced helpers. It also allows the list to be coalesced when possbile. New i915_sg_add_dma helper was added to allow adding just the DMA address entries to the list. Signed-off-by: Tvrtko Ursulin --- drivers/

[Intel-gfx] [RFC 7/7] drm/i915: Trim sg table after creating it

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Since most of our callers do not know in advance how many entries in the sg table they will need, it is beneficial to trim the table after it has been created. Use the newly added sg_trim_table to do that when i915_sg_complete is called. Before we were wasting between 1-2 M

[Intel-gfx] [RFC 4/7] drm/i915: Use i915_sg_create for rotated pages view

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin As for the partial view, just simplifies the loop and enables entry coalescing. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem_gtt.c | 42 + 1 file changed, 14 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm

[Intel-gfx] [RFC 1/7] drm/i915: Extract sg creation into a helper

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin In order to reuse the same logic in several places in the driver, extract the logic which adds pages to the sg list and does the potential coalescing, into separate functions. Code wanting to build the sg table needs to do the following: 1. Call i915_sg_create to create the

[Intel-gfx] [RFC 5/7] drm/i915: Use i915_sg_create for dmabuf

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin As for the earlier ones, it simplifies the loop and enables entry colaescing. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem_dmabuf.c | 45 +++--- 1 file changed, 20 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/i

[Intel-gfx] [RFC 2/7] drm/i915: Use i915_sg_create for userptr

2016-10-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Now that we have a helper which builds the sg lists, use it from the userptr code as well. To do this we first export the API and add kerneldoc for it. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_drv.h | 33 + drivers/gpu/drm/i915/i

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