On 11/30/16 at 03:25pm, Ville Syrjälä wrote:
> On Thu, Nov 24, 2016 at 05:03:20PM +0800, Dave Young wrote:
> > On 11/24/16 at 10:53am, Jani Nikula wrote:
> > > On Thu, 24 Nov 2016, Dave Young wrote:
> > > > I see a lot of below warning:
> > >
> > > No, we must not hide this under the carpet. Ther
On ke, 2016-11-30 at 17:43 +0200, Jani Nikula wrote:
> Duplicating the PCI ID for IS_FOO checks is redundant for a bunch of
> platforms. Simplify.
>
> Signed-off-by: Jani Nikula
This should do pure good when optimizing the checks.
Reviewed-by: Joonas Lahtinen
Regards, Joonas
--
Joonas Lahtin
On 12/01/16 at 04:00pm, Dave Young wrote:
> On 11/30/16 at 03:25pm, Ville Syrjälä wrote:
> > On Thu, Nov 24, 2016 at 05:03:20PM +0800, Dave Young wrote:
> > > On 11/24/16 at 10:53am, Jani Nikula wrote:
> > > > On Thu, 24 Nov 2016, Dave Young wrote:
> > > > > I see a lot of below warning:
> > > >
On ke, 2016-11-30 at 17:43 +0200, Jani Nikula wrote:
> Consistency FTW.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Joonas Lahtinen
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
___
Intel-gfx mailing list
Intel-g
From: Swati Dhingra
The patch introduces a new pseudo filesystem type, named 'drmfs' which is
intended to house the files for the data generated by drm subsystem that
cannot be accommodated by any of the existing filesystems.
The filesystem is modelled on the lines of existing pseudo-filesystems
From: Swati Dhingra
Currently, for the purpose of providing output debug/loggging/crc and various
other kinds of data from DRM layer to userspace, we don't have a standard
filesystem, which would suffice for all the usecases. The filesystems used
currently such as debugfs/sysfs have their own con
From: Swati Dhingra
During drm module initialization, drm_core_init initializes the drmfs
filesystem and register this with kernel. A driver specific directory is created
inside drmfs root, and dentry of this directory is saved for subsequent use
by the driver (e.g. i915). The driver can then cre
From: Swati Dhingra
In the current scenario, the relay API fit well only with debugfs, due to
availability of parent dentry. Any other existing filesystem was not feasible
for
holding guc logs, due to incompatibility with relay. But this makes the guc_log
file unavailable on the production kern
On ke, 2016-11-30 at 17:43 +0200, Jani Nikula wrote:
> Add more consistency to our naming. Pineview remains the outlier. Keep
> using code names for gen5+.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Joonas Lahtinen
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corpor
On Thu, Dec 01, 2016 at 12:32:31PM +0530, swati.dhin...@intel.com wrote:
> +int drmfs_init(void)
> +{
> + int retval;
> +
> + retval = sysfs_create_mount_point(kernel_kobj, "drm");
> + if (retval)
> + return -EINVAL;
> +
> + retval = register_filesystem(&drm_fs_type);
>
Ok, transition is over, old drm-intel-nightly and rerere-cache is removed.
I hope that's enough of a hint to everyone else who missed the memo ;-)
-Daniel
On Thu, Nov 24, 2016 at 11:48:47AM +0100, Daniel Vetter wrote:
> Hi all,
>
> So it's finally done, drm-misc is split out into a separate repo:
On Thu, Dec 01, 2016 at 12:32:31PM +0530, swati.dhin...@intel.com wrote:
> diff --git a/fs/Kconfig b/fs/Kconfig
> index 4bd03a2..7d0ac20 100644
> --- a/fs/Kconfig
> +++ b/fs/Kconfig
> @@ -200,6 +200,15 @@ config HUGETLBFS
> config HUGETLB_PAGE
> def_bool HUGETLBFS
>
> +config DRMFS
> +
On Thu, Dec 01, 2016 at 12:32:32PM +0530, swati.dhin...@intel.com wrote:
> diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
> index 84fcfcb..ead360bd 100644
> --- a/drivers/gpu/drm/drm_drv.c
> +++ b/drivers/gpu/drm/drm_drv.c
> @@ -688,6 +688,14 @@ int drm_dev_register(struct drm_d
On Thu, 2016-12-01 at 00:07 -0800, Chris Wilson wrote:
> On Thu, Dec 01, 2016 at 12:32:31PM +0530, swati.dhin...@intel.com wrote:
> > +int drmfs_init(void)
> > +{
> > + int retval;
> > +
> > + retval = sysfs_create_mount_point(kernel_kobj, "drm");
> > + if (retval)
> > + return -EIN
On Thu, 2016-12-01 at 00:11 -0800, Chris Wilson wrote:
> On Thu, Dec 01, 2016 at 12:32:31PM +0530, swati.dhin...@intel.com wrote:
> > diff --git a/fs/Kconfig b/fs/Kconfig
> > index 4bd03a2..7d0ac20 100644
> > --- a/fs/Kconfig
> > +++ b/fs/Kconfig
> > @@ -200,6 +200,15 @@ config HUGETLBFS
> > confi
On Thu, 2016-12-01 at 00:15 -0800, Chris Wilson wrote:
> On Thu, Dec 01, 2016 at 12:32:32PM +0530, swati.dhin...@intel.com wrote:
> > diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
> > index 84fcfcb..ead360bd 100644
> > --- a/drivers/gpu/drm/drm_drv.c
> > +++ b/drivers/gpu/drm/d
== Series Details ==
Series: Introduce drmfs pseudo filesystem for drm subsystem (rev2)
URL : https://patchwork.freedesktop.org/series/16203/
State : success
== Summary ==
Series 16203v2 Introduce drmfs pseudo filesystem for drm subsystem
https://patchwork.freedesktop.org/api/1.0/series/16203/
On Thu, Dec 01, 2016 at 02:01:59PM +0530, sourab gupta wrote:
> On Thu, 2016-12-01 at 00:07 -0800, Chris Wilson wrote:
> > On Thu, Dec 01, 2016 at 12:32:31PM +0530, swati.dhin...@intel.com wrote:
> > > +int drmfs_init(void)
> > > +{
> > > + int retval;
> > > +
> > > + retval = sysfs_create_mount_po
On Thu, 01 Dec 2016, swati.dhin...@intel.com wrote:
> Currently, for the purpose of providing output debug/loggging/crc and various
> other kinds of data from DRM layer to userspace, we don't have a standard
> filesystem, which would suffice for all the usecases. The filesystems used
> currently su
On Thu, Dec 01, 2016 at 02:07:19PM +0530, sourab gupta wrote:
> On Thu, 2016-12-01 at 00:11 -0800, Chris Wilson wrote:
> > On Thu, Dec 01, 2016 at 12:32:31PM +0530, swati.dhin...@intel.com wrote:
> > > diff --git a/fs/Kconfig b/fs/Kconfig
> > > index 4bd03a2..7d0ac20 100644
> > > --- a/fs/Kconfig
>
On Thu, Dec 01, 2016 at 10:48:31AM +0200, Jani Nikula wrote:
> On Thu, 01 Dec 2016, swati.dhin...@intel.com wrote:
> > Currently, for the purpose of providing output debug/loggging/crc and
> > various
> > other kinds of data from DRM layer to userspace, we don't have a standard
> > filesystem, whi
From: Rodrigo Vivi
The following LP platform inherits a lot of this platform
So let's simplify here to re-use this later.
v2: Keep ddb_size out of the new macro.
v3: Rebase (has_decoupled_mmio). (Imre)
Signed-off-by: Rodrigo Vivi
Signed-off-by: Ander Conselvan de Oliveira
Reviewed-by: Imre D
Move the GuC invalidation of its ggtt TLB to where we perform the ggtt
modification rather than proliferate it into all the callers of the
insert (which may or may not in fact have to do the insertion).
v2: Just do the guc invalidate unconditionally, (afaict) it has no impact
without the guc loade
---
drivers/gpu/drm/i915/i915_params.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index 0e280fbd52f1..ef1e9921a2af 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_p
Hi Dave, presumably final fixes for 4.9.
BR,
Jani.
The following changes since commit e5517c2a5a49ed5e99047008629f1cd60246ea0e:
Linux 4.9-rc7 (2016-11-27 13:08:04 -0800)
are available in the git repository at:
git://anongit.freedesktop.org/git/drm-intel tags/drm-intel-fixes-2016-12-01
fo
On 01/12/2016 09:46, Chris Wilson wrote:
Move the GuC invalidation of its ggtt TLB to where we perform the ggtt
modification rather than proliferate it into all the callers of the
insert (which may or may not in fact have to do the insertion).
v2: Just do the guc invalidate unconditionally, (af
On Thu, Dec 01, 2016 at 10:06:25AM +, Tvrtko Ursulin wrote:
>
> On 01/12/2016 09:46, Chris Wilson wrote:
> >Move the GuC invalidation of its ggtt TLB to where we perform the ggtt
> >modification rather than proliferate it into all the callers of the
> >insert (which may or may not in fact have
On 14/11/2016 08:57, Chris Wilson wrote:
This emulates execlists on top of the GuC in order to defer submission of
requests to the hardware. This deferral allows time for high priority
requests to gazump their way to the head of the queue, however it nerfs
the GuC by converting it back into a si
On 01/12/2016 10:26, Chris Wilson wrote:
On Thu, Dec 01, 2016 at 10:06:25AM +, Tvrtko Ursulin wrote:
On 01/12/2016 09:46, Chris Wilson wrote:
Move the GuC invalidation of its ggtt TLB to where we perform the ggtt
modification rather than proliferate it into all the callers of the
insert (
On Thu, Dec 01, 2016 at 10:49:31AM +, Tvrtko Ursulin wrote:
>
> On 01/12/2016 10:26, Chris Wilson wrote:
> >On Thu, Dec 01, 2016 at 10:06:25AM +, Tvrtko Ursulin wrote:
> >>
> >>On 01/12/2016 09:46, Chris Wilson wrote:
> >>>Move the GuC invalidation of its ggtt TLB to where we perform the g
Fixes an issue when calling igt_spin_batch_set_timeout and then
tearing down the spinner right away before it has the chance
to timeout, causes the associated signal handler to linger. Make
sure to remove the handler on the destructor as well.
Signed-off-by: Abdiel Janulgue
---
lib/igt_dummyload
Signed-off-by: Abdiel Janulgue
---
tests/kms_flip.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/kms_flip.c b/tests/kms_flip.c
index 289335a..f744b3d 100644
--- a/tests/kms_flip.c
+++ b/tests/kms_flip.c
@@ -757,9 +757,9 @@ static unsigned int run_test_step(struct
Hello,
I'm really enjoying the Intel Skylake graphics in Fedora 24/25 and
Archlinux; thanks for all of the great work. I remember the old XIG
AcceleratedX drivers from years ago...
I would rather get back to using CentOS on my Skylake development
laptop; Fedora 25 has failed on my twice in two w
Adjust the description and constants in the timing check to match each other.
Relax the timing constraint to prevent false positives in vblank interval
checking.
---
tests/kms_flip.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/tests/kms_flip.c b/tests/kms_flip.c
i
Add explanations of the checks and note the way the constants were derived.
Tweak the constants to reflect their purpose better.
---
tests/kms_setmode.c | 36 +---
1 file changed, 33 insertions(+), 3 deletions(-)
diff --git a/tests/kms_setmode.c b/tests/kms_setmode
Hi guys,
On Nov 30 2016, at 10:49 pm, Rob Clark wrote:
> yeah, {cgit,anongit}.fd.o have been having problems all day.. (the ssh
git urls for folks who have push access work fine).. although it has
worked for me a couple times today, given enough time.
>
> (not sure if we have git
Hey,
Mahesh Kumar schreef op ma 28-11-2016 om 18:37 [+0530]:
> Hi,
>
> Will keep WA number in commit message/WA location.
> thanks,
Sounds good, with that fixed patches 1-5 and 7 look good to me.
I think patch 6 will no longer be required since the workaround status
will also be kept inside inte
On 01/12/2016 10:57, Chris Wilson wrote:
On Thu, Dec 01, 2016 at 10:49:31AM +, Tvrtko Ursulin wrote:
On 01/12/2016 10:26, Chris Wilson wrote:
On Thu, Dec 01, 2016 at 10:06:25AM +, Tvrtko Ursulin wrote:
On 01/12/2016 09:46, Chris Wilson wrote:
Move the GuC invalidation of its ggtt T
== Series Details ==
Series: Geminilake enabling (rev8)
URL : https://patchwork.freedesktop.org/series/15118/
State : success
== Summary ==
Series 15118v8 Geminilake enabling
https://patchwork.freedesktop.org/api/1.0/series/15118/revisions/8/mbox/
fi-bdw-5557u total:245 pass:230 dwarn:
On Thu, 01 Dec 2016, Chris Pemberton wrote:
> Hello,
>
> I'm really enjoying the Intel Skylake graphics in Fedora 24/25 and
> Archlinux; thanks for all of the great work. I remember the old XIG
> AcceleratedX drivers from years ago...
>
> I would rather get back to using CentOS on my Skylake deve
On Thu, Dec 01, 2016 at 10:45:51AM +, Tvrtko Ursulin wrote:
>
> On 14/11/2016 08:57, Chris Wilson wrote:
> >This emulates execlists on top of the GuC in order to defer submission of
> >requests to the hardware. This deferral allows time for high priority
> >requests to gazump their way to the
On Thu, Dec 01, 2016 at 12:58:45PM +0200, Abdiel Janulgue wrote:
> Fixes an issue when calling igt_spin_batch_set_timeout and then
> tearing down the spinner right away before it has the chance
> to timeout, causes the associated signal handler to linger. Make
> sure to remove the handler on the de
On Thu, Dec 01, 2016 at 12:58:46PM +0200, Abdiel Janulgue wrote:
> Signed-off-by: Abdiel Janulgue
> ---
> tests/kms_flip.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/tests/kms_flip.c b/tests/kms_flip.c
> index 289335a..f744b3d 100644
> --- a/tests/kms_flip.c
> +
On Thu, 2016-12-01 at 11:15 +, Patchwork wrote:
> == Series Details ==
>
> Series: Geminilake enabling (rev8)
> URL : https://patchwork.freedesktop.org/series/15118/
> State : success
I pushed up to patch 4. Thanks for the reviews so far.
Ander
>
> == Summary ==
>
> Series 15118v8 Gemi
Op 28-11-16 om 18:37 schreef ville.syrj...@linux.intel.com:
> From: Ville Syrjälä
>
> Pasing dev_priv instead of dev is the future. Let's make the vlv/chv wm
> functions respect that idea.
^Passing
With that fixed, patch 1-10
Reviewed-by: Maarten Lankhorst
When I was looking at converting VLV/
== Series Details ==
Series: series starting with [v2,1/2] HAX drm/i915: Enable guc submission
URL : https://patchwork.freedesktop.org/series/16210/
State : success
== Summary ==
Series 16210v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/16210/revisions/1/mbox/
Op 28-11-16 om 18:37 schreef ville.syrj...@linux.intel.com:
> From: Ville Syrjälä
>
> Each DSPARB register can house bits for two separate pipes, hence
> we must protect the registers during reprogramming so that parallel
> FIFO reconfigurations happening simultaneosly on multiple pipes won't
> co
On Wed, 30 Nov 2016, Daniel Vetter wrote:
> On Tue, Nov 29, 2016 at 05:00:55PM +, Robert Bragg wrote:
>> +.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
>> + :functions: i915_perf_init
>> +.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
>> + :functions: i915_perf_fini
>> +.. kernel-doc:
v5:
- reword gem_info to gem_sanitychecks (Chris Wilson)
- remove subgroups/subtests for gem_exec_store and gem_sanitycheck
(Chris Wilson)
v4:
- adjust test to make use of lib/igt_kmod
- replaced SW_FINISH with SET_CACHEING (Chris Wilson)
v3:
- fix passing boolean value as flags to igt_kmod_unloa
Latest changes include addressing comments from previous version and include
some notes about driver loading/unloading when using in combination to
drm_open_driver().
This series adds some library support to help converting sh scripts to C
version. Based on that I've converted drv_module_reload_ba
lib/igt_aux: Added igt_pkill and igt_lsof helper.
lib/igt_kmod: Added load/unload kmod helpers.
v7:
- document the case where leaving stray fd from drm_open_driver()
might fail reloading the driver.
- list also current opened files from /dev/dri in case we could not
unload the driver.
- convert ig
v2:
- use igt_sysfs_get_boolean() to get gvt status (Chris Wilson)
- do not hard-fail when i915 module could not be loaded/unloaded (Chris
Wilson)
Signed-off-by: Marius Vlad
---
lib/igt_gvt.c | 37 ++---
tests/gvt_basic.c | 2 +-
2 files changed, 19 insertion
The debug output for a HSW machine with two connectors (VGA and HDMI):
DEBUG: card0-VGA-1: mean.max 12896229,00ns, 12896,23us, 12,90ms, mean.avg
12785055,80ns, 12785,06us, 12,79ms
WARNING: card0-VGA-1: probe time exceed 10ms, max=12,90ms, avg=12,79ms
DEBUG: card0-HDMI-A-1: mean.max 781433,00ns, 7
On Wed, Nov 30, 2016 at 03:31:28PM -0800, Anusha Srivatsa wrote:
> From: Peter Antoine
>
> HuC firmware css header has almost exactly same definition as GuC
> firmware except for the sw_version. Also, add a new member fw_type
> into intel_uc_fw to indicate what kind of fw it is. So, the loader
>
On 01/12/2016 11:18, Chris Wilson wrote:
On Thu, Dec 01, 2016 at 10:45:51AM +, Tvrtko Ursulin wrote:
On 14/11/2016 08:57, Chris Wilson wrote:
This emulates execlists on top of the GuC in order to defer submission of
requests to the hardware. This deferral allows time for high priority
req
The platform flags in device info are (mostly) mutually
exclusive. Replace the flags with an enum. Add the platform enum also
for platforms that previously didn't have a flag, and give them codename
logging in dmesg.
Pineview remains an exception, the platform being G33 for that.
v2: Sort enum by
On Thu, Dec 01, 2016 at 12:45:18PM +, Tvrtko Ursulin wrote:
>
> On 01/12/2016 11:18, Chris Wilson wrote:
> >On Thu, Dec 01, 2016 at 10:45:51AM +, Tvrtko Ursulin wrote:
> >>
> >>On 14/11/2016 08:57, Chris Wilson wrote:
> >>>+static bool i915_guc_dequeue(struct intel_engine_cs *engine)
> >>>
On Wed, Nov 30, 2016 at 03:31:33PM -0800, Anusha Srivatsa wrote:
> From: Peter Antoine
>
> The HuC authentication is done by host2guc call. The HuC RSA keys
> are sent to GuC for authentication.
>
> v2: rebased on top of drm-intel-nightly.
> changed name format and upped version 1.7.
> v3: r
On Wed, Nov 30, 2016 at 03:31:34PM -0800, Anusha Srivatsa wrote:
> From: Peter Antoine
>
> This patch will allow for getparams to return the status of the HuC.
> As the HuC has to be validated by the GuC this patch uses the validated
> status to show when the HuC is loaded and ready for use. You
On 30/11/2016 23:31, Anusha Srivatsa wrote:
This patch adds the HuC Loading for the BXT by using
the updated file construction.
Version 1.7 of the HuC firmware.
v2: rebased.
v3: rebased on top of drm-tip
Cc: Jeff Mcgee
Signed-off-by: Anusha Srivatsa
Reviewed-by: Jeff McGee
---
drivers/gpu
On Tue, 2016-11-15 at 14:08 +0200, Jani Nikula wrote:
> Request the GPIO by index through the consumer API. For now, use a
> quick
> hack to store the already requested ones, simply because I have no
> idea
> whether this actually works or not, and I have no way to test it.
>
> Cc: Mika Kahola
>
On Thu, Dec 01, 2016 at 12:56:16PM +0100, Maarten Lankhorst wrote:
> Op 28-11-16 om 18:37 schreef ville.syrj...@linux.intel.com:
> > From: Ville Syrjälä
> >
> > Each DSPARB register can house bits for two separate pipes, hence
> > we must protect the registers during reprogramming so that parallel
== Series Details ==
Series: drm/i915: introduce platform enum (rev2)
URL : https://patchwork.freedesktop.org/series/16170/
State : success
== Summary ==
Series 16170v2 drm/i915: introduce platform enum
https://patchwork.freedesktop.org/api/1.0/series/16170/revisions/2/mbox/
Test gem_exec_flu
On Tue, Nov 29, 2016 at 09:40:29PM +0200, Imre Deak wrote:
> For LSPCON initialization during system resume we need AUX
> functionality, but we call the corresponding encoder reset hook with all
> interrupts disabled. Without interrupts we'll do a poll-wait for AUX
> transfer completions, which add
Hi,
On 30/11/2016 23:31, Anusha Srivatsa wrote:
The HuC loading process is similar to GuC. The intel_uc_fw_fetch()
is used for both cases.
HuC loading needs to be before GuC loading. The WOPCM setting must
be done early before loading any of them.
v2: rebased on-top of drm-intel-nightly.
r
If seqno is not incrementing but head is moving,
we declare hang but much slower. Add test to check
that this mechanism is working properly.
Signed-off-by: Mika Kuoppala
---
tests/gem_reset_stats.c | 75 +
1 file changed, 75 insertions(+)
diff --g
Client will get banned from creating new context
if it has managed to get > 3 context banned.
Signed-off-by: Mika Kuoppala
---
tests/gem_reset_stats.c | 47 ++-
1 file changed, 42 insertions(+), 5 deletions(-)
diff --git a/tests/gem_reset_stats.c b/te
Now that we replay the non guilty contexts and always replay
the default ctx, even when guilty, the assumptions of how many
active and pending batches there was in the time of reset has
changed.
Driver doesn't increment pending counts for contexts that it
considered unaffected by reset. Because it
On ti, 2016-11-29 at 21:53 +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/lspcon: Enable AUX interrupts for resume time initialization
> (rev2)
> URL : https://patchwork.freedesktop.org/series/16106/
> State : success
>
> == Summary ==
>
> Series 16106v2 drm/i915/lspcon:
How about a patch 0 to enable hang testing contexts on all rings now?
Then exploration of how one ring affects another...
You will want to use busy batches to load the engines without hanging,
that will be tricky...
On Thu, Dec 01, 2016 at 03:31:43PM +0200, Mika Kuoppala wrote:
> Now that we repl
On Thu, Dec 01, 2016 at 03:31:44PM +0200, Mika Kuoppala wrote:
> If seqno is not incrementing but head is moving,
> we declare hang but much slower. Add test to check
> that this mechanism is working properly.
>
> Signed-off-by: Mika Kuoppala
> ---
> tests/gem_reset_stats.c | 75
> +
On Thu, Dec 01, 2016 at 03:31:45PM +0200, Mika Kuoppala wrote:
> Client will get banned from creating new context
> if it has managed to get > 3 context banned.
I'm not thrilled about baking that magic number into an ABI requirement.
Just make it N bans, test timing out after say 120s of happines
From: Tvrtko Ursulin
Makes all GEM object constructors consistent.
v2: Fix compilation in GVT code.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson (v1)
Reviewed-by: Joonas Lahtinen (v1)
---
drivers/gpu/drm/i915/gvt/cmd_parser.c | 5 ++---
drivers/gpu/drm/i915/i915_drv.h
From: Tvrtko Ursulin
Where it is more appropriate and also to be consistent with
the direction of the driver.
v2: Leave out object alloc/free inlining. (Joonas Lahtinen)
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.h
From: Tvrtko Ursulin
Autumn of churn continues. :)
This series tidies GEM object construction to take dev_priv instead of dev
in all cases and also does a bit of random tidy in the driver load/init code.
Basically functions which only need dev_priv are changed to take dev_priv
instead of dev. T
From: Tvrtko Ursulin
Simplify the code by passing the right argument in.
v2: Commit message. (Joonas Lahtinen)
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.c | 4 ++--
drivers/gpu/drm/i915/i915_drv.h | 4 ++-
From: Tvrtko Ursulin
Simplifies the code to pass the right parameter in.
v2: Commit message. (Joonas Lahtinen)
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.c | 8
drivers/gpu/drm/i915/i915_drv.h
From: Tvrtko Ursulin
Like GEM init, GUC init, MOCS init and context creation.
Enables them to lose dev_priv locals.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.c| 31 ++--
drivers/
From: Tvrtko Ursulin
Since it does not need dev at all.
Also change the stored pointer in struct i915_error_state_file_priv
to i915.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_debugfs.c | 8
drivers/gpu/drm/i
From: Tvrtko Ursulin
They are only used in i915_drv.c so a forward declaration is enough.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.c | 5 -
drivers/gpu/drm/i915/i915_drv.h | 3 ---
2 files changed, 4 insertions
From: Tvrtko Ursulin
Function actually wants dev_priv so give it to it.
v2: Commit message. (Joonas Lahtinen)
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/intel_drv.h | 2 +-
drivers/gp
From: Tvrtko Ursulin
dev_priv is more appropriate for these so converting saves
some lines of source.
v2: Commit message and keep the pdev local variable. (Joonas Lahtinen)
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson (v1)
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i91
From: Tvrtko Ursulin
dev_priv is more appropriate since it is used much more in these.
v2: Commit message and keep the local pdev variable. (Joonas Lahtinen)
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.c | 4 ++-
Op 28-11-16 om 18:37 schreef ville.syrj...@linux.intel.com:
> From: Ville Syrjälä
>
> On VLV/CHV some of the watermark values are split across two registers:
> low order bits in one, and high order bits in another. So we may not be
> able to update a single watermark value atomically, and thus we
Op 01-12-16 om 14:13 schreef Ville Syrjälä:
> On Thu, Dec 01, 2016 at 12:56:16PM +0100, Maarten Lankhorst wrote:
>> Op 28-11-16 om 18:37 schreef ville.syrj...@linux.intel.com:
>>> From: Ville Syrjälä
>>>
>>> Each DSPARB register can house bits for two separate pipes, hence
>>> we must protect the
== Series Details ==
Series: GEM object create and driver init dev_priv cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/16162/
State : warning
== Summary ==
Series 16162v2 GEM object create and driver init dev_priv cleanups
https://patchwork.freedesktop.org/api/1.0/series/16162/
Op 28-11-16 om 18:37 schreef ville.syrj...@linux.intel.com:
> From: Ville Syrjälä
>
> Rather than accessing crtc->config in vlv_compute_wm_level() let's
> pass in the crtc state explicitly. One step closer to atomic.
>
> Signed-off-by: Ville Syrjälä
Yay. All users of intel_crtc->config have to di
Hi,
On 29-11-16 14:06, Hans de Goede wrote:
p.s.
I'm also trying to come up with some patches which properly
integrate pwm-lpss with the i915 driver instead of it
throwing a "Failed to own the pwm chip" error. But as soon
as I hook up things so that pwm_get() returns the pwm-lpss
pwm0 I hit:
On Wed, Nov 16, Olaf Hering wrote:
> During boot into a current openSUSE Tumbleweed 20161108 this laptop
> starts to hang sometimes with 4.8.x. Today I was able to catch this
> crash in __wake_up_common caused by i915 or drm or whatever:
>
> ...
> [ 69.851635] BUG: unable to handle kernel NULL
On my Cherrytrail CUBE iwork8 Air tablet PIPE-A would get stuck on loading
i915 at boot 1 out of every 3 boots, resulting in a non functional LCD.
Once the i915 driver has successfully loaded, the panel can be disabled /
enabled without hitting this issue.
The getting stuck is caused by vlv_init_d
This patch adds variable to check for X_tiled & y_tiled planes, instead
of always checking against framebuffer-modifiers.
Changes:
- Created separate patch as per Paulo's comment
- Added x_tiled variable as well
Changes since V2:
- Incorporate Paulo's comments
- Rebase
Signed-off-by: Mahesh K
This patch changes Watermak calculation to fixed point calculation.
Problem with current calculation is during plane_blocks_per_line
calculation we divide intermediate blocks with min_scanlines and
takes floor of the result because of integer operation.
hence we end-up assigning less blocks than re
This patch adds IPC support for platforms. This patch enables IPC
only for BXT/KBL platform as for SKL recommendation is to keep is disabled.
IPC (Isochronous Priority Control) is the hardware feature, which
dynamically controles the memory read priority of Display.
When IPC is enabled, plane read
This series implements following set of functionality
Implement IPC WA's for Broxton/KBL
Enable IPC in supported platforms
Convert WM calculation to fixed point calculation
Calculation of System memory Bandwidth for SKL/KBL/BXT
Implementation of Arbitrated me
This patch adds support to decode system memory bandwidth
which will be used for arbitrated display memory percentage
calculation in GEN9 based system.
Changes from v1:
- Address comments from Paulo
- implement decode function for SKL/KBL also
Changes from v2:
- Rewrite the code as per HW team
Display Workarounds #1141
IPC (Isoch Priority Control) may cause underflows.
KBL WA: When IPC is enabled, watermark latency values must be increased
by 4us across all levels. This brings level 0 up to 6us.
Changes since V1:
- Add Workaround number in commit & code
Signed-off-by: Mahesh Kumar
R
Display Workarounds #1135
If IPC is enabled in BXT, display underruns are observed.
WA: The Line Time programmed in the WM_LINETIME register should be
half of the actual calculated Line Time.
Programmed Line Time = 1/2*Calculated Line Time
Changes since V1:
- Add Workaround number in commit & co
This patch Adds a function to extract intel_crtc_state from the
atomic_state, if not available it returns NULL.
Signed-off-by: Mahesh Kumar
Reviewed-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_drv.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/int
This patch implemnets Workariunds related to display arbitrated memory
bandwidth. These WA are applicabe for all gen-9 based platforms.
Changes since v1:
- Rebase on top of Paulo's patch series
Changes since v2:
- Address review comments
- Rebase/rework as per other patch changes in series
Chan
== Series Details ==
Series: GEN-9 Arbitrated Bandwidth WM WA's & IPC (rev3)
URL : https://patchwork.freedesktop.org/series/15562/
State : success
== Summary ==
Series 15562v3 GEN-9 Arbitrated Bandwidth WM WA's & IPC
https://patchwork.freedesktop.org/api/1.0/series/15562/revisions/3/mbox/
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