Re: [Intel-gfx] [igvt-g-dev] [PATCH 1/1] drm/i915/gvt: verify functions types in new_mmio_info()

On 2016.12.26 14:52:23 +0100, Nicolas Iooss wrote: > The current prototype of new_mmio_info() uses void* for parameters read > and write, which are functions with precise calling conventions > (argument types and return type). Write down these conventions in > new_mmio_info() definition. > > This

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: enable FBC on gen9+ too (rev3)

== Series Details == Series: series starting with [1/2] drm/i915: enable FBC on gen9+ too (rev3) URL : https://patchwork.freedesktop.org/series/17176/ State : success == Summary == Series 17176v3 Series without cover letter

[Intel-gfx] [PATCH 2/2] drm/i915: rewrite FBC's atomic CRTC-choosing code

Ville pointed out that intel_fbc_choose_crtc() is iterating over all planes instead of just the primary planes. There are no real consequences of this problem for HSW+, and for the other platforms it just means that in some obscure multi-screen cases we'll keep FBC disabled when we could have

[Intel-gfx] Updated drm-intel-testing

Hi all, 2nd round of stuff for 4.11: - DP link rate fixes (DK) - prep work for atomic wm updates on vlv/chv (Ville) - platform enumeration cleanup (Jani) - dsi fixes and cleaups (Hans de Goede) - gen9 wm fixes (Mahesh Kumar) - prep work for DP link failure fallback handling (Manasi) - introduce

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/1] drm/i915/gvt: verify functions types in new_mmio_info()

== Series Details == Series: series starting with [1/1] drm/i915/gvt: verify functions types in new_mmio_info() URL : https://patchwork.freedesktop.org/series/17210/ State : warning == Summary == Series 17210v1 Series without cover letter

[Intel-gfx] [PATCH 1/1] drm/i915/gvt: verify functions types in new_mmio_info()

The current prototype of new_mmio_info() uses void* for parameters read and write, which are functions with precise calling conventions (argument types and return type). Write down these conventions in new_mmio_info() definition. This has been reported by the following warnings when clang is used

Re: [Intel-gfx] [GLK MIPI DSI V2 2/9] drm/i915/glk: Program new MIPI DSI PHY registers for GLK

> -Original Message- > From: Chauhan, Madhav > Sent: Saturday, December 24, 2016 12:53 AM > To: Nikula, Jani ; intel-gfx@lists.freedesktop.org > Cc: Conselvan De Oliveira, Ander ; > Saarinen, Jani ;

Re: [Intel-gfx] [GLK MIPI DSI V2 3/9] drm/i915/glk: Add MIPIIO Enable/disable sequence

> -Original Message- > From: Nikula, Jani > Sent: Friday, December 23, 2016 7:40 PM > To: Chauhan, Madhav ; intel- > g...@lists.freedesktop.org > Cc: Conselvan De Oliveira, Ander ; > Saarinen, Jani ;

Re: [Intel-gfx] [PATCH v3] drm/i915: Move number of scalers initialization to runtime init

Hi, Please rb this patch. earlier patch rbed https://patchwork.freedesktop.org/patch/123962/ On 11/29/2016 11:23 AM, Nabendu Maiti wrote: In future patches, we require greater flexibility in describing the number of scalers available on each CRTC. To ease that transition we move the current

[Intel-gfx] [GIT PULL] GVT-g fixes for 4.10

Hi, This is current GVT-g device model fixes for 4.10. I need to base on v4.10-rc1 for merged vfio and KVMGT support. Thanks. Merry Christmas! --- The following changes since commit 7ce7d89f48834cefece7804d38fc5d85382edf77: Linux 4.10-rc1 (2016-12-25 16:13:08 -0800) are available in the git

Re: [Intel-gfx] [PATCH 0/7] drm/i915: Add pipe scaler for Gen9 in atomic path

Hi Ville, Please find more clarification on new pipe scaler design as asked in discussion. Please add your thoughts and suggest any change if have to do on the design. Notes on design:- A) Only on Gen9 case skylake_pfit_enable() is called B) Only on Gen9+, intel_crtc_atomic_check has call to