Re: [Intel-gfx] [PATCH] drm/probe-helpers: Drop locking from poll_enable

On Tue, Jan 10, 2017 at 05:10:50PM +, Chris Wilson wrote: > On Tue, Jan 10, 2017 at 05:34:08PM +0100, Daniel Vetter wrote: > > On Tue, Jan 10, 2017 at 03:17:44PM +, Chris Wilson wrote: > > > On Tue, Jan 10, 2017 at 03:29:10PM +0100, Daniel Vetter wrote: > > > > -void

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Prefer random replacement before eviction search

On ti, 2017-01-10 at 21:55 +, Chris Wilson wrote: > Performing an eviction search can be very, very slow especially for a > range restricted replacement. For example, a workload like > gem_concurrent_blit will populate the entire GTT and then cause aperture > thrashing. Since the GTT is a mix

Re: [Intel-gfx] [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format

On Tue, Jan 10, 2017 at 11:43:51PM +, Rodrigo Vivi wrote: > patch merged to dinq. thanks for patch and review. I already pinged Rodrigo about this on irc, but drm core patches need an ack from Dave for merging through a driver git tree. I've asked Rodrigo to update the dim scripting to catch

Re: [Intel-gfx] [alsa-devel] [PATCH v4 0/3] support DP MST audio

On Tue, Jan 10, 2017 at 9:49 AM, Takashi Iwai wrote: > On Tue, 10 Jan 2017 09:45:31 +0100, >> >-Original Message- >> >From: Takashi Iwai [mailto:ti...@suse.de] >> >Sent: Tuesday, January 10, 2017 4:19 PM >> >To: Yang, Libin >> >Cc: Daniel Vetter

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Extract reserving space in the GTT to a helper

On ti, 2017-01-10 at 21:55 +, Chris Wilson wrote: > Extract drm_mm_reserve_node + calling i915_gem_evict_for_node into its > own routine so that it can be shared rather than duplicated. > > Signed-off-by: Chris Wilson > Cc: Joonas Lahtinen

Re: [Intel-gfx] [PATCH 1/5] drm/i915: make intel_gvt_init() later instead of too early

On 2017.01.11 11:13:06 +0800, Jike Song wrote: > On 01/10/2017 02:52 PM, Zhenyu Wang wrote: > > Previously intel_gvt_init() was called very early even before > > MMIO initialization which had several drawbacks: > > - Have to handle MMIO access for initial MMIO state dump if golden > > state

Re: [Intel-gfx] [PATCH 1/5] drm/i915: make intel_gvt_init() later instead of too early

On 01/10/2017 02:52 PM, Zhenyu Wang wrote: > Previously intel_gvt_init() was called very early even before > MMIO initialization which had several drawbacks: > - Have to handle MMIO access for initial MMIO state dump if golden > state firmware is not available > - Hypervisor detection should

Re: [Intel-gfx] [PATCH 2/5] drm/i915/gvt: move intel iommu detection to intel_gvt_init()

On 01/11/2017 10:40 AM, Zhenyu Wang wrote: > On 2017.01.11 10:18:30 +0800, Jike Song wrote: >> On 01/10/2017 02:52 PM, Zhenyu Wang wrote: >>> Prepare to remove detect_host() hook. Move intel iommu detection early >>> in intel_gvt_init(). >>> >>> Signed-off-by: Zhenyu Wang

Re: [Intel-gfx] [PATCH 2/5] drm/i915/gvt: move intel iommu detection to intel_gvt_init()

On 2017.01.11 10:18:30 +0800, Jike Song wrote: > On 01/10/2017 02:52 PM, Zhenyu Wang wrote: > > Prepare to remove detect_host() hook. Move intel iommu detection early > > in intel_gvt_init(). > > > > Signed-off-by: Zhenyu Wang > > --- > > drivers/gpu/drm/i915/gvt/gvt.c

Re: [Intel-gfx] [PATCH 2/5] drm/i915/gvt: move intel iommu detection to intel_gvt_init()

On 01/10/2017 02:52 PM, Zhenyu Wang wrote: > Prepare to remove detect_host() hook. Move intel iommu detection early > in intel_gvt_init(). > > Signed-off-by: Zhenyu Wang > --- > drivers/gpu/drm/i915/gvt/gvt.c | 7 +++ > drivers/gpu/drm/i915/gvt/kvmgt.c | 6 --

Re: [Intel-gfx] [PATCH] drm/i915/psr: disable psr2 for resolution greater than 32X20

patch merged to dinq. thanks for the patch On Tue, Jan 10, 2017 at 12:48 PM Vivi, Rodrigo wrote: > Reviewed-by: Rodrigo Vivi > > On Tue, 2017-01-10 at 12:32 +0530, vathsala nagaraju wrote: > > PSR2 is restricted to work with panel resolutions

Re: [Intel-gfx] [PATCH 02/10] drm/i915/psr: program vsc header for psr2

patch merged to dinq. thanks for patch and review. On Wed, Jan 4, 2017 at 3:48 PM Jim Bride wrote: > On Mon, Jan 02, 2017 at 05:00:55PM +0530, vathsala nagaraju wrote: > > Function hsw_psr_setup handles vsc header setup for psr1 and > > skl_psr_setup_vsc handles vsc

Re: [Intel-gfx] [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format

patch merged to dinq. thanks for patch and review. On Mon, Jan 2, 2017 at 3:34 AM vathsala nagaraju < vathsala.nagar...@intel.com> wrote: > PSR2 vsc revision number hb2( as per table 6-11)is updated to > 4 or 5 based on Y cordinate and Colorimetry Format as below > 04h = 3D stereo + PSR/PSR2 +

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Use the MRU stack search after evicting

== Series Details == Series: series starting with [1/3] drm/i915: Use the MRU stack search after evicting URL : https://patchwork.freedesktop.org/series/17784/ State : success == Summary == Series 17784v1 Series without cover letter

[Intel-gfx] [PATCH 2/3] drm/i915: Extract reserving space in the GTT to a helper

Extract drm_mm_reserve_node + calling i915_gem_evict_for_node into its own routine so that it can be shared rather than duplicated. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_drv.h| 5 +++--

[Intel-gfx] [PATCH 3/3] drm/i915: Prefer random replacement before eviction search

Performing an eviction search can be very, very slow especially for a range restricted replacement. For example, a workload like gem_concurrent_blit will populate the entire GTT and then cause aperture thrashing. Since the GTT is a mix of active and inactive tiny objects, we have to search through

[Intel-gfx] [PATCH 1/3] drm/i915: Use the MRU stack search after evicting

When we evict from the GTT to make room for an object, the hole we create is put onto the MRU stack inside the drm_mm range manager. On the next search pass, we can speed up a PIN_HIGH allocation by referencing that stack for the new hole. v2: Pull together the 3 identical implements (ahem, a

Re: [Intel-gfx] [PATCH v4] drm/i915: Replace 4096 with PAGE_SIZE or I915_GTT_PAGE_SIZE

On Tue, Jan 10, 2017 at 06:17:42PM +0200, Joonas Lahtinen wrote: > On ti, 2017-01-10 at 14:47 +, Chris Wilson wrote: > > Start converting over from the byte count to its semantic macro, either > > we want to allocate the size of a physical page in main memory or we > > want the size of a

Re: [Intel-gfx] [PATCH] drm/i915/psr: disable psr2 for resolution greater than 32X20

Reviewed-by: Rodrigo Vivi On Tue, 2017-01-10 at 12:32 +0530, vathsala nagaraju wrote: > PSR2 is restricted to work with panel resolutions upto 3200x2000, > move the check to intel_psr_match_conditions and fully block psr. > > Cc: Rodrigo Vivi >

Re: [Intel-gfx] [RFCv2 19/19] drm/i915: Initial selftests for exercising eviction

On 20 December 2016 at 13:08, Chris Wilson wrote: > Very simple tests to just ask eviction to find some free space in a full > GTT and one with some available space. > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/i915_gem_evict.c

Re: [Intel-gfx] [RFCv2 18/19] drm/i915: Add initial selftests for i915_gem_gtt

On 20 December 2016 at 13:08, Chris Wilson wrote: > Simple starting point for adding seltests for i915_gem_gtt, first > try creating a ppGTT and filling it. > > Signed-off-by: Chris Wilson Reviewed-by: Matthew Auld

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: SKL+ render decompression support (rev2)

== Series Details == Series: drm/i915: SKL+ render decompression support (rev2) URL : https://patchwork.freedesktop.org/series/17507/ State : success == Summary == Series 17507v2 drm/i915: SKL+ render decompression support

Re: [Intel-gfx] [RFCv2 17/19] drm/i915: Add some mock tests for dmabuf interop

On 20 December 2016 at 13:08, Chris Wilson wrote: > Check that we can create both dmabuf and objects from dmabuf. > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/i915_gem_dmabuf.c | 5 + >

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [CI,1/5] drm/i915: Consolidate reset_request()

== Series Details == Series: series starting with [CI,1/5] drm/i915: Consolidate reset_request() URL : https://patchwork.freedesktop.org/series/17779/ State : warning == Summary == Series 17779v1 Series without cover letter

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Replace 4096 with PAGE_SIZE or I915_GTT_PAGE_SIZE (rev3)

== Series Details == Series: drm/i915: Replace 4096 with PAGE_SIZE or I915_GTT_PAGE_SIZE (rev3) URL : https://patchwork.freedesktop.org/series/17761/ State : warning == Summary == Series 17761v3 drm/i915: Replace 4096 with PAGE_SIZE or I915_GTT_PAGE_SIZE

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/probe-helpers: Drop locking from poll_enable

== Series Details == Series: drm/probe-helpers: Drop locking from poll_enable URL : https://patchwork.freedesktop.org/series/17768/ State : failure == Summary == Series 17768v1 drm/probe-helpers: Drop locking from poll_enable

[Intel-gfx] [CI 4/5] drm/i915: Mark all incomplete requests as -EIO when wedged

Similarly to a normal reset, after we mark the GPU as wedged (completely fubar and no more requests can be executed), set the error status on all the in flight requests. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Mika Kuoppala

[Intel-gfx] [CI 5/5] drm/i915: Rename i915_gem_engine_cleanup() to engine_set_wedged()

It has been some time since i915_gem_engine_cleanup was only called from the module unload path, and now it is only called when the GPU is wedged. Mika complained that the name is confusing, especially in light of the existence of i915_gem_cleanup_engines(). Signed-off-by: Chris Wilson

[Intel-gfx] [CI 2/5] drm/i915: Set guilty-flag on fence after detecting a hang

The struct dma_fence carries a status field exposed to userspace by sync_file. This is inspected after the fence is signaled and can convey whether or not the request completed successfully, or in our case if we detected a hang during the request (signaled via -EIO in SYNC_IOC_FILE_INFO). v2:

[Intel-gfx] [CI 1/5] drm/i915: Consolidate reset_request()

Always reset the requests of the guilty context, including the hung request that we tell the hardware to skip. This should help if the reprogram fails entirely, but more importantly makes the guilty path more uniform (and simplifies the subsequent patch to tweak the cancelled requests).

[Intel-gfx] [CI 3/5] drm/i915: Set an error status for a resubmitted request

Let userspace know if its request was resubmitted due to it being executed at the time of a global reset. In this case, the reset was for a guilty request on another engine, and this request was an innocent victim that will be re-executed upon restarting. However, since it was running at the time

Re: [Intel-gfx] [PATCH] drm/probe-helpers: Drop locking from poll_enable

On Tue, Jan 10, 2017 at 05:34:08PM +0100, Daniel Vetter wrote: > On Tue, Jan 10, 2017 at 03:17:44PM +, Chris Wilson wrote: > > On Tue, Jan 10, 2017 at 03:29:10PM +0100, Daniel Vetter wrote: > > > -void drm_kms_helper_poll_enable_locked(struct drm_device *dev) > > > +void

Re: [Intel-gfx] [PATCH v2 9/9] drm/i915: Add render decompression support

On Mon, Jan 09, 2017 at 11:20:57AM -0800, Jason Ekstrand wrote: > On Thu, Jan 5, 2017 at 7:14 AM, wrote: > > > From: Ville Syrjälä > > > > SKL+ display engine can scan out certain kinds of compressed surfaces > > produced by the

Re: [Intel-gfx] [PATCH v4] drm/i915: Replace 4096 with PAGE_SIZE or I915_GTT_PAGE_SIZE

On Tue, Jan 10, 2017 at 06:17:42PM +0200, Joonas Lahtinen wrote: > On ti, 2017-01-10 at 14:47 +, Chris Wilson wrote: > > Start converting over from the byte count to its semantic macro, either > > we want to allocate the size of a physical page in main memory or we > > want the size of a

Re: [Intel-gfx] 4.10-rc2 oops in DRM connector code

On 01/10/2017 02:31 AM, Daniel Vetter wrote: > commit e73ab00e9a0f1731f34d0620a9c55f5c30c4ad4e > Author: Daniel Vetter > Date: Sun Dec 18 14:35:45 2016 +0100 > > drm: prevent double-(un)registration for connectors > > Lack of that would perfectly explain that oops

Re: [Intel-gfx] [PATCH] drm/probe-helpers: Drop locking from poll_enable

On Tue, Jan 10, 2017 at 03:17:44PM +, Chris Wilson wrote: > On Tue, Jan 10, 2017 at 03:29:10PM +0100, Daniel Vetter wrote: > > It was only needed to protect the connector_list walking, see > > > > commit 8c4ccc4ab6f64e859d4ff8d7c02c2ed2e956e07f > > Author: Daniel Vetter

Re: [Intel-gfx] [RESEND PATCH v14 2/2] drm/i915: Put "cooked" vlank counters in frame CRC lines

On Tue, Jan 10, 2017 at 05:54:57PM +0200, Ville Syrjälä wrote: > On Tue, Jan 10, 2017 at 02:43:05PM +0100, Tomeu Vizoso wrote: > > Use drm_accurate_vblank_count so we have the full 32 bit to represent > > the frame counter and userspace has a simpler way of knowing when the > > counter wraps

Re: [Intel-gfx] [PATCH v4] drm/i915: Replace 4096 with PAGE_SIZE or I915_GTT_PAGE_SIZE

On ti, 2017-01-10 at 14:47 +, Chris Wilson wrote: > Start converting over from the byte count to its semantic macro, either > we want to allocate the size of a physical page in main memory or we > want the size of a virtual page in the GTT. 4096 could mean either, but > PAGE_SIZE and

Re: [Intel-gfx] [RESEND PATCH v14 2/2] drm/i915: Put "cooked" vlank counters in frame CRC lines

On Tue, Jan 10, 2017 at 02:43:05PM +0100, Tomeu Vizoso wrote: > Use drm_accurate_vblank_count so we have the full 32 bit to represent > the frame counter and userspace has a simpler way of knowing when the > counter wraps around. > > Signed-off-by: Tomeu Vizoso >

[Intel-gfx] ✗ Fi.CI.BAT: warning for New debugfs API for capturing CRC of frames

== Series Details == Series: New debugfs API for capturing CRC of frames URL : https://patchwork.freedesktop.org/series/17765/ State : warning == Summary == Series 17765v1 New debugfs API for capturing CRC of frames https://patchwork.freedesktop.org/api/1.0/series/17765/revisions/1/mbox/

Re: [Intel-gfx] [PATCH 0/5] Fix issues caused by gvt init timing

On Tue, Jan 10, 2017 at 02:52:47PM +0800, Zhenyu Wang wrote: > This trys to change origin gvt init time which was too early that caused > several > workarounds be applied in GVT-g device model driver. To move gvt init a bit > later, > we can fix up those without workarounds. > > First one in

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [CI,1/2] drm/i915: Include ioctl in set-tiling and get-tiling function names

== Series Details == Series: series starting with [CI,1/2] drm/i915: Include ioctl in set-tiling and get-tiling function names URL : https://patchwork.freedesktop.org/series/17760/ State : warning == Summary == Series 17760v1 Series without cover letter

Re: [Intel-gfx] [PATCH] drm/probe-helpers: Drop locking from poll_enable

On Tue, Jan 10, 2017 at 03:29:10PM +0100, Daniel Vetter wrote: > It was only needed to protect the connector_list walking, see > > commit 8c4ccc4ab6f64e859d4ff8d7c02c2ed2e956e07f > Author: Daniel Vetter > Date: Thu Jul 9 23:44:26 2015 +0200 > > drm/probe-helper:

[Intel-gfx] [PATCH v4] drm/i915: Replace 4096 with PAGE_SIZE or I915_GTT_PAGE_SIZE

Start converting over from the byte count to its semantic macro, either we want to allocate the size of a physical page in main memory or we want the size of a virtual page in the GTT. 4096 could mean either, but PAGE_SIZE and I915_GTT_PAGE_SIZE are explicit and should help improve code

[Intel-gfx] [PATCH] drm/probe-helpers: Drop locking from poll_enable

It was only needed to protect the connector_list walking, see commit 8c4ccc4ab6f64e859d4ff8d7c02c2ed2e956e07f Author: Daniel Vetter Date: Thu Jul 9 23:44:26 2015 +0200 drm/probe-helper: Grab mode_config.mutex in poll_init/enable Unfortunately the commit message of

Re: [Intel-gfx] [PATCH] drm/i915: Replace 4096 with PAGE_SIZE or I915_GTT_PAGE_SIZE

On Tue, Jan 10, 2017 at 03:55:35PM +0200, Joonas Lahtinen wrote: > On ti, 2017-01-10 at 12:15 +, Chris Wilson wrote: > > Start converting over from the byte count to its semantic macro, either > > we want to allocate the size of a physical page in main memory or we > > want the size of a

Re: [Intel-gfx] [PATCH] drm/i915: Replace 4096 with PAGE_SIZE or I915_GTT_PAGE_SIZE

On Tue, Jan 10, 2017 at 03:55:35PM +0200, Joonas Lahtinen wrote: > On ti, 2017-01-10 at 12:15 +, Chris Wilson wrote: > > Start converting over from the byte count to its semantic macro, either > > we want to allocate the size of a physical page in main memory or we > > want the size of a

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Construct a request even if the GPU is currently hung

== Series Details == Series: series starting with [1/2] drm/i915: Construct a request even if the GPU is currently hung URL : https://patchwork.freedesktop.org/series/17757/ State : success == Summary == Series 17757v1 Series without cover letter

Re: [Intel-gfx] [PATCH] drm/i915: Replace 4096 with PAGE_SIZE or I915_GTT_PAGE_SIZE

On Tue, Jan 10, 2017 at 03:55:35PM +0200, Joonas Lahtinen wrote: > On ti, 2017-01-10 at 12:15 +, Chris Wilson wrote: > > Start converting over from the byte count to its semantic macro, either > > we want to allocate the size of a physical page in main memory or we > > want the size of a

Re: [Intel-gfx] [PATCH] drm/i915: Replace 4096 with PAGE_SIZE or I915_GTT_PAGE_SIZE

On ti, 2017-01-10 at 12:15 +, Chris Wilson wrote: > Start converting over from the byte count to its semantic macro, either > we want to allocate the size of a physical page in main memory or we > want the size of a virtual page in the GTT. 4096 could mean either, but > PAGE_SIZE and

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Consolidate reset_request()

== Series Details == Series: series starting with [1/5] drm/i915: Consolidate reset_request() URL : https://patchwork.freedesktop.org/series/17747/ State : success == Summary == Series 17747v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/17747/revisions/1/mbox/

[Intel-gfx] [PATCH v2.1 1/7] drm/atomic: Add new iterators over all state, v3.

Add for_each_(old)(new)_(plane,connector,crtc)_in_state iterators to replace the old for_each_xxx_in_state ones. This is useful for >1 flip depth and getting rid of all xxx->state dereferences. This requires extra fixups done when committing a state after duplicating, which in general isn't valid

[Intel-gfx] [RESEND PATCH v14 2/2] drm/i915: Put "cooked" vlank counters in frame CRC lines

Use drm_accurate_vblank_count so we have the full 32 bit to represent the frame counter and userspace has a simpler way of knowing when the counter wraps around. Signed-off-by: Tomeu Vizoso Reviewed-by: Emil Velikov Reviewed-by: Robert

[Intel-gfx] [RESEND PATCH v14 1/2] drm/i915: Use new CRC debugfs API

The core provides now an ABI to userspace for generation of frame CRCs, so implement the ->set_crc_source() callback and reuse as much code as possible with the previous ABI implementation. When handling the pageflip interrupt, we skip 1 or 2 frames depending on the HW because they contain wrong

[Intel-gfx] [RESEND PATCH v14 0/2] New debugfs API for capturing CRC of frames

Hi, here are the last two patches that remain to be merged in this series, rebased on today's drm-tip. Thanks, Tomeu Tomeu Vizoso (2): drm/i915: Use new CRC debugfs API drm/i915: Put "cooked" vlank counters in frame CRC lines drivers/gpu/drm/i915/i915_drv.h | 1 +

Re: [Intel-gfx] [PATCH v5 5/6] i2c: designware-baytrail: Fix race when resetting the semaphore

On 01/02/2017 12:06 PM, Andy Shevchenko wrote: On Mon, 2017-01-02 at 10:55 +0100, Hans de Goede wrote: Hi, On 02-01-17 10:36, Andy Shevchenko wrote: On Sun, 2017-01-01 at 21:15 +0100, Hans de Goede wrote: Use iosf_mbi_modify instead of iosf_mbi_read + iosf_mbi_write so that we keep the

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Mark all incomplete requests as -EIO when wedged

On 10/01/2017 12:20, Chris Wilson wrote: On Tue, Jan 10, 2017 at 10:27:39AM +, Chris Wilson wrote: Similarly to a normal reset, after we mark the GPU as wedged (completely fubar and no more requests can be executed), set the error status on all the in flight requests. Signed-off-by: Chris

Re: [Intel-gfx] [RFCv2 08/19] drm/i915: Mock a GGTT for self-testing

On Mon, Jan 09, 2017 at 03:16:19PM +, Matthew Auld wrote: > On 20 December 2016 at 13:08, Chris Wilson wrote: > > @@ -90,19 +91,40 @@ struct drm_i915_private *mock_gem_device(void) > > i915->drm.pdev = pdev; > > i915->drm.dev_private = i915; > > > > +

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/atomic: Add accessor macros for all atomic state.

== Series Details == Series: drm/atomic: Add accessor macros for all atomic state. URL : https://patchwork.freedesktop.org/series/17745/ State : warning == Summary == Series 17745v1 drm/atomic: Add accessor macros for all atomic state.

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Mark all incomplete requests as -EIO when wedged

On Tue, Jan 10, 2017 at 10:27:39AM +, Chris Wilson wrote: > Similarly to a normal reset, after we mark the GPU as wedged (completely > fubar and no more requests can be executed), set the error status on all > the in flight requests. > > Signed-off-by: Chris Wilson

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Mark all incomplete requests as -EIO when wedged

On 10/01/2017 10:27, Chris Wilson wrote: Similarly to a normal reset, after we mark the GPU as wedged (completely fubar and no more requests can be executed), set the error status on all the in flight requests. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Rename i915_gem_engine_cleanup() to engine_set_wedged()

On 10/01/2017 10:27, Chris Wilson wrote: It has been some time since i915_gem_engine_cleanup was only called from the module unload path, and now it is only called when the GPU is wedged. Mika complained that the name is confusing, especially in light of the existence of

[Intel-gfx] [PATCH] drm/i915: Replace 4096 with PAGE_SIZE or I915_GTT_PAGE_SIZE

Start converting over from the byte count to its semantic macro, either we want to allocate the size of a physical page in main memory or we want the size of a virtual page in the GTT. 4096 could mean either, but PAGE_SIZE and I915_GTT_PAGE_SIZE are explicit and should help improve code

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Set an error status for a resubmitted request

On 10/01/2017 10:27, Chris Wilson wrote: Let userspace know if its request was resubmitted due to it being executed at the time of a global reset. In this case, the reset was for a guilty request on another engine, and this request was an innocent victim that will be re-executed upon

[Intel-gfx] [CI 2/2] drm/i915: Split out i915_gem_object_set_tiling()

Expose an interface for changing the tiling and stride on an object, that includes the complexity of checking for conflicting bindings and fence registers. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin ---

[Intel-gfx] [CI 1/2] drm/i915: Include ioctl in set-tiling and get-tiling function names

Make it clear that these functions are the user entry points for the tiling/fence registers. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_drv.c| 4 ++-- drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH 1/2] drm/i915: Construct a request even if the GPU is currently hung

As we now have the ability to directly reset the GPU from the waiter (and so do not need to drop the lock in order to let the reset proceed) and also do not lose requests over a reset, we can now simply queue the request to occur after the reset rather than roundtripping to userspace (or worse

[Intel-gfx] [PATCH 2/2] drm/i915: Skip switch to kernel context if already done

Some engines are never user or already sitting idle in the kernel context and for those we can skip flushing the current context for i915_gem_switch_to_kernel_context(). We used to perform this optimisation but that was removed for convenience of converting over to multiple timelines and handling

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915: Extract compute_partial_view()

== Series Details == Series: series starting with [CI,1/2] drm/i915: Extract compute_partial_view() URL : https://patchwork.freedesktop.org/series/17743/ State : success == Summary == Series 17743v1 Series without cover letter

Re: [Intel-gfx] [PATCH 06/10] drm/i915/psr: set CHICKEN_TRANS for psr2

On Mon, Jan 09, 2017 at 06:38:15PM +0530, vathsala nagaraju wrote: > As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15 must be programmed in > psr2 enable sequence. > Program Transcoder EDP VSC DIP header with a valid setting for PSR2 > and Set CHICKEN_TRANS_EDP(0x420cc) bit 12 for programmable header >

Re: [Intel-gfx] 4.10-rc2 oops in DRM connector code

On Mon, Jan 09, 2017 at 09:42:22AM -0800, Dave Hansen wrote: > On 01/09/2017 08:59 AM, Daniel Vetter wrote: > > On Mon, Jan 9, 2017 at 5:50 PM, Dave Hansen wrote: > >> On 01/09/2017 08:41 AM, Daniel Vetter wrote: > >>> On Mon, Jan 9, 2017 at 2:40 PM, Dave Hansen

Re: [Intel-gfx] [PATCH 03/10] drm/i915/psr: fix blank screen issue for psr2

On Monday 09 January 2017 10:47 PM, Vivi, Rodrigo wrote: On Mon, 2017-01-09 at 18:26 +0530, vathsala nagaraju wrote: Psr1 and psr2 are mutually exclusive,ie when psr2 is enabled, psr1 should be disabled.When psr2 is exited , bit 31 of reg PSR2_CTL must be set to 0 but currently bit 31 of

[Intel-gfx] [PATCH 3/5] drm/i915: Set an error status for a resubmitted request

Let userspace know if its request was resubmitted due to it being executed at the time of a global reset. In this case, the reset was for a guilty request on another engine, and this request was an innocent victim that will be re-executed upon restarting. However, since it was running at the time

[Intel-gfx] [PATCH 5/5] drm/i915: Rename i915_gem_engine_cleanup() to engine_set_wedged()

It has been some time since i915_gem_engine_cleanup was only called from the module unload path, and now it is only called when the GPU is wedged. Mika complained that the name is confusing, especially in light of the existence of i915_gem_cleanup_engines(). Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 4/5] drm/i915: Mark all incomplete requests as -EIO when wedged

Similarly to a normal reset, after we mark the GPU as wedged (completely fubar and no more requests can be executed), set the error status on all the in flight requests. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Mika Kuoppala

[Intel-gfx] [PATCH 2/5] drm/i915: Set guilty-flag on fence after detecting a hang

The struct dma_fence carries a status field exposed to userspace by sync_file. This is inspected after the fence is signaled and can convey whether or not the request completed successfully, or in our case if we detected a hang during the request (signaled via -EIO in SYNC_IOC_FILE_INFO). v2:

[Intel-gfx] [PATCH 1/5] drm/i915: Consolidate reset_request()

Always reset the requests of the guilty context, including the hung request that we tell the hardware to skip. This should help if the reprogram fails entirely, but more importantly makes the guilty path more uniform (and simplifies the subsequent patch to tweak the cancelled requests).

[Intel-gfx] [PATCH v2 5/7] drm/atomic: Add macros to access existing old/new state

After atomic commit, these macros should be used in place of get_existing_state. Also after commit get_xx_state should no longer be used because it may not have the required locks. Signed-off-by: Maarten Lankhorst --- include/drm/drm_atomic.h | 99

[Intel-gfx] [PATCH v2 4/7] drm/atomic: Fix atomic helpers to use the new iterator macros.

Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/drm_atomic_helper.c | 293 +++- 1 file changed, 152 insertions(+), 141 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c

[Intel-gfx] [PATCH v2 0/7] drm/atomic: Add accessor macros for all atomic state.

Third version. Instead of trying to convert all drivers straight away, implement all macros that are required to get state working. Old situation: Use obj->state, which can refer to old or new state. Use drm_atomic_get_(existing_)obj_state, which can refer to new or old state. Use

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915: Extract tile_row_size for fencing

On Tue, Jan 10, 2017 at 10:12:35AM +, Tvrtko Ursulin wrote: > > On 10/01/2017 09:35, Chris Wilson wrote: > >On Mon, Jan 09, 2017 at 05:23:45PM -, Patchwork wrote: > >>== Series Details == > >> > >>Series: series starting with [1/6] drm/i915: Extract tile_row_size for > >>fencing > >>URL

[Intel-gfx] [PATCH v2 6/7] drm/atomic: Convert get_existing_state callers to get_old/new_state

Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/drm_atomic.c| 6 +++--- drivers/gpu/drm/drm_atomic_helper.c | 39 + drivers/gpu/drm/drm_blend.c | 3 +-- 3 files changed, 22 insertions(+), 26

[Intel-gfx] [PATCH v2 7/7] drm/blend: Use new atomic iterator macros.

Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/drm_blend.c | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/drm_blend.c b/drivers/gpu/drm/drm_blend.c index 5c45d0852608..78cf9f6cae08 100644 ---

[Intel-gfx] [PATCH v2 1/7] drm/atomic: Add new iterators over all state

Add for_each_(old)(new)_(plane,connector,crtc)_in_state iterators to replace the old for_each_xxx_in_state ones. This is useful for >1 flip depth and getting rid of all xxx->state dereferences. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/drm_atomic.c

[Intel-gfx] [PATCH v2 3/7] drm/atomic: Use new atomic iterator macros.

Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/drm_atomic.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index 18cdf2c956c6..7b61e0da9ace 100644 ---

[Intel-gfx] [PATCH v2 2/7] drm/atomic: Make add_affected_connectors look at crtc_state.

This kills another dereference of connector->state. connector_mask holds all unchanged connectors at least and any changed connectors are already in state anyway. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/drm_atomic.c | 11 --- 1 file

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915: Extract tile_row_size for fencing

On 10/01/2017 09:35, Chris Wilson wrote: On Mon, Jan 09, 2017 at 05:23:45PM -, Patchwork wrote: == Series Details == Series: series starting with [1/6] drm/i915: Extract tile_row_size for fencing URL : https://patchwork.freedesktop.org/series/17709/ State : success == Summary ==

[Intel-gfx] [CI 2/2] drm/i915: Clip the partial view against the object not vma

The VMA is later clipped against the vm_area_struct before insertion of the faulting PTE so we are free to create the partial view as we desire. If we use the object as the extents rather than the area, this partial can then be used for other areas. Signed-off-by: Chris Wilson

[Intel-gfx] [CI 1/2] drm/i915: Extract compute_partial_view()

In order to reuse the partial view for selftesting, extract the common function for computing the view. Signed-off-by: Chris Wilson Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_gem.c | 47

[Intel-gfx] [PATCH igt] lib/kms: Disallow hotplugs during testing by default

After a hotplug, it is mandatory for userspace to reprobe (and maybe retrain the links). Currently igt doesn't do this and so we may cause spurious test failures (likely to be EINVAL when trying to apply a mode). Detect the hotplug uevent and die loudly so that the actual failure is logged.

Re: [Intel-gfx] [PATCH v2] drm/i915/glk: Convert a few more IS_BROXTON() to IS_GEN9_LP()

Reviewed-by: Tomasz Lis W dniu 2017-01-09 o 18:11, Vivi, Rodrigo pisze: Reviewed-by: Rodrigo Vivi On Mon, 2017-01-09 at 16:51 +0200, Ander Conselvan de Oliveira wrote: From: Michel Thierry Commit cc3f90f0633c

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915: Extract tile_row_size for fencing

On Mon, Jan 09, 2017 at 05:23:45PM -, Patchwork wrote: > == Series Details == > > Series: series starting with [1/6] drm/i915: Extract tile_row_size for fencing > URL : https://patchwork.freedesktop.org/series/17709/ > State : success > > == Summary == > > Series 17709v1 Series without

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/3] drm/i915/DMC/GLK: Load DMC on GLK (rev2)

On Mon, 2017-01-09 at 15:53 +, Patchwork wrote: > == Series Details == > > Series: series starting with [1/3] drm/i915/DMC/GLK: Load DMC on GLK (rev2) > URL   : https://patchwork.freedesktop.org/series/16926/ > State : warning > > == Summary == > > Series 16926v2 Series without cover letter

Re: [Intel-gfx] [alsa-devel] [PATCH v4 0/3] support DP MST audio

On Tue, 10 Jan 2017 09:45:31 +0100, Yang, Libin wrote: > > Hi Takashi, > > >-Original Message- > >From: Takashi Iwai [mailto:ti...@suse.de] > >Sent: Tuesday, January 10, 2017 4:19 PM > >To: Yang, Libin > >Cc: Daniel Vetter ; intel-gfx >

Re: [Intel-gfx] [alsa-devel] [PATCH v4 0/3] support DP MST audio

Hi Takashi, >-Original Message- >From: Takashi Iwai [mailto:ti...@suse.de] >Sent: Tuesday, January 10, 2017 4:19 PM >To: Yang, Libin >Cc: Daniel Vetter ; intel-gfx >; >Nikula, Jani ;

Re: [Intel-gfx] [GIT PULL] GVT-g fixes for 4.10-rc4

On Tue, 10 Jan 2017, Zhenyu Wang wrote: > Hi, > > Please pull GVT-g device model fixes for rc4. This is based on rc3 with > new vfio/mdev interface change. Thanks, pulled to drm-intel-fixes. BR, Jani. > > Thanks. > --- > > The following changes since commit

Re: [Intel-gfx] [alsa-devel] [PATCH v4 0/3] support DP MST audio

On Mon, 09 Jan 2017 07:22:55 +0100, Yang, Libin wrote: > > Hi Takashi, > > It seems the patches for DP MST in gfx is not merged into Linus branch. > > Do we have plan to merge gfx branch manually and review the patches for > audio? Or we will wait the DP MST patches for i915 merged into Linus

Re: [Intel-gfx] [PATCH 6/6] drm/i915: Move ggtt fence/alignment to i915_gem_tiling.c

On Tue, Jan 10, 2017 at 09:17:00AM +0200, Joonas Lahtinen wrote: > On ma, 2017-01-09 at 16:16 +, Chris Wilson wrote: > > Rename i915_gem_get_ggtt_size() and i915_gem_get_ggtt_alignment() to > > i915_gem_fence_size()  and i915_gem_fence_alignment() respectively to > > Extra space here --^