Re: [Intel-gfx] [PATCH 1/1] drm/i915: Do RPM Wake during GuC/HuC status read

2017-02-03 Thread Kamble, Sagar A
On 2/3/2017 1:07 PM, Chris Wilson wrote: On Fri, Feb 03, 2017 at 01:00:18PM +0530, Sagar Arun Kamble wrote: HUC_STATUS, GUC_STATUS, SOFT_SCRATCH registers are read in debugfs. This patch covers those accesses by RPM get/put. See also I915_PARAM_HUC_STATUS. Yes. Will update this. Daniel had c

[Intel-gfx] [PATCH v2 1/1] drm/i915: Do RPM Wake during GuC/HuC status read

2017-02-03 Thread Sagar Arun Kamble
HUC_STATUS, GUC_STATUS, SOFT_SCRATCH registers are read in debugfs and getparam ioctl. This patch covers those accesses by RPM get/put. v2: Covering access in i915_getparam(I915_PARAM_HUC_STATUS) (ChrisW) Cc: Arkadiusz Hiler Cc: Anusha Srivatsa Cc: Fiedorowicz, Lukasz Signed-off-by: Sagar Arun

Re: [Intel-gfx] [PATCH] drm/i915: Enable atomic support by default on supported platforms.

2017-02-03 Thread Maarten Lankhorst
Hey, Op 02-02-17 om 17:26 schreef Daniel Stone: > Hi, > > On 2 February 2017 at 07:41, Maarten Lankhorst > wrote: >> i915 is pretty much feature complete. Support for atomic i915-specific >> connector properties is still missing; those properties can (for now) >> only be set through the legacy io

Re: [Intel-gfx] [PATCH 03/19] drm/i915: Micro-optimise gen8_ppgtt_insert_entries()

2017-02-03 Thread Chris Wilson
On Thu, Feb 02, 2017 at 05:17:57PM +, Tvrtko Ursulin wrote: > > On 02/02/2017 17:05, Chris Wilson wrote: > >On Thu, Feb 02, 2017 at 04:39:49PM +, Tvrtko Ursulin wrote: > >> > >>On 02/02/2017 16:10, Chris Wilson wrote: > >>>On Thu, Feb 02, 2017 at 03:57:43PM +, Tvrtko Ursulin wrote: > >

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/1] drm/i915: Do RPM Wake during GuC/HuC status read

2017-02-03 Thread Patchwork
== Series Details == Series: series starting with [v2,1/1] drm/i915: Do RPM Wake during GuC/HuC status read URL : https://patchwork.freedesktop.org/series/19037/ State : success == Summary == Series 19037v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/19037/rev

Re: [Intel-gfx] [PATCH] drm/i915: remove 512GB allocation warning

2017-02-03 Thread Joonas Lahtinen
On to, 2017-02-02 at 14:55 +, Matthew Auld wrote: > Now that we have selftests in place exercising truly huge allocations > we will start to hit the 512GB warning, so now seems like a good time to > remove it. > > Cc: Joonas Lahtinen > Cc: Chris Wilson > Signed-off-by: Matthew Auld Reviewe

Re: [Intel-gfx] [PATCH] drm/i915: Recreate internal objects with single page segments if dmar fails

2017-02-03 Thread Tvrtko Ursulin
On 02/02/2017 13:27, Chris Wilson wrote: If we fail to dma-map the object, the most common cause is lack of space inside the SW-IOTLB due to fragmentation. If we recreate the_sg_table using segments of PAGE_SIZE (and single page allocations), we may succeed in remapping the scatterlist. First b

Re: [Intel-gfx] [PATCH v5] drm: Improve drm_mm search (and fix topdown allocation) with rbtrees

2017-02-03 Thread Lucas Stach
Am Donnerstag, den 02.02.2017, 21:04 + schrieb Chris Wilson: > The drm_mm range manager claimed to support top-down insertion, but it > was neither searching for the top-most hole that could fit the > allocation request nor fitting the request to the hole correctly. > > In order to search the

Re: [Intel-gfx] [PATCH] drm/i915: Recreate internal objects with single page segments if dmar fails

2017-02-03 Thread Chris Wilson
On Fri, Feb 03, 2017 at 09:40:23AM +, Tvrtko Ursulin wrote: > > On 02/02/2017 13:27, Chris Wilson wrote: > >If we fail to dma-map the object, the most common cause is lack of space > >inside the SW-IOTLB due to fragmentation. If we recreate the_sg_table > >using segments of PAGE_SIZE (and sing

Re: [Intel-gfx] [PATCH] drm/i915: Recreate internal objects with single page segments if dmar fails

2017-02-03 Thread Chris Wilson
On Fri, Feb 03, 2017 at 09:40:23AM +, Tvrtko Ursulin wrote: > Looks correct, just the correct victim needs to be identified in the > commit and fixes tag. With that fixed: Added the fixes tag, thought I'm sure if it merits applying to stable without a user bug report - that I leave up to Jani.

Re: [Intel-gfx] [PATCH] drm/i915: Recreate internal objects with single page segments if dmar fails

2017-02-03 Thread Chris Wilson
On Fri, Feb 03, 2017 at 09:59:45AM +, Chris Wilson wrote: > On Fri, Feb 03, 2017 at 09:40:23AM +, Tvrtko Ursulin wrote: > > Looks correct, just the correct victim needs to be identified in the > > commit and fixes tag. With that fixed: > > Added the fixes tag, thought I'm sure if it merits

[Intel-gfx] [PATCH i-g-t] lib/igt_kmod: Compare module names with strcmp

2017-02-03 Thread Ander Conselvan de Oliveira
The function igt_kmod_is_loaded() returns the wrong value when there is a module loaded whose name is a prefix of the name supplied as a paremter. For instance, if the "snd" module is loaded, igt_kmod_is_load("snd_hda_intel") will return true even if that module isn't loaded, thus causing drv_modul

Re: [Intel-gfx] [PATCH v5] drm: Improve drm_mm search (and fix topdown allocation) with rbtrees

2017-02-03 Thread Daniel Vetter
On Fri, Feb 03, 2017 at 10:49:22AM +0100, Lucas Stach wrote: > Am Donnerstag, den 02.02.2017, 21:04 + schrieb Chris Wilson: > > The drm_mm range manager claimed to support top-down insertion, but it > > was neither searching for the top-most hole that could fit the > > allocation request nor fi

Re: [Intel-gfx] [PATCH i-g-t] lib/igt_kmod: Compare module names with strcmp

2017-02-03 Thread Chris Wilson
On Fri, Feb 03, 2017 at 12:09:46PM +0200, Ander Conselvan de Oliveira wrote: > The function igt_kmod_is_loaded() returns the wrong value when there is > a module loaded whose name is a prefix of the name supplied as a > paremter. For instance, if the "snd" module is loaded, > igt_kmod_is_load("snd_

Re: [Intel-gfx] [PATCH] drm/i915: remove 512GB allocation warning

2017-02-03 Thread Chris Wilson
On Fri, Feb 03, 2017 at 11:03:15AM +0200, Joonas Lahtinen wrote: > On to, 2017-02-02 at 14:55 +, Matthew Auld wrote: > > Now that we have selftests in place exercising truly huge allocations > > we will start to hit the 512GB warning, so now seems like a good time to > > remove it. > > > > Cc:

[Intel-gfx] [PATCH] drm/i915: Remove i915_execbuffer_params

2017-02-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Tidy i915_gem_do_execbuffer by removing the structure which is under no plans to be used any longer. This improves the redability of the code, decreases lines of source and shrinks the binary. Signed-off-by: Tvrtko Ursulin Cc: Chris Wilson Cc: Joonas Lahtinen --- driver

Re: [Intel-gfx] [PATCH] drm/i915/guc: Make intel_guc_send a function pointer

2017-02-03 Thread Chris Wilson
On Thu, Feb 02, 2017 at 07:42:46AM -0800, Oscar Mateo wrote: > From: Michal Wajdeczko > > Prepare for an alternate GuC communication interface. > > v2: Make a few functions static and name them correctly while we are at it > (Oscar) > > Signed-off-by: Michel Thierry > Signed-off-by: Michal Wa

Re: [Intel-gfx] [PATCH v4 2/2] drm: kselftest for drm_mm and bottom-up allocation

2017-02-03 Thread Daniel Vetter
On Thu, Feb 02, 2017 at 11:44:34AM +, Chris Wilson wrote: > Check that if we request bottom-up allocation from drm_mm_insert_node() > we receive the next available hole from the bottom. > > Signed-off-by: Chris Wilson > Reviewed-by: Joonas Lahtinen Also applied, thanks. -Daniel > --- > dr

Re: [Intel-gfx] [PATCH i-g-t] lib/igt_kmod: Compare module names with strcmp

2017-02-03 Thread Ander Conselvan De Oliveira
On Fri, 2017-02-03 at 10:24 +, Chris Wilson wrote: > On Fri, Feb 03, 2017 at 12:09:46PM +0200, Ander Conselvan de Oliveira wrote: > > The function igt_kmod_is_loaded() returns the wrong value when there is > > a module loaded whose name is a prefix of the name supplied as a > > paremter. For in

Re: [Intel-gfx] [PATCH] drm/i915: Remove i915_execbuffer_params

2017-02-03 Thread Chris Wilson
On Fri, Feb 03, 2017 at 10:33:44AM +, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Tidy i915_gem_do_execbuffer by removing the structure which > is under no plans to be used any longer. > > This improves the redability of the code, decreases lines > of source and shrinks the binary. If

[Intel-gfx] [PATCH] drm/i915: Reject set-tiling-ioctl with stride==0 and a tiling mode

2017-02-03 Thread Chris Wilson
In commit 957870f93412 ("drm/i915: Split out i915_gem_object_set_tiling()"), I swapped an alignment check for IS_ALIGNED and in the process removed the less-than check. That check turns out to be important as it was the only rejection for stride == 0. Tvrtko did spot it, but I was overconfident in

Re: [Intel-gfx] [PATCH] drm/i915: Reject set-tiling-ioctl with stride==0 and a tiling mode

2017-02-03 Thread Tvrtko Ursulin
On 03/02/2017 10:56, Chris Wilson wrote: In commit 957870f93412 ("drm/i915: Split out i915_gem_object_set_tiling()"), I swapped an alignment check for IS_ALIGNED and in the process removed the less-than check. That check turns out to be important as it was the only rejection for stride == 0. Tvr

Re: [Intel-gfx] [PATCH] drm/i915: Reject set-tiling-ioctl with stride==0 and a tiling mode

2017-02-03 Thread Chris Wilson
On Fri, Feb 03, 2017 at 11:34:00AM +, Tvrtko Ursulin wrote: > > On 03/02/2017 10:56, Chris Wilson wrote: > >In commit 957870f93412 ("drm/i915: Split out i915_gem_object_set_tiling()"), > >I swapped an alignment check for IS_ALIGNED and in the process removed > >the less-than check. That check

Re: [Intel-gfx] [PATCH] drm/i915/guc: Make intel_guc_send a function pointer

2017-02-03 Thread Michal Wajdeczko
On Thu, Feb 02, 2017 at 07:42:46AM -0800, Oscar Mateo wrote: > From: Michal Wajdeczko > > Prepare for an alternate GuC communication interface. > > v2: Make a few functions static and name them correctly while we are at it > (Oscar) > > Signed-off-by: Michel Thierry > Signed-off-by: Michal Wa

[Intel-gfx] [PATCH 2/2] drm/i915: Allow large objects to be tiled on gen2/3

2017-02-03 Thread Chris Wilson
We now have partial VMA support to break large objects into fence sized regions and no longer have to restrict tiling to small objects on gen2/3 Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_gem_tiling.c | 8 1 file changed, 8 deletio

[Intel-gfx] [PATCH 1/2] drm/i915: Tidy the tail of i915_tiling_ok()

2017-02-03 Thread Chris Wilson
The current tail breaks the pattern of if (check) return false, which can catch the reader out. If we move the gen2/3 power-of-two test into the earlier gen2/3 branch, we can eliminate the contrary tail. Suggested-by: Tvrtko Ursulin Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gp

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Remove i915_execbuffer_params

2017-02-03 Thread Patchwork
== Series Details == Series: drm/i915: Remove i915_execbuffer_params URL : https://patchwork.freedesktop.org/series/19050/ State : warning == Summary == Series 19050v1 drm/i915: Remove i915_execbuffer_params https://patchwork.freedesktop.org/api/1.0/series/19050/revisions/1/mbox/ Test kms_bus

Re: [Intel-gfx] [PATCH] drm/i915: Remove i915_execbuffer_params

2017-02-03 Thread Joonas Lahtinen
On pe, 2017-02-03 at 10:46 +, Chris Wilson wrote: > On Fri, Feb 03, 2017 at 10:33:44AM +, Tvrtko Ursulin wrote: > > > > > > From: Tvrtko Ursulin > > > > Tidy i915_gem_do_execbuffer by removing the structure which > > is under no plans to be used any longer. > > > > This improves the red

Re: [Intel-gfx] [PATCH v3] drm/i915/bxt: Add MST support when do DPLL calculation

2017-02-03 Thread Jani Nikula
On Fri, 03 Feb 2017, "Lee, Shawn C" wrote: > From: "Lee, Shawn C" > > Add the missing INTEL_OUTPUT_DP_MST case in bxt_get_dpll() > to correctly initialize the crtc_state and port plls when > link training a DP MST monitor on BXT/APL devices. > > Fixes: a277ca7dc01d ("drm/i915: Split bxt_ddi_pll_s

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Reject set-tiling-ioctl with stride==0 and a tiling mode

2017-02-03 Thread Patchwork
== Series Details == Series: drm/i915: Reject set-tiling-ioctl with stride==0 and a tiling mode URL : https://patchwork.freedesktop.org/series/19051/ State : success == Summary == Series 19051v1 drm/i915: Reject set-tiling-ioctl with stride==0 and a tiling mode https://patchwork.freedesktop.o

[Intel-gfx] [PATCH] drm/i915: Remove overzealous fence warn on runtime suspend

2017-02-03 Thread Chris Wilson
The goal of the WARN was to catch when we are still actively using the fence as we go into the runtime suspend. However, the reg->pin_count is too coarse as it does not distinguish between exclusive ownership of the fence register from activity. I've not improved on the WARN, nor have we captured

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Allow large objects to be tiled on gen2/3

2017-02-03 Thread Joonas Lahtinen
On pe, 2017-02-03 at 11:50 +, Chris Wilson wrote: > We now have partial VMA support to break large objects into fence sized > regions and no longer have to restrict tiling to small objects on gen2/3 > > Signed-off-by: Chris Wilson > Cc: Tvrtko Ursulin > Cc: Joonas Lahtinen Hmm, there reall

Re: [Intel-gfx] [PATCH 19/19] drm/i915: Remove unused ppgtt->enable()

2017-02-03 Thread Joonas Lahtinen
On to, 2017-02-02 at 15:02 +, Chris Wilson wrote: > We never assign or use the ppgtt->enable() callback, so remove it. > > Signed-off-by: Chris Wilson Reviewed-by: Joonas Lahtinen Regards, Joonas -- Joonas Lahtinen Open Source Technology Center Intel Corporation __

[Intel-gfx] [PATCH 1/3] drm/i915: Merge BDW pipe gamma and degamma table code

2017-02-03 Thread Ander Conselvan de Oliveira
The only difference between the code loading the pipe gamma and degamma tables in BDW is that the gamma code also writes the registers that hold the maximum values. So we can use the gamma code for the degamma table, at the expense of writing the maximum value register twice, with potenttially wron

[Intel-gfx] [PATCH 2/3] drm/i915/glk: Load the degamma LUT even in legacy gamma mode

2017-02-03 Thread Ander Conselvan de Oliveira
In Geminilake, the degamma table is enabled or disabled by the pipe CSC enable bit, so its active even when running in the legacy gamma mode. So always set sane values for that table, since the default value is all zeroes. This fixes blank screens after a suspend/resume cycle while legacy gamma is

[Intel-gfx] [PATCH v4 0/3] Geminilake pipe CSC

2017-02-03 Thread Ander Conselvan de Oliveira
Ander Conselvan de Oliveira (3): drm/i915: Merge BDW pipe gamma and degamma table code drm/i915/glk: Load the degamma LUT even in legacy gamma mode drm/i915/glk: Enable pipe CSC drivers/gpu/drm/i915/intel_color.c | 62 ++-- drivers/gpu/drm/i915/intel_displa

[Intel-gfx] [PATCH 3/3] drm/i915/glk: Enable pipe CSC

2017-02-03 Thread Ander Conselvan de Oliveira
Now that the pre-csc degamma table is set up correctly in Geminilake, pipe CSC can be enabled without causing a black screen. v2: Rebase. Signed-off-by: Ander Conselvan de Oliveira Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 1 + drivers/gpu/drm/i915/intel_sprite.c |

Re: [Intel-gfx] [PATCH] drm/i915: Enable VLV audio chicken bit for LPE audio

2017-02-03 Thread Takashi Iwai
On Thu, 02 Feb 2017 11:12:53 +0100, Takashi Iwai wrote: > > The audio chicken bit (register offset 0x62f38) seems required to make > DP audio working on some machines. At least, on Dell Wyse 3040, I > failed to get the audio unless this bit is set once. > > Strangely, the bit seems necessary onl

[Intel-gfx] [PATCH 1/3] drm/i915/dp: Move initialization of hpd_pin to a new function

2017-02-03 Thread Ander Conselvan de Oliveira
This shaves a few lines from intel_dp_init_connector() and will serve as a good place to add other port specific information in a follow up patch. Signed-off-by: Ander Conselvan de Oliveira --- drivers/gpu/drm/i915/intel_dp.c | 54 - 1 file changed, 32 in

[Intel-gfx] [PATCH 3/3] drm/i915: Store encoder power domain in struct intel_encoder

2017-02-03 Thread Ander Conselvan de Oliveira
The encoder power domain is obviously tied to the encoder, so store it in struct intel_encoder. This avoids some indirection. Signed-off-by: Ander Conselvan de Oliveira --- drivers/gpu/drm/i915/intel_crt.c | 21 + drivers/gpu/drm/i915/intel_ddi.c | 15 +++

[Intel-gfx] [PATCH 2/3] drm/i915: Store aux power domain in intel_dp

2017-02-03 Thread Ander Conselvan de Oliveira
The aux power domain only makes sense in the DP code. Storing it in struct intel_dp avoids some indirection. Signed-off-by: Ander Conselvan de Oliveira --- drivers/gpu/drm/i915/intel_display.c | 50 --- drivers/gpu/drm/i915/intel_dp.c | 65 +++---

Re: [Intel-gfx] [PATCH 1/3] drm/i915/dp: Move initialization of hpd_pin to a new function

2017-02-03 Thread Jani Nikula
On Fri, 03 Feb 2017, Ander Conselvan de Oliveira wrote: > This shaves a few lines from intel_dp_init_connector() and will serve as > a good place to add other port specific information in a follow up > patch. > > Signed-off-by: Ander Conselvan de Oliveira > > --- > drivers/gpu/drm/i915/intel_d

Re: [Intel-gfx] [PATCH 1/3] drm/i915/dp: Move initialization of hpd_pin to a new function

2017-02-03 Thread Chris Wilson
On Fri, Feb 03, 2017 at 03:39:01PM +0200, Ander Conselvan de Oliveira wrote: > This shaves a few lines from intel_dp_init_connector() and will serve as > a good place to add other port specific information in a follow up > patch. > > Signed-off-by: Ander Conselvan de Oliveira > > --- > drivers/

[Intel-gfx] [PATCH v2 2/4] drm/i915/dp: Move initialization of hpd_pin to a new function

2017-02-03 Thread Ander Conselvan de Oliveira
This shaves a few lines from intel_dp_init_connector() and will serve as a good place to add other port specific information in a follow up patch. While at it, convert BUG() to MISSING_CASE() in the default case. v2: s/BUG/MISSING_CASE. (Chris) Cc: Chris Wilson Cc: Jani Nikula Signed-off-by: An

[Intel-gfx] [PATCH v2 3/4] drm/i915: Store aux power domain in intel_dp

2017-02-03 Thread Ander Conselvan de Oliveira
The aux power domain only makes sense in the DP code. Storing it in struct intel_dp avoids some indirection. Signed-off-by: Ander Conselvan de Oliveira --- drivers/gpu/drm/i915/intel_display.c | 50 - drivers/gpu/drm/i915/intel_dp.c | 61 ++--

[Intel-gfx] [PATCH v2 1/4] drm/i915: Remove WA for swapped HPD pins in broxton A stepping

2017-02-03 Thread Ander Conselvan de Oliveira
Remove workaround for swapped HPD pins in broxton A stepping, which is pre-production hardware. Cc: Jani Nikula Signed-off-by: Ander Conselvan de Oliveira --- drivers/gpu/drm/i915/intel_ddi.c | 9 + drivers/gpu/drm/i915/intel_dp.c | 2 -- drivers/gpu/drm/i915/intel_hdmi.c | 9 +-

[Intel-gfx] [PATCH v2 4/4] drm/i915: Store encoder power domain in struct intel_encoder

2017-02-03 Thread Ander Conselvan de Oliveira
The encoder power domain is obviously tied to the encoder, so store it in struct intel_encoder. This avoids some indirection. Signed-off-by: Ander Conselvan de Oliveira --- drivers/gpu/drm/i915/intel_crt.c | 21 + drivers/gpu/drm/i915/intel_ddi.c | 15 +++

Re: [Intel-gfx] [PATCH i-g-t] tests: Clean up shell scripts

2017-02-03 Thread Petri Latvala
On Mon, Jan 30, 2017 at 01:07:12PM +0200, Joonas Lahtinen wrote: > delete mode 100755 tests/test_rte_check Remove test_rte_check also from tests/Makefile.sources. With that, Reviewed-by: Petri Latvala ___ Intel-gfx mailing list Intel-gfx@lists.freed

Re: [Intel-gfx] [PATCH v1½ 12/13] drm/i915/dp: localize link rate index variable more

2017-02-03 Thread Jani Nikula
On Thu, 02 Feb 2017, Manasi Navare wrote: > On Thu, Feb 02, 2017 at 10:42:48AM +0200, Jani Nikula wrote: >> On Thu, 02 Feb 2017, Manasi Navare wrote: >> > On Thu, Jan 26, 2017 at 09:44:26PM +0200, Jani Nikula wrote: >> >> Localize link_rate_index to the if block, and rename to just index to >> >>

Re: [Intel-gfx] [PATCH igt] intel-ci: Minimal exercise of explicit fencing

2017-02-03 Thread Petri Latvala
On Fri, Jan 27, 2017 at 09:36:23PM +, Chris Wilson wrote: > Signed-off-by: Chris Wilson > Cc: Petri Latvala > --- > tests/intel-ci/fast-feedback.testlist | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/tests/intel-ci/fast-feedback.testlist > b/tests/intel-ci/fast-feedback.tes

Re: [Intel-gfx] [PATCH v1½ 00/13] drm/i915/dp: link rate and lane count refactoring

2017-02-03 Thread Jani Nikula
On Thu, 02 Feb 2017, Manasi Navare wrote: > On Wed, Feb 01, 2017 at 11:40:06AM -0800, Manasi Navare wrote: >> Are you planning on submitting a v2 for these pretty soon >> that can make it to patchwork/ >> >> Regards >> Manasi >> >> On Thu, Jan 26, 2017 at 09:44:14PM +0200, Jani Nikula wrote: >>

[Intel-gfx] [PATCH v2 01/13] drm/i915/dp: use known correct array size in rate_to_index

2017-02-03 Thread Jani Nikula
I can't think of a real world bug this could cause now, but this will be required in follow-up work. While at it, change the parameter order to be slightly more sensible. Cc: Manasi Navare Cc: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_dp.c | 11 ++- 1 file

[Intel-gfx] [PATCH v2 02/13] drm/i915/dp: return errors from rate_to_index()

2017-02-03 Thread Jani Nikula
We shouldn't silently use the first element if we can't find the rate we're looking for. Make rate_to_index() more generally useful, and fallback to the first element in the caller, with a big warning. Cc: Manasi Navare Cc: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/inte

[Intel-gfx] [PATCH v2 03/13] drm/i915/dp: rename rate_to_index() to intel_dp_rate_index() and reuse

2017-02-03 Thread Jani Nikula
Rename the function, move it at the top, and reuse in intel_dp_link_rate_index(). If there was a reason in the past to use reverse search order here, there isn't now. The names may be slightly confusing now, but intel_dp_link_rate_index() will go away in follow-up patches. v2: Use name intel_dp_r

[Intel-gfx] [PATCH v2 05/13] drm/i915/dp: generate and cache sink rate array for all DP, not just eDP 1.4

2017-02-03 Thread Jani Nikula
There is some conflation related to sink rates, making this change more complicated than it would otherwise have to be. There are three changes here that are rather difficult to split up: 1) Use the intel_dp->sink_rates array for all DP, not just eDP 1.4. We initialize it from DPCD on eDP 1.4 l

[Intel-gfx] [PATCH v2 04/13] drm/i915/dp: cache source rates at init

2017-02-03 Thread Jani Nikula
We need the source rates array so often that it makes sense to set it once at init. This reduces function calls when we need the rates, making the code easier to follow. Cc: Manasi Navare Cc: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_dp.c | 35 +++

[Intel-gfx] [PATCH v2 00/13] drm/i915/dp: link rate and lane count refactoring

2017-02-03 Thread Jani Nikula
v2 of [1], rebased and review addressed. BR, Jani. [1] cover.1485459621.git.jani.nikula@intel.com">http://mid.mail-archive.com/cover.1485459621.git.jani.nikula@intel.com Jani Nikula (13): drm/i915/dp: use known correct array size in rate_to_index drm/i915/dp: return errors from rate_to_ind

[Intel-gfx] [PATCH v2 08/13] drm/i915/dp: do not limit rate seek when not needed

2017-02-03 Thread Jani Nikula
In link training fallback, we're trying to find a rate that we know is in a sorted array of common link rates. We don't need to limit the array using the max rate. For test request, the DP CTS doesn't say we should limit the rate based on earlier fallback. Cc: Manasi Navare Cc: Ville Syrjälä Sig

[Intel-gfx] [PATCH v2 06/13] drm/i915/dp: use the sink rates array for max sink rates

2017-02-03 Thread Jani Nikula
Looking at DPCD DP_MAX_LINK_RATE may be completely bogus for eDP 1.4 which is allowed to use link rate select method and have 0 in max link rate. With this change, it makes sense to store the max rate as the actual rate rather than as a bw code. Cc: Manasi Navare Cc: Ville Syrjälä Signed-off-by:

[Intel-gfx] [PATCH v2 07/13] drm/i915/dp: cache common rates with sink rates

2017-02-03 Thread Jani Nikula
Now that source rates are static and sink rates are updated whenever DPCD is updated, we can do and cache the intersection of them whenever sink rates are updated. This reduces code complexity, as we don't have to keep calling the functions to intersect. We also get rid of several common rates arra

[Intel-gfx] [PATCH v2 10/13] drm/i915/dp: add functions for max common link rate and lane count

2017-02-03 Thread Jani Nikula
These are the theoretical maximums common for source and sink. These are the maximums we should start with. They may be degraded in case of link training failures, and the dynamic link values are stored separately. Cc: Manasi Navare Cc: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/

[Intel-gfx] [PATCH v2 09/13] drm/i915/dp: don't call the link parameters sink parameters

2017-02-03 Thread Jani Nikula
If we modify these on the fly depending on the link conditions, don't pretend they are sink properties. Some link vs. sink confusion still remains, but we'll take care of them in follow-up patches. Cc: Manasi Navare Cc: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_d

[Intel-gfx] [PATCH v2 12/13] drm/i915/dp: localize link rate index variable more

2017-02-03 Thread Jani Nikula
Localize link_rate_index to the if block, and rename to just index to reduce indent. Cc: Manasi Navare Cc: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_dp.c | 13 +++-- 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_d

[Intel-gfx] [PATCH v2 11/13] drm/i915/mst: use max link not sink lane count

2017-02-03 Thread Jani Nikula
The source might not support as many lanes as the sink, or the link training might have failed at higher lane counts. Take these into account. Cc: Dhinakaran Pandiyan Cc: Manasi Navare Cc: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_dp.c | 2 +- drivers/gpu/drm

[Intel-gfx] [PATCH v2 13/13] drm/i915/dp: use readb and writeb calls for single byte DPCD access

2017-02-03 Thread Jani Nikula
This is what we have the readb and writeb variants for. Do some minor return value and variable cleanup while at it. Cc: Manasi Navare Cc: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_dp.c | 37 + 1 file changed, 17 insertions(+),

Re: [Intel-gfx] [PATCH v2 1/4] drm/i915: Remove WA for swapped HPD pins in broxton A stepping

2017-02-03 Thread Jani Nikula
On Fri, 03 Feb 2017, Ander Conselvan de Oliveira wrote: > Remove workaround for swapped HPD pins in broxton A stepping, which is > pre-production hardware. > > Cc: Jani Nikula > Signed-off-by: Ander Conselvan de Oliveira > Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_ddi.c

Re: [Intel-gfx] [PATCH v2 2/4] drm/i915/dp: Move initialization of hpd_pin to a new function

2017-02-03 Thread Jani Nikula
On Fri, 03 Feb 2017, Ander Conselvan de Oliveira wrote: > This shaves a few lines from intel_dp_init_connector() and will serve as > a good place to add other port specific information in a follow up > patch. > > While at it, convert BUG() to MISSING_CASE() in the default case. > > v2: s/BUG/MISS

Re: [Intel-gfx] [PATCH v2 3/4] drm/i915: Store aux power domain in intel_dp

2017-02-03 Thread Jani Nikula
On Fri, 03 Feb 2017, Ander Conselvan de Oliveira wrote: > The aux power domain only makes sense in the DP code. Storing it in > struct intel_dp avoids some indirection. This seems to make a whole lot of sense. I've just got one detail I wanted to track down but don't have time for it now: > -

Re: [Intel-gfx] [PATCH] drm/i915: Enable VLV audio chicken bit for LPE audio

2017-02-03 Thread Ville Syrjälä
On Fri, Feb 03, 2017 at 02:32:37PM +0100, Takashi Iwai wrote: > On Thu, 02 Feb 2017 11:12:53 +0100, > Takashi Iwai wrote: > > > > The audio chicken bit (register offset 0x62f38) seems required to make > > DP audio working on some machines. At least, on Dell Wyse 3040, I > > failed to get the audi

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove overzealous fence warn on runtime suspend

2017-02-03 Thread Patchwork
== Series Details == Series: drm/i915: Remove overzealous fence warn on runtime suspend URL : https://patchwork.freedesktop.org/series/19055/ State : success == Summary == Series 19055v1 drm/i915: Remove overzealous fence warn on runtime suspend https://patchwork.freedesktop.org/api/1.0/series

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Tidy the tail of i915_tiling_ok()

2017-02-03 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Tidy the tail of i915_tiling_ok() URL : https://patchwork.freedesktop.org/series/19052/ State : warning == Summary == Series 19052v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/19052/revisions/1/

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Tidy the tail of i915_tiling_ok()

2017-02-03 Thread Tvrtko Ursulin
On 03/02/2017 11:50, Chris Wilson wrote: The current tail breaks the pattern of if (check) return false, which can catch the reader out. If we move the gen2/3 power-of-two test into the earlier gen2/3 branch, we can eliminate the contrary tail. Suggested-by: Tvrtko Ursulin Signed-off-by: Chris

Re: [Intel-gfx] [PATCH] drm/i915: Enable VLV audio chicken bit for LPE audio

2017-02-03 Thread Takashi Iwai
On Fri, 03 Feb 2017 15:54:33 +0100, Ville Syrjälä wrote: > > On Fri, Feb 03, 2017 at 02:32:37PM +0100, Takashi Iwai wrote: > > On Thu, 02 Feb 2017 11:12:53 +0100, > > Takashi Iwai wrote: > > > > > > The audio chicken bit (register offset 0x62f38) seems required to make > > > DP audio working on s

[Intel-gfx] ✓ Fi.CI.BAT: success for Geminilake pipe CSC (rev3)

2017-02-03 Thread Patchwork
== Series Details == Series: Geminilake pipe CSC (rev3) URL : https://patchwork.freedesktop.org/series/18596/ State : success == Summary == Series 18596v3 Geminilake pipe CSC https://patchwork.freedesktop.org/api/1.0/series/18596/revisions/3/mbox/ fi-bdw-5557u total:247 pass:233 dwarn:

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/dp: Move initialization of hpd_pin to a new function

2017-02-03 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/dp: Move initialization of hpd_pin to a new function URL : https://patchwork.freedesktop.org/series/19058/ State : success == Summary == Series 19058v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/4] drm/i915: Remove WA for swapped HPD pins in broxton A stepping

2017-02-03 Thread Patchwork
== Series Details == Series: series starting with [v2,1/4] drm/i915: Remove WA for swapped HPD pins in broxton A stepping URL : https://patchwork.freedesktop.org/series/19059/ State : success == Summary == Series 19059v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/se

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dp: link rate and lane count refactoring (rev2)

2017-02-03 Thread Patchwork
== Series Details == Series: drm/i915/dp: link rate and lane count refactoring (rev2) URL : https://patchwork.freedesktop.org/series/18359/ State : failure == Summary == Series 18359v2 drm/i915/dp: link rate and lane count refactoring https://patchwork.freedesktop.org/api/1.0/series/18359/revi

[Intel-gfx] [PULL] drm-misc-next *PSA* FINAL 4.11 FEATURE PULL *PSA*

2017-02-03 Thread Daniel Vetter
Hi Dave, Final 4.11 feature pull request: - sii8520 bridge update from Andrzej - ->release callback, maybe somewhen in the future we'll even get drm_device lifetimes correct! (Chris Wilson) - drm_mm search improvements, and good docs for different search strategies now (Chris) - simplify fbdev

Re: [Intel-gfx] [PATCH v2 05/13] drm/i915/dp: generate and cache sink rate array for all DP, not just eDP 1.4

2017-02-03 Thread Ville Syrjälä
On Fri, Feb 03, 2017 at 04:19:28PM +0200, Jani Nikula wrote: > There is some conflation related to sink rates, making this change more > complicated than it would otherwise have to be. There are three changes > here that are rather difficult to split up: > > 1) Use the intel_dp->sink_rates array f

Re: [Intel-gfx] [PATCH v2 13/13] drm/i915/dp: use readb and writeb calls for single byte DPCD access

2017-02-03 Thread Ville Syrjälä
On Fri, Feb 03, 2017 at 04:19:36PM +0200, Jani Nikula wrote: > This is what we have the readb and writeb variants for. Do some minor > return value and variable cleanup while at it. > > Cc: Manasi Navare > Cc: Ville Syrjälä > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_dp.c |

[Intel-gfx] [PATCH] drm/i915: Update firmware URL.

2017-02-03 Thread Rodrigo Vivi
Firmware page at 01.org has been updated. Althought the old link will still be valid as a symbolic link to the new page, let's fix here pointing to the right place so one day we can kill the other link for good. Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_csr.c | 2 +- 1 file cha

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Allow large objects to be tiled on gen2/3

2017-02-03 Thread Chris Wilson
On Fri, Feb 03, 2017 at 03:03:10PM +0200, Joonas Lahtinen wrote: > On pe, 2017-02-03 at 11:50 +, Chris Wilson wrote: > > We now have partial VMA support to break large objects into fence sized > > regions and no longer have to restrict tiling to small objects on gen2/3 > > > > Signed-off-by: C

[Intel-gfx] [PATCH] drm/i915: Sanity check inputs to i915_gem_evict_for_node()

2017-02-03 Thread Chris Wilson
Assert that the node is correctly aligned and that we are within the bounds of the VM. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_gem_evict.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i

[Intel-gfx] [PATCH] drm/i915: DMC 1.02 for Kabylake

2017-02-03 Thread Rodrigo Vivi
There is a new version of DMC available for Kabylake. It's release notes only mention: - Fix for glitch in AUX Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_csr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu

[Intel-gfx] [PATCH] drm/i915: DMC 1.03 for Geminilake

2017-02-03 Thread Rodrigo Vivi
There is a new version of DMC available for Kabylake. It's release notes only mention: - Enhancement in the FW to restore the PG2 state Cc: Ander Conselvan de Oliveira Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_csr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) di

Re: [Intel-gfx] [PATCH] drm/i915: Sanity check inputs to i915_gem_evict_for_node()

2017-02-03 Thread Matthew Auld
On 3 February 2017 at 18:08, Chris Wilson wrote: > Assert that the node is correctly aligned and that we are within the > bounds of the VM. > > Signed-off-by: Chris Wilson > Cc: Joonas Lahtinen Reviewed-by: Matthew Auld ___ Intel-gfx mailing list Inte

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Update firmware URL.

2017-02-03 Thread Patchwork
== Series Details == Series: drm/i915: Update firmware URL. URL : https://patchwork.freedesktop.org/series/19074/ State : failure == Summary == Series 19074v1 drm/i915: Update firmware URL. https://patchwork.freedesktop.org/api/1.0/series/19074/revisions/1/mbox/ Test drv_hangman: Subg

Re: [Intel-gfx] [PATCH v2 3/5] drm/i915: Use bool i915_param.alpha_support

2017-02-03 Thread Vivi, Rodrigo
Reviewed-by: Rodrigo Vivi On Thu, 2017-02-02 at 08:55 +, Chris Wilson wrote: > The alpha_support module option can only take one of two values, so > assign it to a boolean type. The only advantage is in pretty printing > via /sys/module/i915/parameters/alpha_support and elsewhere. > > Signed

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Sanity check inputs to i915_gem_evict_for_node()

2017-02-03 Thread Patchwork
== Series Details == Series: drm/i915: Sanity check inputs to i915_gem_evict_for_node() URL : https://patchwork.freedesktop.org/series/19076/ State : failure == Summary == Series 19076v1 drm/i915: Sanity check inputs to i915_gem_evict_for_node() https://patchwork.freedesktop.org/api/1.0/series

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: DMC 1.02 for Kabylake

2017-02-03 Thread Patchwork
== Series Details == Series: drm/i915: DMC 1.02 for Kabylake URL : https://patchwork.freedesktop.org/series/19080/ State : success == Summary == Series 19080v1 drm/i915: DMC 1.02 for Kabylake https://patchwork.freedesktop.org/api/1.0/series/19080/revisions/1/mbox/ fi-bsw-n3050 total:252

[Intel-gfx] [PATCH] drm/i915: DMC 1.03 for Geminilake

2017-02-03 Thread Rodrigo Vivi
There is a new version of DMC available for Geminilake. It's release notes only mention: - Enhancement in the FW to restore the PG2 state v2: Fixed the platform name on commit message. Noticed by Jani S. Cc: Jani Saarinen Cc: Ander Conselvan de Oliveira Signed-off-by: Rodrigo Vivi --- dr

[Intel-gfx] [PATCH] drm/i915: fix pm refcounting on fence error in execbuf

2017-02-03 Thread Daniele Ceraolo Spurio
Fences are creted/checked before the pm ref is taken, so if we jump to pre_mutex_err we will uncorrectly call intel_runtime_pm_put. Fixes: fec0445caa27 (drm/i915: Support explicit fencing for execbuf) Testcase: igt/gem_exec_params Cc: Chris Wilson Signed-off-by: Daniele Ceraolo Spurio --- drive

[Intel-gfx] [PATCH i-g-t] tests/gem_exec_params: add test for exec_fence params

2017-02-03 Thread Daniele Ceraolo Spurio
Added a subtest for invalid FENCE_IN usage, updated invalid-flag subtest and made the rsvd2 test skip when exec fences are available. Signed-off-by: Daniele Ceraolo Spurio --- lib/ioctl_wrappers.c| 29 + lib/ioctl_wrappers.h| 1 + tests/gem_exec_fence.c | 14

Re: [Intel-gfx] [PATCH] drm/i915: fix pm refcounting on fence error in execbuf

2017-02-03 Thread Chris Wilson
On Fri, Feb 03, 2017 at 02:45:29PM -0800, Daniele Ceraolo Spurio wrote: > Fences are creted/checked before the pm ref is taken, so if we jump to > pre_mutex_err we will uncorrectly call intel_runtime_pm_put. > > Fixes: fec0445caa27 (drm/i915: Support explicit fencing for execbuf) > Testcase: igt/g

Re: [Intel-gfx] [PATCH i-g-t] tests/gem_exec_params: add test for exec_fence params

2017-02-03 Thread Chris Wilson
On Fri, Feb 03, 2017 at 02:45:30PM -0800, Daniele Ceraolo Spurio wrote: > @@ -283,6 +287,21 @@ igt_main > RUN_FAIL(EINVAL); > } > > + igt_subtest("invalid-fence-in") { > + igt_require(gem_has_exec_fence(fd)); > + execbuf.flags = LOCAL_I915_EXEC_FENC

Re: [Intel-gfx] [PATCH] drm/i915: fix pm refcounting on fence error in execbuf

2017-02-03 Thread Chris Wilson
On Fri, Feb 03, 2017 at 10:55:32PM +, Chris Wilson wrote: > On Fri, Feb 03, 2017 at 02:45:29PM -0800, Daniele Ceraolo Spurio wrote: > > Fences are creted/checked before the pm ref is taken, so if we jump to > > pre_mutex_err we will uncorrectly call intel_runtime_pm_put. > > > > Fixes: fec0445

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: fix pm refcounting on fence error in execbuf

2017-02-03 Thread Patchwork
== Series Details == Series: drm/i915: fix pm refcounting on fence error in execbuf URL : https://patchwork.freedesktop.org/series/19087/ State : warning == Summary == Series 19087v1 drm/i915: fix pm refcounting on fence error in execbuf https://patchwork.freedesktop.org/api/1.0/series/19087/r

[Intel-gfx] [PATCH v2] drm/i915: fix pm refcounting on fence error in execbuf

2017-02-03 Thread Daniele Ceraolo Spurio
Fences are creted/checked before the pm ref is taken, so if we jump to pre_mutex_err we will uncorrectly call intel_runtime_pm_put. v2: transform unwind sequence (Chris) Fixes: fec0445caa27 (drm/i915: Support explicit fencing for execbuf) Testcase: igt/gem_exec_params Cc: Chris Wilson Signed-off

[Intel-gfx] [PATCH v2] tests/gem_exec_params: add test for exec_fence params

2017-02-03 Thread Daniele Ceraolo Spurio
Added a subtest for invalid FENCE_IN usage, updated invalid-flag subtest and made the rsvd2 test skip when exec fences are available. v2: add a test that tries to use the device fd as fence (Chris) Cc: Chris Wilson Signed-off-by: Daniele Ceraolo Spurio --- lib/ioctl_wrappers.c| 29

[Intel-gfx] [PATCH] PM / runtime: Avoid false-positive warnings from might_sleep_if()

2017-02-03 Thread Rafael J. Wysocki
On Thursday, February 02, 2017 02:34:42 PM Sedat Dilek wrote: > On Wed, Feb 1, 2017 at 1:22 AM, Rafael J. Wysocki wrote: > > On Mon, Jan 30, 2017 at 11:44 PM, Rafael J. Wysocki > > wrote: > >> On 1/24/2017 2:33 AM, Sedat Dilek wrote: > >>> > >>> On Fri, Dec 30, 2016 at 3:02 PM, Rafael J. Wysocki

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