== Series Details ==
Series: series starting with [1/3] drm/i915/cfl: Introduce Coffee Lake platform
definition.
URL : https://patchwork.freedesktop.org/series/25442/
State : success
== Summary ==
Series 25442v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/2544
>-Original Message-
>From: Vivi, Rodrigo
>Sent: Wednesday, June 7, 2017 2:26 PM
>To: Srivatsa, Anusha
>Cc: intel-gfx@lists.freedesktop.org
>Subject: Re: [PATCH 2/3] drm/i915/cfl: Add Coffee Lake PCI IDs for H Sku.
>
>On Wed, 2017-06-07 at 11:24 -0700, Anusha Srivatsa wrote:
>> Add PCI Id
Hi all,
Today's linux-next merge of the drm-intel tree got a conflict in:
drivers/gpu/drm/i915/intel_engine_cs.c
between commit:
d9533f19d840 ("drm/i915: Hold a wakeref for probing the ring registers")
(which is also commit a091d4ee931b in the drm-intel tree)
from the drm-intel-fixes tree
Hi all,
Today's linux-next merge of the drm-intel tree got a conflict in:
drivers/gpu/drm/i915/i915_gem_gtt.c
between commit:
d90c98905afd ("drm/i915: Guard against i915_ggtt_disable_guc() being invoked
unconditionally")
(which also appears as commit cb60606d835c in the drm-intel tree)
fr
Hi Dave,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/i915/i915_drv.h
between commit:
d86b18a06cf3 ("drm/i915: Serialize GTT/Aperture accesses on BXT")
(which is also commit 0ef34ad6222a in the drm tree)
from the drm-intel-fixes tree and commit:
80debff8d9
>-Original Message-
>From: Zhang, Tina
>Sent: Wednesday, June 07, 2017 5:06 PM
>To: Chen, Xiaoguang ;
>alex.william...@redhat.com; kra...@redhat.com; ch...@chris-wilson.co.uk;
>intel-gfx@lists.freedesktop.org; linux-ker...@vger.kernel.org;
>zhen...@linux.intel.com; Lv, Zhiyuan ; intel-gvt
Hi,
I am executing the DP compliance test suite and the only test currently failing
with the drm-tip + my patch (https://patchwork.freedesktop.org/series/25191/)
Is the power management test (4.4.3) where it expects the source DUT to go into
Power state D3 by setting DPCD register 0x600 to 2 a
Hi Dave,
Just 2 patches, hopefully a sign that things are rounding into shape for 4.12.
The first patch is one from jstultz that slipped through the cracks in May, it
fixes a regression introduced in robher's drm_of_find_panel_or_bridge patchset.
The other fixes a bug introduced with HDMI support
Hi all,
After merging the drm-misc-fixes tree, today's linux-next build (x86_64
allmodconfig) produced this warning:
drivers/gpu/drm/i915/intel_engine_cs.c: In function 'intel_engine_is_idle':
drivers/gpu/drm/i915/intel_engine_cs.c:1103:27: warning: unused variable
'dev_priv' [-Wunused-variable]
CONTRIBUTING requests that people do this, but it's a lot easier if we
just set it up by default for them.
Signed-off-by: Eric Anholt
---
I missed this step on my previous two patches, so let's just prevent
that in the future. :(
autogen.sh | 3 +++
1 file changed, 3 insertions(+)
diff --git
This just checks that the appropriate errors get thrown, and that the
modifier can be set/get successfully, and that the modifier doesn't
leak to other BO allocations. Testing of scanout will be done with
the writeback support that Boris is building. The modifier has no
effect on V3D rendering, s
This makes my emacs default to consistent indentation for the project.
Signed-off-by: Eric Anholt
---
.editorconfig | 9 +
1 file changed, 9 insertions(+)
create mode 100644 .editorconfig
diff --git a/.editorconfig b/.editorconfig
new file mode 100644
index ..bdfebacaf4cd
-
== Series Details ==
Series: series starting with [1/3] drm/i915/cfl: Introduce Coffee Lake platform
definition.
URL : https://patchwork.freedesktop.org/series/25442/
State : failure
== Summary ==
Series 25442v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/2544
It seems appropriate for me.
Although it will now run only if (intel_state->modeset) instead in all
commit_tail it is
apparently in sync with original motivation. And also be able to catch
all unclaimed reg access anyways.
So,
Reviewed-by: Rodrigo Vivi
On Wed, Jun 7, 2017 at 1:04 PM, Chris Wils
On Wed, 2017-06-07 at 14:23 -0700, Rodrigo Vivi wrote:
> On Wed, 2017-06-07 at 11:24 -0700, Anusha Srivatsa wrote:
> > Add PCI Ids for S Sku following the BSpec.
> >
> > v2: Remove the unused INTEL_CFL_IDS.(Rodrigo)
> >
> > Cc: Rodrigo Vivi
> > Signed-off-by: Anusha Srivatsa
> > ---
> > driver
So let's force it on the virtual detection.
Also it is still the only silicon for now on this PCH,
so WARN otherwise.
v2: Rebased on top of Cannonlake and added the missed
debug message as pointed by DK.
Cc: Dhinakaran Pandiyan
Signed-off-by: Rodrigo Vivi
Reviewed-by: Anusha Srivatsa
---
The whole Display engine for Coffee Lake is pretty much
identical to the Kabylake. For this reason let's reuse
all display related production workardounds here even though
CFL is not explicit listed at Display workarounds page at Spec.
v2: moved intel_pm.c chunck to this patch in order to address
Coffee Lake is a Intel® Processor containing Intel® HD Graphics
following Kabylake.
It is Gen9 graphics based platform on top of CNP PCH.
Let's start by adding the platform definition based on previous
platforms but yet as preliminary_hw_support.
On following patches we will start adding PCI IDs
>-Original Message-
>From: Pandiyan, Dhinakaran
>Sent: Wednesday, June 7, 2017 3:46 PM
>To: Srivatsa, Anusha
>Cc: intel-gfx@lists.freedesktop.org; Vivi, Rodrigo
>Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915/huc: Load HuC on Coffeelake
>
>On Wed, 2017-06-07 at 11:43 -0700, Anusha Srivat
On Wed, 2017-06-07 at 11:43 -0700, Anusha Srivatsa wrote:
> Coffeelake reuses Kabylake's HUC firmware.
s/Coffeelake/Coffee Lake
That's how the other patches have it :)
>
> Cc: Rodrigo Vivi
> Signed-off-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/intel_huc.c | 2 +-
> 1 file changed, 1 i
On Tue, 2017-06-06 at 12:20 -0700, Rodrigo Vivi wrote:
> Coffee Lake inherit most of Kabylake production
> workardounds.
>
> Only difference identified so far is:
> - WaDisableLSQCROPERFforOCL is marked as SIWA_NEVER
>
> Cc: Dhinakaran Pandiyan
> Signed-off-by: Rodrigo Vivi
> ---
> drivers/gpu
On Wed, 2017-06-07 at 22:06 +, Pandiyan, Dhinakaran wrote:
> On Wed, 2017-06-07 at 21:53 +, Vivi, Rodrigo wrote:
> > On Wed, 2017-06-07 at 18:04 +, Pandiyan, Dhinakaran wrote:
> > > On Tue, 2017-06-06 at 12:20 -0700, Rodrigo Vivi wrote:
> > > > All here is pretty much like Kabylake.
> >
On Wed, 2017-06-07 at 21:53 +, Vivi, Rodrigo wrote:
> On Wed, 2017-06-07 at 18:04 +, Pandiyan, Dhinakaran wrote:
> > On Tue, 2017-06-06 at 12:20 -0700, Rodrigo Vivi wrote:
> > > All here is pretty much like Kabylake.
> > >
> > > Cc: Dhinakaran Pandiyan
> > > Signed-off-by: Rodrigo Vivi
>
On Wed, 2017-06-07 at 21:52 +, Vivi, Rodrigo wrote:
> On Wed, 2017-06-07 at 18:44 +, Pandiyan, Dhinakaran wrote:
> > On Tue, 2017-06-06 at 12:20 -0700, Rodrigo Vivi wrote:
> > > The whole Display engine for Coffee Lake is pretty much
> > > identical to the Kabylake. For this reason let's re
On Wed, 2017-06-07 at 18:04 +, Pandiyan, Dhinakaran wrote:
> On Tue, 2017-06-06 at 12:20 -0700, Rodrigo Vivi wrote:
> > All here is pretty much like Kabylake.
> >
> > Cc: Dhinakaran Pandiyan
> > Signed-off-by: Rodrigo Vivi
> > ---
> > drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
> > 1 file
On Wed, 2017-06-07 at 18:44 +, Pandiyan, Dhinakaran wrote:
> On Tue, 2017-06-06 at 12:20 -0700, Rodrigo Vivi wrote:
> > The whole Display engine for Coffee Lake is pretty much
> > identical to the Kabylake. For this reason let's reuse
> > all display related production workardounds here even th
Same comments I put on GuC patch are valid here...
Reviewed-by: Rodrigo Vivi
On Wed, 2017-06-07 at 11:43 -0700, Anusha Srivatsa wrote:
> Coffeelake reuses Kabylake's HUC firmware.
>
> Cc: Rodrigo Vivi
> Signed-off-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/intel_huc.c | 2 +-
> 1 file
With this approach we need to have in mind that any new kbl firmware
version needs to be validated on both kbl and cfl by our QA before
publishing.
However the differences are really minimal if not 0. So publishing 2
identical files with different names maybe doesn't make any sense and
wouldn't sa
Reviewed-by: Rodrigo Vivi
On Wed, 2017-06-07 at 11:24 -0700, Anusha Srivatsa wrote:
> Add PCI Ids for U Skus of Coffeelake.
>
> v2: Use intel_coffeelake_gt3_info, in accordance to-
> Rodrigo's patch:
> https://patchwork.freedesktop.org/patch/160148/
>
> v3: Renove unused INTEL_CFL_IDS(Rodrigo).
On Wed, 2017-06-07 at 11:24 -0700, Anusha Srivatsa wrote:
> Add PCI Ids for H Sku by following the BSpec.
>
> v2: Remove unused INTEL_CFL_IDS.(Rodrigo).
>
> Cc: Rodrigo Vivi
> Signed-off-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/i915_pci.c | 1 +
> include/drm/i915_pciids.h | 3 ++
On Wed, 2017-06-07 at 11:24 -0700, Anusha Srivatsa wrote:
> Add PCI Ids for S Sku following the BSpec.
>
> v2: Remove the unused INTEL_CFL_IDS.(Rodrigo)
>
> Cc: Rodrigo Vivi
> Signed-off-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/i915_pci.c | 1 +
> include/drm/i915_pciids.h | 4 ++
Hi Rodrigo,
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on v4.12-rc4 next-20170607]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Rodrigo-Vivi/drm-i915-cnl
Hi Anusha,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.12-rc4 next-20170607]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Anusha-Srivatsa/drm-i915-cfl-Add
Hi Anusha,
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on v4.12-rc4 next-20170607]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Anusha-Srivatsa/drm-i915-cfl
Hi Rodrigo,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.12-rc4 next-20170607]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Rodrigo-Vivi/drm-i915-cnl
Quoting Chris Wilson (2017-05-04 12:55:08)
> Replace the large comment about requiring the powerwell for
> intel_uncore_arm_unclaimed_mmio_detection() by moving the arming of the
> mmio error detection into the powerwell held for modesetting. Thereby
> also accomplishing the goal of only arming the
Daniel Vetter writes:
> On Mon, Apr 10, 2017 at 06:24:32PM -0700, Eric Anholt wrote:
>> This successfully catches vc4's lack of dmabuf fencing.
>>
>> Signed-off-by: Eric Anholt
>> ---
>>
>> Has anyone looked into shared infrastructure for tests to do
>> KMS/dmabuf/etc. things with a generic "g
On 06/07/2017 10:55 AM, Ville Syrjälä wrote:
On Wed, Jun 07, 2017 at 10:45:25AM -0700, clinton.a.tay...@intel.com wrote:
From: Clint Taylor
RGB565 Pixel format planes can now be rotated at 90 and 270 degrees
"now" == since when?
GLK, I will update the commit message to be more specific.
On Tue, 2017-06-06 at 12:20 -0700, Rodrigo Vivi wrote:
> The whole Display engine for Coffee Lake is pretty much
> identical to the Kabylake. For this reason let's reuse
> all display related production workardounds here even though
Are these all the display workarounds we have or is this patch ju
Coffeelake reuses Kabylake's GuC.
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/intel_guc_loader.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i9
Coffeelake reuses Kabylake's HUC firmware.
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_huc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index f5eb18d0e..6145fa0 100644
== Series Details ==
Series: series starting with [1/3] drm/i915/cfl: Add Coffee Lake PCI IDs for S
Skus.
URL : https://patchwork.freedesktop.org/series/25419/
State : failure
== Summary ==
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK incl
Add PCI Ids for H Sku by following the BSpec.
v2: Remove unused INTEL_CFL_IDS.(Rodrigo).
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_pci.c | 1 +
include/drm/i915_pciids.h | 3 +++
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_
Add PCI Ids for S Sku following the BSpec.
v2: Remove the unused INTEL_CFL_IDS.(Rodrigo)
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_pci.c | 1 +
include/drm/i915_pciids.h | 4
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915
Add PCI Ids for U Skus of Coffeelake.
v2: Use intel_coffeelake_gt3_info, in accordance to-
Rodrigo's patch:
https://patchwork.freedesktop.org/patch/160148/
v3: Renove unused INTEL_CFL_IDS(Rodrigo).
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_pci.c | 1 +
incl
On Tue, 2017-06-06 at 12:20 -0700, Rodrigo Vivi wrote:
> All here is pretty much like Kabylake.
>
> Cc: Dhinakaran Pandiyan
> Signed-off-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915
== Series Details ==
Series: drm/i915/glk: RGB565 planes now allow 90/270 rotation
URL : https://patchwork.freedesktop.org/series/25417/
State : success
== Summary ==
Series 25417v1 drm/i915/glk: RGB565 planes now allow 90/270 rotation
https://patchwork.freedesktop.org/api/1.0/series/25417/rev
On Wed, Jun 07, 2017 at 10:45:25AM -0700, clinton.a.tay...@intel.com wrote:
> From: Clint Taylor
>
> RGB565 Pixel format planes can now be rotated at 90 and 270 degrees
"now" == since when?
>
> Signed-off-by: Clint Taylor
> ---
> drivers/gpu/drm/i915/intel_atomic_plane.c | 11 ---
>
From: Clint Taylor
RGB565 Pixel format planes can now be rotated at 90 and 270 degrees
Signed-off-by: Clint Taylor
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c
b/drivers/
On Tue, 2017-06-06 at 12:19 -0700, Rodrigo Vivi wrote:
> So let's force it on the virtual detection.
>
> Also it is still the only silicon for now on this PCH,
> so WARN otherwise.
>
> Signed-off-by: Rodrigo Vivi
> Reviewed-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/i915_drv.c | 4
>
Hi,
On 7 June 2017 at 17:28, Ville Syrjälä wrote:
> On Wed, Jun 07, 2017 at 04:48:06PM +0100, Daniel Stone wrote:
>> It does, and I have correct CCS output (tested by displaying frames
>> either as Y_CCS, or as plain Y; correct display with the former and
>> visibly showing an incomplete primary
On Wed, Jun 07, 2017 at 04:48:06PM +0100, Daniel Stone wrote:
> Hi,
>
> On 7 June 2017 at 16:33, Ville Syrjälä wrote:
> > On Wed, Jun 07, 2017 at 03:24:58PM +0100, Daniel Stone wrote:
> >> On 7 June 2017 at 13:53, Ville Syrjälä
> >> wrote:
> >> > Anyways, I'll have to revisit the the offsets[]
Hi,
On 7 June 2017 at 16:33, Ville Syrjälä wrote:
> On Wed, Jun 07, 2017 at 03:24:58PM +0100, Daniel Stone wrote:
>> On 7 June 2017 at 13:53, Ville Syrjälä wrote:
>> > Anyways, I'll have to revisit the the offsets[] thing because people
>> > didn't like my original linear offset idea, and it doe
On Wed, Jun 07, 2017 at 03:24:58PM +0100, Daniel Stone wrote:
> Hi,
>
> On 7 June 2017 at 13:53, Ville Syrjälä wrote:
> > On Wed, Jun 07, 2017 at 12:44:47PM +0100, Daniel Stone wrote:
> >> /*
> >> * We don't require any
> >> * CCS block size alignment of the fb under the assumption that the
> >
patch merged to dinq
thanks for all comments and reviews
On Tue, Jun 6, 2017 at 2:58 PM, Srivatsa, Anusha
wrote:
>
>
>>-Original Message-
>>From: Vivi, Rodrigo
>>Sent: Tuesday, June 6, 2017 9:06 AM
>>To: intel-gfx@lists.freedesktop.org
>>Cc: Vivi, Rodrigo ; Chris Wilson >wilson.co.uk>; Sr
patch merged to dinq with the fixed spelling.
Thanks for the review
On Tue, Jun 6, 2017 at 11:14 AM, Manasi Navare
wrote:
> Just a very tiny nitpick about correction in the
> spelling of "unnecessary" in the title.
>
> Other than that
>
> Reviewed-by: Manasi Navare
>
> On Tue, Jun 06, 2017 at 09
Patches merged to dinq.
Thanks for patches and reviews.
On Tue, Jun 6, 2017 at 1:30 PM, Rodrigo Vivi wrote:
> The workaround added in
> commit c6782b76d31a ("drm/i915/gen9: Reset secondary power well
> equests left on by DMC/KVMR")
> needs to be applied on Cannonlake as well.
>
> So let's assume
Replaced custom load implementation with lib counterpart.
Signed-off-by: Radoslaw Szwichtenberg
Cc: Chris Wilson
Cc: Arkadiusz Hiler
---
tests/pm_rps.c | 80 --
1 file changed, 16 insertions(+), 64 deletions(-)
diff --git a/tests/pm_rps.
Hi,
On 7 June 2017 at 13:53, Ville Syrjälä wrote:
> On Wed, Jun 07, 2017 at 12:44:47PM +0100, Daniel Stone wrote:
>> /*
>> * We don't require any
>> * CCS block size alignment of the fb under the assumption that the
>> * hardware will handle things correctly of only a single pixel
>> * gets t
On Wed, Jun 7, 2017 at 4:09 AM, Ville Syrjälä
wrote:
> On Wed, Jun 07, 2017 at 01:59:05PM +0300, Ville Syrjälä wrote:
>> On Tue, Jun 06, 2017 at 02:56:23PM -0700, Rodrigo Vivi wrote:
>> > When addressing Imre's comments I noticed:
>> >
>> > error: ‘cnl_set_cdclk’ defined but not used [-Werror=unus
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Wednesday, June 7, 2017 1:16 AM
> To: Deak, Imre ; Bloomfield, Jon
>
> Cc: intel-gfx@lists.freedesktop.org; Mustaffa, Mustamin B
>
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/bxt: Enable VBT based BL con
On Mon, 15 May 2017, Jani Nikula wrote:
> The following commits have been marked as Cc: stable or fixing something
> in v4.12-rc1 or earlier, but failed to cherry-pick to
> drm-intel-fixes. Please see if they are worth backporting, and please do
> so if they are.
Update:
d96a7d2adb04 ("drm/i915:
On Wed, Jun 07, 2017 at 12:44:47PM +0100, Daniel Stone wrote:
> Hi Vidya,
>
> On 7 June 2017 at 12:40, Vidya Srinivas wrote:
> > +static const struct drm_format_info ccs_formats[] = {
> > + { .format = DRM_FORMAT_XRGB, .depth = 24, .num_planes = 2, .cpp
> > = { 4, 1, }, .hsub = 16, .vs
Martin, the kms_flip test already skips when we have entered the "no modes
available" state.
I talked with Petri a bit about this and we sort of agree that IGT should only
skip tests on an "expected" lack of HW/SW requirements. IGT should not skip on
bad states that has been created by the test
On 07/06/17 14:33, Chris Wilson wrote:
Quoting Martin Peres (2017-06-07 12:13:24)
How about this: When the modeset call fails, check if the link-status is
BAD. If not, return a FAIL. If so, force a full re-probe, pick the
highest available mode and try again. Do this until a mode applies. If
no
Hi Vidya,
On 7 June 2017 at 12:40, Vidya Srinivas wrote:
> +static const struct drm_format_info ccs_formats[] = {
> + { .format = DRM_FORMAT_XRGB, .depth = 24, .num_planes = 2, .cpp =
> { 4, 1, }, .hsub = 16, .vsub = 8, },
> + { .format = DRM_FORMAT_XBGR, .depth = 24, .num_pl
From: Chandra Konduru
This patch adds NV12 to list of supported formats for sprite plane.
v2: Rebased (me)
Link: https://patchwork.kernel.org/patch/6426211/
Signed-off-by: Chandra Konduru
Signed-off-by: Nabendu Maiti
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/intel_sprite.c | 24
From: Chandra Konduru
This patch adds NV12 as supported format
to intel_framebuffer_init and performs various checks.
v2:
-Fix an issue in checks added (Chandra Konduru)
v3: rebased (me)
Link: https://patchwork.kernel.org/patch/6426221/
Signed-off-by: Chandra Konduru
Signed-off-by: Nabendu Ma
From: Chandra Konduru
This patch adds NV12 to list of supported formats for
primary plane
v2: Rebased (Chandra Konduru)
v3: Rebased (me)
Link: https://patchwork.kernel.org/patch/6426201/
Signed-off-by: Chandra Konduru
Signed-off-by: Nabendu Maiti
Signed-off-by: Vidya Srinivas
---
drivers/g
From: Ville Syrjälä
SKL+ display engine can scan out certain kinds of compressed surfaces
produced by the render engine. This involved telling the display engine
the location of the color control surfae (CCS) which describes which
parts of the main surface are compressed and which are not. The lo
From: Chandra Konduru
This patch adds NV12 to format_is_yuv() function and
made it available for both primary and sprite planes
v2:
-Use intel_ prefix for format_is_yuv (Ville)
Link: https://patchwork.kernel.org/patch/6426181/
Signed-off-by: Chandra Konduru
Signed-off-by: Nabendu Maiti
Signed
From: Chandra Konduru
This patch updates scaler max limit support for NV12
Link: https://patchwork.kernel.org/patch/6426191/
Signed-off-by: Chandra Konduru
Signed-off-by: Nabendu Maiti
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/intel_display.c | 26 ++
dri
From: Ville Syrjälä
SKL+ display engine can scan out certain kinds of compressed surfaces
produced by the render engine. This involved telling the display engine
the location of the color control surfae (CCS) which describes
which parts of the main surface are compressed and which are not. The
lo
This patch series is adding NV12 support for Skylake display after
rebasing on latest drm-intel-nightly. Initial series of the patches
can be found here:
https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html
Feature has been currently tested with custom linux based test tool
IGT te
From: Chandra Konduru
This patch sets appropriate scaler mode for NV12 format.
In this mode, skylake scaler does either chroma-upsampling or
chroma-upsampling and resolution scaling
Link: https://patchwork.kernel.org/patch/6426161/
Signed-off-by: Chandra Konduru
Signed-off-by: Nabendu Maiti
Si
Quoting Martin Peres (2017-06-07 12:13:24)
> How about this: When the modeset call fails, check if the link-status is
> BAD. If not, return a FAIL. If so, force a full re-probe, pick the
> highest available mode and try again. Do this until a mode applies. If
> no modes are left, just SKIP the t
On 31/05/17 17:45, Martin Peres wrote:
On 31/05/17 16:55, Chris Wilson wrote:
On Wed, May 31, 2017 at 04:44:41PM +0300, Martin Peres wrote:
On 31/05/17 15:42, Chris Wilson wrote:
On Wed, May 31, 2017 at 01:40:00PM +0300, Martin Peres wrote:
On 26/05/17 14:48, Chris Wilson wrote:
If we do a sh
On Wed, Jun 07, 2017 at 01:59:05PM +0300, Ville Syrjälä wrote:
> On Tue, Jun 06, 2017 at 02:56:23PM -0700, Rodrigo Vivi wrote:
> > When addressing Imre's comments I noticed:
> >
> > error: ‘cnl_set_cdclk’ defined but not used [-Werror=unused-function]
> > static void cnl_set_cdclk(struct drm_i915_
== Series Details ==
Series: drm/i915/bxt: Enable VBT based BL control for DP (rev3)
URL : https://patchwork.freedesktop.org/series/25323/
State : success
== Summary ==
Series 25323v3 drm/i915/bxt: Enable VBT based BL control for DP
https://patchwork.freedesktop.org/api/1.0/series/25323/revisi
On 07/06/17 13:34, Chris Wilson wrote:
This reverts commit 7c8703fb02b248c2bcf9756bba8812bcfe7ed5d3.
If we expect it to fail until we find a solution, let the hw fail and
continue to track the known failure in CI/bugs.
Cc: Martin Peres
I agree, the kernel/HW is broken.
However, this fix is
On Tue, Jun 06, 2017 at 02:56:23PM -0700, Rodrigo Vivi wrote:
> When addressing Imre's comments I noticed:
>
> error: ‘cnl_set_cdclk’ defined but not used [-Werror=unused-function]
> static void cnl_set_cdclk(struct drm_i915_private *dev_priv,
> ^
> cc1: all warnings being treated as
Hi Vidya,
On 7 June 2017 at 11:41, Vidya Srinivas wrote:
> + case I915_FORMAT_MOD_Y_TILED_CCS:
> + if (plane == 1)
> + return 128;
> + /* fall through */
> case I915_FORMAT_MOD_Y_TILED:
> if (IS_GEN2(dev_priv) || HAS_
== Series Details ==
Series: drm/i915/skl+: enable PF_ID interlace mode in SKL
URL : https://patchwork.freedesktop.org/series/25397/
State : success
== Summary ==
Series 25397v1 drm/i915/skl+: enable PF_ID interlace mode in SKL
https://patchwork.freedesktop.org/api/1.0/series/25397/revisions/1
On Wed, 2017-06-07 at 11:24 +0100, Chris Wilson wrote:
> Quoting Mika Kahola (2017-06-07 09:00:10)
> >
> > On Tue, 2017-06-06 at 14:23 +0100, Chris Wilson wrote:
> > >
> > > Quoting Mika Kahola (2017-06-06 13:33:14)
> > > >
> > > >
> > > > On Tue, 2017-06-06 at 15:27 +0300, Ville Syrjälä wrote:
Hi Vidya,
I guess you didn't see my submission of this series a couple of weeks
ago, which included some fixes.
On 7 June 2017 at 11:41, Vidya Srinivas wrote:
> Link: https://patchwork.kernel.org/patch/9637253/
The Patchwork link can be dropped when submitting by mail.
> +static const struct dr
From: Chandra Konduru
This patch adds NV12 to list of supported formats for sprite plane.
v2: Rebased (me)
Link: https://patchwork.kernel.org/patch/6426211/
Signed-off-by: Chandra Konduru
Signed-off-by: Nabendu Maiti
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/intel_sprite.c | 24
This reverts commit 7c8703fb02b248c2bcf9756bba8812bcfe7ed5d3.
If we expect it to fail until we find a solution, let the hw fail and
continue to track the known failure in CI/bugs.
Cc: Martin Peres
---
tests/kms_cursor_legacy.c | 18 +-
1 file changed, 1 insertion(+), 17 deletion
From: Chandra Konduru
This patch adds NV12 to format_is_yuv() function and
made it available for both primary and sprite planes
v2:
-Use intel_ prefix for format_is_yuv (Ville)
Link: https://patchwork.kernel.org/patch/6426181/
Signed-off-by: Chandra Konduru
Signed-off-by: Nabendu Maiti
Signed
From: Chandra Konduru
This patch adds NV12 as supported format
to intel_framebuffer_init and performs various checks.
v2:
-Fix an issue in checks added (Chandra Konduru)
v3: rebased (me)
Link: https://patchwork.kernel.org/patch/6426221/
Signed-off-by: Chandra Konduru
Signed-off-by: Nabendu Ma
From: Chandra Konduru
This patch sets appropriate scaler mode for NV12 format.
In this mode, skylake scaler does either chroma-upsampling or
chroma-upsampling and resolution scaling
Link: https://patchwork.kernel.org/patch/6426161/
Signed-off-by: Chandra Konduru
Signed-off-by: Nabendu Maiti
Si
From: Chandra Konduru
This patch adds NV12 to list of supported formats for
primary plane
v2: Rebased (Chandra Konduru)
v3: Rebased (me)
Link: https://patchwork.kernel.org/patch/6426201/
Signed-off-by: Chandra Konduru
Signed-off-by: Nabendu Maiti
Signed-off-by: Vidya Srinivas
---
drivers/g
From: Ville Syrjälä
SKL+ display engine can scan out certain kinds of compressed surfaces
produced by the render engine. This involved telling the display engine
the location of the color control surfae (CCS) which describes which
parts of the main surface are compressed and which are not. The lo
From: Chandra Konduru
This patch updates scaler max limit support for NV12
Link: https://patchwork.kernel.org/patch/6426191/
Signed-off-by: Chandra Konduru
Signed-off-by: Nabendu Maiti
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/intel_display.c | 26 ++
dri
From: Ville Syrjälä
SKL+ display engine can scan out certain kinds of compressed surfaces
produced by the render engine. This involved telling the display engine
the location of the color control surfae (CCS) which describes
which parts of the main surface are compressed and which are not. The
lo
This patch series is adding NV12 support for Skylake display after
rebasing on latest drm-intel-nightly. Initial series of the patches
can be found here:
https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html
Feature has been currently tested with custom linux based test tool
IGT te
Quoting Mika Kahola (2017-06-07 09:00:10)
> On Tue, 2017-06-06 at 14:23 +0100, Chris Wilson wrote:
> > Quoting Mika Kahola (2017-06-06 13:33:14)
> > >
> > > On Tue, 2017-06-06 at 15:27 +0300, Ville Syrjälä wrote:
> > > >
> > > > On Tue, Jun 06, 2017 at 03:20:46PM +0300, Mika Kahola wrote:
> > > >
On 05/06/2017 11:26, Chris Wilson wrote:
Originally we would enable and disable the breadcrumb interrupt
immediately on demand. This was slow enough to have a large impact
(>30%) on tasks that hopped between engines. However, by using a shadow
to keep the irq alive for an extra interrupt (see co
On Wed, Jun 07, 2017 at 06:25:46AM +, Williams, Dan J wrote:
> With one compile fix below the 'acpi' branch works for me. Please feel
> free to add:
The mail seems to contain garbage that can't be applied, but I just
applied the changes manually.
___
On Wed, Jun 07, 2017 at 12:37:51PM +0300, Andy Shevchenko wrote:
> It think we may fold it.
Yes, I'll fold it and delcare the tree stable late tonight my time.
> Besides that we might need the following fix as well.
Yeah. Another reasone why buffer.pointer should be a void pointer.
In previous GEN default Interlace mode enabled is IF-ID mode, but IF-ID
mode has many limitations in SKL. This mode doesn't support y-tiling,
90-270 rotation is not supported & YUV-420 planar source pixel formats
are not supported with above mode.
This patch make changes to use PF-ID Interlace mod
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