variable 'data'is used uninitialized in this function. thus, 'function
dcs_get_backlight'
will return unwanted value/fail.
Thus, adding NULL initialized to 'data' variable will solve the return
failure happening.
v2: Change commit message to reflect upstream with proper message
Change-Id: I3e2d
4.12-stable review patch. If anyone has any objections, please let me know.
--
From: Maarten Lankhorst
commit 5279fc7724ae3a82c9cfe5b09c1fb07ff0e41056 upstream.
bdw_load_gamma_lut is writing beyond the array to the maximum value.
The intend of the function is to clamp values >
4.9-stable review patch. If anyone has any objections, please let me know.
--
From: Maarten Lankhorst
commit 5279fc7724ae3a82c9cfe5b09c1fb07ff0e41056 upstream.
bdw_load_gamma_lut is writing beyond the array to the maximum value.
The intend of the function is to clamp values >
On Fri, 2017-08-11 at 18:58 +0530, Shashank Sharma wrote:
> Our current logic to read LSPCON's current mode, stops retries and
> breaks wait-loop, if it gets LSPCON_MODE_INVALID as return from the
> core function. This doesn't allow us to try reading the mode again.
>
> This patch removes this con
On Fri, Aug 11, 2017 at 02:39:07PM +0300, Jani Nikula wrote:
> Ever since we've parsed VBT child devices, starting from 6acab15a7b0d
> ("drm/i915: use the HDMI DDI buffer translations from VBT"), we've
> ignored the child device information if more than one child device
> references the same port.
On Fri, 2017-08-11 at 18:58 +0530, Shashank Sharma wrote:
> It's an observation during some CI tests that few LSPCON chips
> respond slow while system is under load, and need some delay
Thanks for the patch. Can you please explain what you mean by load here?
I can't follow why an external chip wou
Load HuC version 6.00.2188 on Cannonlake.
Cc: Rodrigo Vivi
Cc: Cheng Lyncoln
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_huc.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index 6145fa0..0
>-Original Message-
>From: Zanoni, Paulo R
>Sent: Monday, August 14, 2017 2:14 PM
>To: Srivatsa, Anusha ; intel-
>g...@lists.freedesktop.org
>Cc: Vivi, Rodrigo
>Subject: Re: [Intel-gfx] [PATCH] drm/i915: Split pin mapping into per platform
>functions
>
>Em Qui, 2017-08-10 às 11:42 -0700,
== Series Details ==
Series: tests/kms_flip: fix spin_batch conversion
URL : https://patchwork.freedesktop.org/series/28765/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
3685dabb0ab25eb1bc2df867f749701777153056 igt/gem_exec_fence: Exercise syncobj
API
w
Quoting Chris Wilson (2017-08-14 21:18:27)
> Supplement dmesg with the function call graph to try and help identify
> why the suspend failed. On the other hand, it may be very noisy and
> perturb the system due to its overhead...
And it appears ftrace is not stable enough to use across CI.
Interes
Quoting Daniel Vetter (2017-08-14 21:32:00)
> The goal of these subtests was just to delay a kms operation a little
> bit. The goal wasn't to
> - spin until the operation was completed. That results in a gpu hang,
> and gpu hangs need igt_hang for safety.
> - complete it before the operation. Tha
The goal of these subtests was just to delay a kms operation a little
bit. The goal wasn't to
- spin until the operation was completed. That results in a gpu hang,
and gpu hangs need igt_hang for safety.
- complete it before the operation. That's just pointless.
Fix it by using the timeout suppo
Exercise the drm_syncobj / vGEM coupling.
Signed-off-by: Chris Wilson
---
lib/igt_vgem.c | 68 +++-
lib/igt_vgem.h | 15 +++-
tests/Makefile.sources | 1 +
tests/vgem_syncobj.c | 212 +
4 files changed, 276 inserti
Signed-off-by: Chris Wilson
---
tests/gem_eio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/gem_eio.c b/tests/gem_eio.c
index 3c826626..15120842 100644
--- a/tests/gem_eio.c
+++ b/tests/gem_eio.c
@@ -53,7 +53,7 @@ static bool i915_reset_control(bool enable)
f
If a test fails or skips early, it may not clean up after itself. In
lieu of having a framework for test deconstructors, hook
igt_terminate_spin_batches() into exit_subtest() itself so that we don't
allow a recursive batch from an earlier test to leak into the next and
cause an unexpected GPU hang.
Many times an error may occur before the start of igt, leaving the
system in a less-than-optimal debugging state (e.g. an oops turning off
lockdep). Flag such occasions by checking /proc/sys/kernel/tainted.
Signed-off-by: Chris Wilson
---
tests/Makefile.sources | 1 +
tests/kernel_taint.c | 7
Just a small variant to apply a continuous context-switch load to all
engines.
---
tests/gem_ctx_switch.c | 80 ++
1 file changed, 80 insertions(+)
diff --git a/tests/gem_ctx_switch.c b/tests/gem_ctx_switch.c
index b6ea71cf..df22efec 100644
--- a/te
==24749== Syscall param ioctl(generic) points to uninitialised byte(s)
==24749==at 0x6A8ADC7: ioctl (syscall-template.S:84)
==24749==by 0x5067687: drmIoctl (in /opt/xorg/lib64/libdrm.so.2.4.0)
==24749==by 0x138531: kmstest_set_connector_dpms (igt_kms.c:1022)
==24749==by 0x112937: se
During the kms_flip test we repeat the test over a short period of time,
and the setup of each iteration should not itself be inducing a vblank
miss. Warn if we do encounter any missed vblanks during the event setup.
Signed-off-by: Chris Wilson
---
tests/kms_flip.c | 13 +
1 file cha
If we tell the machine to reset but they are disallowed, we will leave
the system in a wedged state, preventing the majority of subsequent
tests.
---
tests/drv_hangman.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/drv_hangman.c b/tests/drv_hangman.c
index 0551ec16..de57e128 100644
Due to premature patch pushing, lots of tests remain outstanding.
Signed-off-by: Chris Wilson
---
tests/gem_exec_fence.c | 331 +
1 file changed, 308 insertions(+), 23 deletions(-)
diff --git a/tests/gem_exec_fence.c b/tests/gem_exec_fence.c
index
Make sure that our buffers are ready and loaded to reduce the initial
stall.
---
tests/gem_ringfill.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/tests/gem_ringfill.c b/tests/gem_ringfill.c
index b52996a4..01cbd0a9 100644
--- a/tests/gem_ringfill.c
+++ b/tests/ge
gdb uses ptrace() to peek and poke bytes of the target's address space.
The kernel must implement an vm_ops->access() handler or else gdb will
be unable to inspect the pointer and report it as out-of-bounds. Worse
than useless as it causes immediate suspicion of the valid GTT pointer.
Signed-off-b
Ensure that we can suspend the GPU even if it is currently busy in an
indefinite loop, requiring us to declare the task hung.
---
tests/gem_exec_suspend.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/tests/gem_exec_suspend.c b/tests/gem_exec_suspend.c
index 763cb108..bc
The idea is to implement read(dmabuf) and write(dambuf) so provide some
tests.
Signed-off-by: Chris Wilson
---
tests/Makefile.sources | 1 +
tests/prime_rw.c | 179 +
2 files changed, 180 insertions(+)
create mode 100644 tests/prime_rw.c
Apply a little more stress to the scheduler.
---
lib/igt_rand.h| 6 +++
tests/gem_exec_schedule.c | 108 +-
2 files changed, 113 insertions(+), 1 deletion(-)
diff --git a/lib/igt_rand.h b/lib/igt_rand.h
index f664af41..c9cb3243 100644
---
We queue N low priority hanging batches across the engines
and check that out high priority write over takes them.
Signed-off-by: Chris Wilson
---
lib/igt_dummyload.c | 20 --
lib/igt_dummyload.h | 10 ++-
tests/gem_busy.c | 4 +-
tests/gem_exec_fence.c| 2 +-
Supplement dmesg with the function call graph to try and help identify
why the suspend failed. On the other hand, it may be very noisy and
perturb the system due to its overhead...
Signed-off-by: Chris Wilson
---
lib/igt_aux.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-
== Series Details ==
Series: igt/gem_exec_fence: Exercise syncobj API (The forgotten tests)
URL : https://patchwork.freedesktop.org/series/28763/
State : failure
== Summary ==
IGT patchset build failed on latest successful build
3685dabb0ab25eb1bc2df867f749701777153056 igt/gem_exec_fence: Exer
Due to premature patch pushing, lots of tests remain outstanding.
Signed-off-by: Chris Wilson
---
tests/gem_exec_fence.c | 331 +
1 file changed, 308 insertions(+), 23 deletions(-)
diff --git a/tests/gem_exec_fence.c b/tests/gem_exec_fence.c
index
intel_uncore_forcewake_reset() does forcewake puts and gets as such
we need to make sure that no-one tries to access the PUNIT->PMIC bus
(on systems where this bus is shared) while it runs, otherwise bad
things happen.
Normally this is taken care of by the i915_pmic_bus_access_notifier()
which doe
assert_rpm_wakelock_held is triggered from i915_pmic_bus_access_notifier
even though it gets unregistered on (runtime) suspend, this is caused
by a race happening under the following circumstances:
intel_runtime_pm_put does:
atomic_dec(&dev_priv->pm.wakeref_count);
pm_runtime_mark_last_bus
On 08/14/2017 07:40 AM, Daniel Vetter wrote:
On Thu, Aug 10, 2017 at 10:50:19AM -0700, clinton.a.tay...@intel.com wrote:
From: Clint Taylor
Current 50ms max threshold timing for an EDID read is very close to the
actual time for a 2 block HDMI EDID read. Adjust the timings base on
connector t
== Series Details ==
Series: drm/i915: Don't use MI_STORE_DWORD_IMM on Sandybridge/vcs
URL : https://patchwork.freedesktop.org/series/28754/
State : success
== Summary ==
Series 28754v1 drm/i915: Don't use MI_STORE_DWORD_IMM on Sandybridge/vcs
https://patchwork.freedesktop.org/api/1.0/series/2
== Series Details ==
Series: series starting with [1/2] drm/i915: Work around GCC anonymous union
initialization bug
URL : https://patchwork.freedesktop.org/series/28753/
State : failure
== Summary ==
Series 28753v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/
On Mon, Aug 14, 2017 at 5:30 PM, Jani Nikula
wrote:
> On Mon, 14 Aug 2017, Daniel Vetter wrote:
>> On Mon, Aug 14, 2017 at 11:43:34AM +0300, Jani Nikula wrote:
>>> On Fri, 11 Aug 2017, Clint Taylor wrote:
>>> > On 08/11/2017 12:49 AM, Lofstedt, Marta wrote:
>>> >> We can't have this lspcon as an
GCC 4.4 can't cope with anonymous union initializers which seems to be a
bug in that version (see the Reference) and is fixed since GCC version
4.6. A workaround which is also used elsewhere in the kernel for the
same purpose is to wrap the initialization in curly braces, so do the
same here.
Fixe
Future platforms increase the number of power wells which require
additional control registers. A convenient way to select the correct
register is to use the high bits of the power well ID as index. This
patch only prepares for this, while upcoming platform enabling patches
will add the actual new
Glad to see this happen. :)
After this patch landed, some code pieces in i915 which are specifically
for disabling dynamic PDP update via LRIs under 32 bit PPGTT could also
be removed.
For example, gen8_preallocate_top_level_pdp() in i915_gem_gtt.c
Thanks,
Zhi.
On 08/11/17 18:30, Chris Wils
On Mon, Aug 14, 2017 at 11:43:34AM +0300, Jani Nikula wrote:
> On Fri, 11 Aug 2017, Clint Taylor wrote:
> > On 08/11/2017 12:49 AM, Lofstedt, Marta wrote:
> >> We can't have this lspcon as an argument to the test, it will not work
> >> with automated testing using piglit as we do for CI.
> >> The
On 8/8/2017 1:08 AM, Daniel Vetter wrote:
There's no reason to entirely wedge the gpu, for the minimal deadlock
bugfix we only need to unbreak/decouple the atomic commit from the gpu
reset. The simplest way to fix that is by replacing the
unconditional fence wait a the top of commit_tail by a wai
On Mon, Aug 14, 2017 at 01:32:07PM +0300, Laurent Pinchart wrote:
> On Monday 14 Aug 2017 09:25:47 Daniel Vetter wrote:
> > On Sat, Aug 12, 2017 at 12:20 AM, Laurent Pinchart
> >
> > wrote:
> > > On Tuesday 25 Jul 2017 10:01:16 Daniel Vetter wrote:
> > >> diff --git a/drivers/gpu/drm/drm_mode_obj
On Mon, Aug 14, 2017 at 12:48:54PM +0300, Petri Latvala wrote:
> The series LGTM.
>
> Can you resend the whole series and slap a revert of
> 1385b31d9371fae02af2fd8adb0d9ea86a5bb0f2 at the end? With a pass of
> CI on such a bunch this series is
>
> Reviewed-by: Petri Latvala
>
Did a manual bu
== Series Details ==
Series: series starting with [1/4] lib: Add igt_can_fail()
URL : https://patchwork.freedesktop.org/series/28745/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
0c514b0cb876fb578afb2bb0297579bc896251d8 configure.ac: bump libdrm requireme
== Series Details ==
Series: tests/kms_frontbuffer_tracking: convert macros to functions (rev3)
URL : https://patchwork.freedesktop.org/series/28389/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
0c514b0cb876fb578afb2bb0297579bc896251d8 configure.ac: bump
On Fri, 2017-08-11 at 11:57 +0100, Chris Wilson wrote:
> The wait-ioctl is optionally supplied a timeout with nanosecond
> precision in a s64 field. We use nsecs_to_jiffies64() to convert that
> into the jiffies consumed by the scheduler, but internally
> nsecs_to_jiffies64() does not guard against
Quoting Zhenyu Wang (2017-08-14 08:41:38)
> From: Joonas Lahtinen
>
> Configurations like virtualized environments may support only 48 bit
> ppGTT without supporting 32 bit ppGTT. Support this by disconnecting
> the relationship of the two feature bits.
>
> Cc: Tina Zhang
> Cc: Chris Wilson
>
Quoting Zhi Wang (2017-08-14 13:04:34)
> [ BACKGROUND ]
>
> Due to different guests will have different PPAT configuration under
> virtualization environment, for example, Windows guest vs Linux guest, a
> possible idea to handle this open is
>
> 1)Letting host have the PPAT entries needed by g
On Monday 14 Aug 2017 09:25:47 Daniel Vetter wrote:
> On Sat, Aug 12, 2017 at 12:20 AM, Laurent Pinchart
>
> wrote:
> > On Tuesday 25 Jul 2017 10:01:16 Daniel Vetter wrote:
> >> diff --git a/drivers/gpu/drm/drm_mode_object.c
> >> b/drivers/gpu/drm/drm_mode_object.c index da9a9adbcc98..92743a796bf
== Series Details ==
Series: drm/atomic: Handle -EDEADLK with out-fences correctly
URL : https://patchwork.freedesktop.org/series/28747/
State : success
== Summary ==
Series 28747v1 drm/atomic: Handle -EDEADLK with out-fences correctly
https://patchwork.freedesktop.org/api/1.0/series/28747/rev
> -Original Message-
> From: Zhenyu Wang [mailto:zhen...@linux.intel.com]
> Sent: Monday, August 14, 2017 6:12 PM
> To: Zhang, Tina
> Cc: intel-gfx@lists.freedesktop.org; Joonas Lahtinen
> ; intel-gvt-...@lists.freedesktop.org
> Subject: Re: [PATCH v10 0/3] vGPU full 48bit ppgtt support
On 2017.08.14 10:09:38 +, Zhang, Tina wrote:
> > Just refresh against Joonas's disconnect 32/48bit ppgtt support patch and
> > give
> > full view on this series. If ok, I'll include them for gvt-next pull.
> Thanks Zhenyu. Looks like one patch is missing:
> https://lists.freedesktop.org/archiv
> -Original Message-
> From: intel-gvt-dev [mailto:intel-gvt-dev-boun...@lists.freedesktop.org] On
> Behalf Of Zhenyu Wang
> Sent: Monday, August 14, 2017 3:42 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Joonas Lahtinen ; intel-gvt-
> d...@lists.freedesktop.org
> Subject: [PATCH v10 0/
Chris Wilson writes:
> Quoting Mika Kuoppala (2017-08-10 12:04:51)
>> Update gen9 renderstate to account the, long overdue, changes for
>> igt commit 5c07135b7bd2 ("tools/null_state/gen9: Send all
>> components in VF state").
>>
>> Signed-off-by: Mika Kuoppala
>
> Does what it says on the tin,
for_each_pipe cannot be used for enumerating testcases, so provide
something that can.
Signed-off-by: Daniel Vetter
---
lib/igt_kms.h | 16
tests/kms_busy.c| 3 ++-
tests/kms_concurrent.c | 3 ++-
tests/kms_cursor_legacy.c | 3 ++-
tests/kms_p
- We can't enumerate planes, push that into the subtest.
- pipe enumeration needs to use for_each_pipe_static.
This fells our CI since the test enumeration/sharding happens on the build
server, which has no gfx nor does the job run as root ...
Cc: Daniel Stone
Cc: Jason Ekstrand
Signed-off-by:
Useful to make sure folks use library helpers correctly.
Signed-off-by: Daniel Vetter
---
lib/igt_core.c | 20 +--
lib/igt_core.h | 2 ++
lib/tests/.gitignore| 2 ++
lib/tests/Makefile.sources | 2 ++
lib/tests/igt_can_fail.c
== Series Details ==
Series: tests/kms_frontbuffer_tracking: convert macros to functions (rev2)
URL : https://patchwork.freedesktop.org/series/28389/
State : failure
== Summary ==
IGT patchset build failed on latest successful build
1385b31d9371fae02af2fd8adb0d9ea86a5bb0f2 tests/igt_command_li
Macros that should be C functions but aren't are really hard to
read and confusing. Convert them over.
v2: Clean up commit message and keep printing the line numbers (Paulo).
v3: Actually git add (silly me).
Cc: Paulo Zanoni
Signed-off-by: Daniel Vetter
---
tests/kms_frontbuffer_tracking.c |
Macros that should be C functions but aren't are really hard to
read and confusing. Convert them over.
v2: Clean up commit message and keep printing the line numbers (Paulo).
Cc: Paulo Zanoni
Signed-off-by: Daniel Vetter
---
tests/kms_frontbuffer_tracking.c | 166 --
On Fri, 11 Aug 2017, Rodrigo Vivi wrote:
> Reviewed-by: Rodrigo Vivi
Thanks, pushed the lot.
BR,
Jani.
>
> On Fri, Aug 11, 2017 at 06:03:22PM +0300, Jani Nikula wrote:
>> Reported by 'make mancheck'.
>>
>> Signed-off-by: Jani Nikula
>> ---
>> dim.rst | 4
>> 1 file changed, 4 insertion
On Fri, 11 Aug 2017, Clint Taylor wrote:
> On 08/11/2017 12:49 AM, Lofstedt, Marta wrote:
>> We can't have this lspcon as an argument to the test, it will not work with
>> automated testing using piglit as we do for CI.
>> Theoretically we could add a "has_lspcon" to debugfs, but I believe that
== Series Details ==
Series: vGPU full 48bit ppgtt support
URL : https://patchwork.freedesktop.org/series/28741/
State : success
== Summary ==
Series 28741v1 vGPU full 48bit ppgtt support
https://patchwork.freedesktop.org/api/1.0/series/28741/revisions/1/mbox/
Test kms_cursor_legacy:
Just refresh against Joonas's disconnect 32/48bit ppgtt support patch
and give full view on this series. If ok, I'll include them for gvt-next
pull.
Thanks
Joonas Lahtinen (1):
drm/i915: Disconnect 32 and 48 bit ppGTT support
Tina Zhang (2):
drm/i915: Enable guest i915 full ppgtt functionali
From: Tina Zhang
Guest i915 full ppgtt functionality was blocking by an issue, which would
lead to gpu hardware hang. Guest i915 driver may update the ppgtt table
just before this workload is going to be submitted to the hardware by
device model. This case wasn't handled well by device model befo
From: Joonas Lahtinen
Configurations like virtualized environments may support only 48 bit
ppGTT without supporting 32 bit ppGTT. Support this by disconnecting
the relationship of the two feature bits.
Cc: Tina Zhang
Cc: Chris Wilson
Cc: Zhi Wang
Signed-off-by: Joonas Lahtinen
---
drivers/g
On Sat, Aug 12, 2017 at 12:20 AM, Laurent Pinchart
wrote:
> On Tuesday 25 Jul 2017 10:01:16 Daniel Vetter wrote:
>> diff --git a/drivers/gpu/drm/drm_mode_object.c
>> b/drivers/gpu/drm/drm_mode_object.c index da9a9adbcc98..92743a796bf0 100644
>> --- a/drivers/gpu/drm/drm_mode_object.c
>> +++ b/driv
Thanks! LGTM. :)
-Original Message-
From: Zhenyu Wang [mailto:zhen...@linux.intel.com]
Sent: Monday, August 14, 2017 3:01 PM
To: Wang, Zhi A
Cc: Joonas Lahtinen ; Intel graphics driver
community testing & development
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Disconnect 32 and 48 bit p
On 2017.08.14 20:34:48 +0800, Zhi Wang wrote:
> Looks has_full_48bit_ppgtt is tied to has_full_ppgtt now. Will that be
> disconnected also in future?
>
That's what this is for. So for gvt, we just set has_full_48bit_ppgtt but
not has_full_ppgtt.
> On 08/11/17 17:51, Joonas Lahtinen wrote:
> > Con
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