[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm: Fix example comment of format modifier blob

2017-08-31 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm: Fix example comment of format modifier blob URL : https://patchwork.freedesktop.org/series/29627/ State : success == Summary == shard-hswtotal:2265 pass:1232 dwarn:0 dfail:0 fail:17 skip:1016 time:9651s == Logs == Fo

[Intel-gfx] [PATCH] drm/i915/cnl: Add support slice/subslice/eu configs

2017-08-31 Thread Rodrigo Vivi
From: Ben Widawsky Cannonlake Slice and Subslice information has changed. This Patch provided by Ben adds the proper sseu initialization. v2: This v2 done by Rodrigo includes: - Fix on Total slices count by avoiding [1][2] and [2][2]. - Inclusion of EU Per Subslice. - Commit message.

Re: [Intel-gfx] [PATCH 00/12] drm/i915: Fix up the CCS code

2017-08-31 Thread Rodrigo Vivi
Hi Ville, On Wed, Aug 30, 2017 at 10:09 AM, Ville Syrjälä wrote: > On Wed, Aug 30, 2017 at 11:31:16AM +0300, Jani Nikula wrote: >> On Mon, 28 Aug 2017, Ville Syrjälä wrote: >> > On Mon, Aug 28, 2017 at 02:35:54PM +0100, Daniel Stone wrote: >> >> Hi Daniel, >> >> >> >> On 25 August 2017 at 18:17,

Re: [Intel-gfx] [PATCH] drm/i915/cnl: Add support slice/subslice/eu configs

2017-08-31 Thread Rodrigo Vivi
quick extra note on this: with this the SSEU Device Info is right and matching spec.. But SSEU Device Status needs a rework that I will do in a follow-up patch: CNL-Y (2x8): SSEU Device Info Available Slice Mask: 0001 Available Slice Total: 1 Available Subslice Total: 2 Available Subslice

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: Add support slice/subslice/eu configs

2017-08-31 Thread Patchwork
== Series Details == Series: drm/i915/cnl: Add support slice/subslice/eu configs URL : https://patchwork.freedesktop.org/series/29644/ State : success == Summary == Series 29644v1 drm/i915/cnl: Add support slice/subslice/eu configs https://patchwork.freedesktop.org/api/1.0/series/29644/revisio

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Disable DRRS when PSR is enabled (rev2)

2017-08-31 Thread Patchwork
== Series Details == Series: drm/i915: Disable DRRS when PSR is enabled (rev2) URL : https://patchwork.freedesktop.org/series/29577/ State : warning == Summary == Test kms_setmode: Subgroup basic: fail -> PASS (shard-hsw) fdo#99912 Test perf: Subgrou

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: implement NOA mux reprogramming at ctx-switch (rev2)

2017-08-31 Thread Patchwork
== Series Details == Series: drm/i915: implement NOA mux reprogramming at ctx-switch (rev2) URL : https://patchwork.freedesktop.org/series/29564/ State : success == Summary == Test perf: Subgroup polling: fail -> PASS (shard-hsw) fdo#102252 Test kms_setmode:

[Intel-gfx] ✓ Fi.CI.IGT: success for tests/gem_flink_basic: Add documentation for subtests (rev2)

2017-08-31 Thread Patchwork
== Series Details == Series: tests/gem_flink_basic: Add documentation for subtests (rev2) URL : https://patchwork.freedesktop.org/series/29499/ State : success == Summary == Test perf: Subgroup polling: fail -> PASS (shard-hsw) fdo#102252 fdo#102252 https:/

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/cnl: Add support slice/subslice/eu configs

2017-08-31 Thread Patchwork
== Series Details == Series: drm/i915/cnl: Add support slice/subslice/eu configs URL : https://patchwork.freedesktop.org/series/29644/ State : success == Summary == shard-hswtotal:2265 pass:1232 dwarn:0 dfail:0 fail:17 skip:1016 time:9591s == Logs == For more details see: http

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Fail addfb ioctl if color and CCS buffers overlap

2017-08-31 Thread Gabriel Krisman Bertazi
Ben Widawsky writes: > On 17-08-31 16:52:15, Gabriel Krisman Bertazi wrote: >>With this patch the new testcase igt@kms_ccs@pipe-X-invalid-ccs-offset >>succeeds. >> >>Signed-off-by: Gabriel Krisman Bertazi >>--- >> drivers/gpu/drm/i915/intel_display.c | 5 + >> 1 file changed, 5 insertions(+)

Re: [Intel-gfx] [PATCH 4/7] drm/i915: Pass proper old/new states to intel_plane_atomic_check_with_state()

2017-08-31 Thread Maarten Lankhorst
Op 31-08-17 om 20:50 schreef Ville Syrjälä: > On Wed, Aug 23, 2017 at 06:22:23PM +0300, ville.syrj...@linux.intel.com wrote: >> From: Ville Syrjälä >> >> Eliminate plane->state and crtc->state usage from >> intel_plane_atomic_check_with_state() and its callers. Instead pass the >> proper states in

[Intel-gfx] [PATCH 3/4] drm/i915/guc: Fix GuC HW/SW state cleanup in unload path

2017-08-31 Thread Sagar Arun Kamble
Teardown of GuC HW/SW state was not properly done in unload path. During unload, we can rely on intel_guc_reset_prepare being done as part of i915_gem_suspend for disabling GuC interfaces. We will have to disable GuC submission prior to suspend as that involves communication with GuC to destroy doo

[Intel-gfx] [PATCH 0/4] GuC Fixes and change for v9+ Firmwares

2017-08-31 Thread Sagar Arun Kamble
This series fixes bugs in suspend/unload/reset path with GuC enabled. With v9+ firmware new type of fast (Default/Critical) logging is to be enabled by default. A patch enables that logging by default. Once GuC v9+ firmwares are posted to 01.org, change to update the default firmware version and if

[Intel-gfx] [PATCH 2/4] drm/i915/guc: Fix GuC interaction in reset/suspend scenarios

2017-08-31 Thread Sagar Arun Kamble
Tearing down of guc_ggtt_invalidate/guc_interrupts/guc_communication setup should happen towards end of reset/suspend as these are setup back again during recovery/resume. Prepared helpers intel_guc_pause and intel_guc_unpause that will do teardown/bringup of this setup along with suspension/resum

[Intel-gfx] [PATCH 1/4] drm/i915: Separate GuC/HuC specific functionality from intel_uc

2017-08-31 Thread Sagar Arun Kamble
Removed unnecessary intel_uc.h includes as it is present in i915_drv.h. Created intel_guc.c and intel_guc.h for placing GuC specific code. Created intel_huc.h to refer to HuC specific functions. v2: Prepared intel_uc_common.h. huc_auth code declaration adjusted. Moved enable/disable_communication

[Intel-gfx] [PATCH 4/4] drm/i915/guc: Enable default/critical logging in GuC by default from GuC v9

2017-08-31 Thread Sagar Arun Kamble
With GuC v9, new type of Default/critical logging in GuC to enable capturing minimal important logs in production systems efficiently. This patch enables this logging in GuC by default always. It should be noted that streaming support with half-full interrupt mechanism that is present for normal lo

[Intel-gfx] ✓ Fi.CI.BAT: success for GuC Fixes and change for v9+ Firmwares

2017-08-31 Thread Patchwork
== Series Details == Series: GuC Fixes and change for v9+ Firmwares URL : https://patchwork.freedesktop.org/series/29651/ State : success == Summary == Series 29651v1 GuC Fixes and change for v9+ Firmwares https://patchwork.freedesktop.org/api/1.0/series/29651/revisions/1/mbox/ Test kms_curso

[Intel-gfx] ✗ Fi.CI.IGT: failure for GuC Fixes and change for v9+ Firmwares

2017-08-31 Thread Patchwork
== Series Details == Series: GuC Fixes and change for v9+ Firmwares URL : https://patchwork.freedesktop.org/series/29651/ State : failure == Summary == Test perf: Subgroup polling: fail -> PASS (shard-hsw) fdo#102252 +1 Subgroup oa-formats:

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