Re: [Intel-gfx] [PATCH 1/4] drm/i915: Fix the missing PPAT cache attributes on CNL

2017-09-01 Thread Wang, Zhi A
Thanks for merging the patch and test. :) -Original Message- From: Rodrigo Vivi [mailto:rodrigo.v...@gmail.com] Sent: Saturday, September 2, 2017 3:01 AM To: Wang, Zhi A Cc: intel-gfx ; intel-gvt-...@lists.freedesktop.org; Vivi, Rodrigo ; Widawsky, Benjamin Subject: Re: [Intel-gfx] [P

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Wake up the device for the fbdev setup

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Wake up the device for the fbdev setup URL : https://patchwork.freedesktop.org/series/29726/ State : success == Summary == shard-hswtotal:2263 pass:1231 dwarn:0 dfail:0 fail:16 skip:1015 time:9411s == Logs == For more details see: https:/

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Add __rcu to radix tree slot pointer

2017-09-01 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Add __rcu to radix tree slot pointer URL : https://patchwork.freedesktop.org/series/29716/ State : success == Summary == shard-hswtotal:2263 pass:1232 dwarn:0 dfail:0 fail:15 skip:1015 time:9492s == Logs == For

[Intel-gfx] ✓ Fi.CI.BAT: success for tests/perf_pmu: test i915 RFC PMU (rev4)

2017-09-01 Thread Patchwork
== Series Details == Series: tests/perf_pmu: test i915 RFC PMU (rev4) URL : https://patchwork.freedesktop.org/series/29313/ State : success == Summary == IGT patchset tested on top of latest successful build 5ce65a9a51f17e0183e3e4f8943981ee7b96cadd pm_rps: Changes in waitboost scenario with l

[Intel-gfx] [RFC v4 2/5] drm/i915/pmu: serve global events and support perf stat

2017-09-01 Thread Dmitry Rogozhkin
This patch should probably be squashed with Tvrtko's PMU enabling patch... Making perf-stat workable with i915 PMU. The major point is that current implementation of i915 PMU exposes global counter rather thatn per-task counters. Thus, required changes are: * Register PMU with .task_ctx_nr=perf_in

[Intel-gfx] [RFC v4 5/5] drm/i915/pmu: deny perf driver level sampling of i915 PMU

2017-09-01 Thread Dmitry Rogozhkin
This patch should probably be squashed with Tvrtko's PMU enabling patch... As per discussion with Peter, i915 PMU is an example of uncore PMU which are prohibited to support perf driver level sampling. This patch removes hrtimer which we expose to perf core and denies events creation with non-zero

[Intel-gfx] [RFC v4 0/5] Support perf stat with i915 PMU

2017-09-01 Thread Dmitry Rogozhkin
These patches depend on the RFC patches enabling i915 PMU from Tvrtko: https://patchwork.freedesktop.org/series/27488/ Thus, CI failure to build them is expected. I think that my patches should be squeashed in Tvrtko's one actually. The first patch simply reorders functions and does nothing comp

[Intel-gfx] [RFC v4 4/5] drm/i915/pmu: introduce refcounting of event subscriptions

2017-09-01 Thread Dmitry Rogozhkin
As 'enable' i915 PMU IGT test will show, current PMU implementation does not properly handle multiple parallel consumers. This patch introduces refcounting of event subscriptions meaning that even if one consumer will disable its event PMU event mask will not fly away if there are other subscribers

[Intel-gfx] [RFC v4 3/5] drm/i915/pmu: introduce i915_pmu_enable_info debugfs entry

2017-09-01 Thread Dmitry Rogozhkin
With the exposure of i915 PMU event enabling mask we will be able to implement IGT tests to see whether we properly handle events enabling/disabling on multiple parallel consumers. Change-Id: I3561e48cd27bc2a19424cf7b6949fadb2a77ab20 Signed-off-by: Dmitry Rogozhkin Cc: Tvrtko Ursulin --- driver

[Intel-gfx] [RFC v4 1/5] drm/i915/pmu: reorder function to suite next patch

2017-09-01 Thread Dmitry Rogozhkin
This patch is doing nover except reordering functions to highlight changes in the next patch. Change-Id: I0cd298780503ae8f6f8035b86c59fc8b5191356b Signed-off-by: Dmitry Rogozhkin Cc: Tvrtko Ursulin Cc: Peter Zijlstra --- drivers/gpu/drm/i915/i915_pmu.c | 180 ---

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Fix the missing PPAT cache attributes on CNL

2017-09-01 Thread Rodrigo Vivi
On Thu, Aug 31, 2017 at 12:36 PM, Zhi Wang wrote: > Add back the GEN8_PPAT_WB cache attributes in cnl_setup_private_ppat(), > which are missed on CNL. > > Fixes: e34935 ("drm/i915/cnl: Setup PAT Index") missing some numbers Fixes: 4e34935fcf69 ("drm/i915/cnl: Setup PAT Index.") > Cc: Ben W

[Intel-gfx] [RFC i-g-t v2] tests/perf_pmu: test i915 RFC PMU

2017-09-01 Thread Dmitry Rogozhkin
i915 RFC PMU: * https://patchwork.freedesktop.org/series/27488/ * https://patchwork.freedesktop.org/series/28842/ Tests: * init: try to initialize all possible metrics exposed in i915 PMU (limit to 0-instance of engines) * invalid_init: verify that i915 PMU correctly error out on invalid initi

[Intel-gfx] [RFC i-g-t v1] tests/perf_pmu: test i915 RFC PMU

2017-09-01 Thread Dmitry Rogozhkin
i915 RFC PMU: * https://patchwork.freedesktop.org/series/27488/ * https://patchwork.freedesktop.org/series/28842/ Tests: * init: try to initialize all possible metrics exposed in i915 PMU (limit to 0-instance of engines) * invalid_init: verify that i915 PMU correctly error out on invalid initi

[Intel-gfx] [RFC v4 2/5] drm/i915/pmu: serve global events and support perf stat

2017-09-01 Thread Dmitry Rogozhkin
This patch should probably be squashed with Tvrtko's PMU enabling patch... Making perf-stat workable with i915 PMU. The major point is that current implementation of i915 PMU exposes global counter rather thatn per-task counters. Thus, required changes are: * Register PMU with .task_ctx_nr=perf_in

[Intel-gfx] [RFC v4 5/5] drm/i915/pmu: deny perf driver level sampling of i915 PMU

2017-09-01 Thread Dmitry Rogozhkin
This patch should probably be squashed with Tvrtko's PMU enabling patch... As per discussion with Peter, i915 PMU is an example of uncore PMU which are prohibited to support perf driver level sampling. This patch removes hrtimer which we expose to perf core and denies events creation with non-zero

[Intel-gfx] [RFC v4 0/5] Support perf stat with i915 PMU

2017-09-01 Thread Dmitry Rogozhkin
These patches depend on the RFC patches enabling i915 PMU from Tvrtko: https://patchwork.freedesktop.org/series/27488/ Thus, CI failure to build them is expected. I think that my patches should be squeashed in Tvrtko's one actually. The first patch simply reorders functions and does nothing comp

[Intel-gfx] [RFC v4 3/5] drm/i915/pmu: introduce i915_pmu_enable_info debugfs entry

2017-09-01 Thread Dmitry Rogozhkin
With the exposure of i915 PMU event enabling mask we will be able to implement IGT tests to see whether we properly handle events enabling/disabling on multiple parallel consumers. Change-Id: I3561e48cd27bc2a19424cf7b6949fadb2a77ab20 Signed-off-by: Dmitry Rogozhkin Cc: Tvrtko Ursulin --- driver

[Intel-gfx] [RFC v4 1/5] drm/i915/pmu: reorder function to suite next patch

2017-09-01 Thread Dmitry Rogozhkin
This patch is doing nover except reordering functions to highlight changes in the next patch. Change-Id: I0cd298780503ae8f6f8035b86c59fc8b5191356b Signed-off-by: Dmitry Rogozhkin Cc: Tvrtko Ursulin Cc: Peter Zijlstra --- drivers/gpu/drm/i915/i915_pmu.c | 180 ---

[Intel-gfx] [RFC v4 4/5] drm/i915/pmu: introduce refcounting of event subscriptions

2017-09-01 Thread Dmitry Rogozhkin
As 'enable' i915 PMU IGT test will show, current PMU implementation does not properly handle multiple parallel consumers. This patch introduces refcounting of event subscriptions meaning that even if one consumer will disable its event PMU event mask will not fly away if there are other subscribers

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: enable userspace to program slice/subslice programming

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: enable userspace to program slice/subslice programming URL : https://patchwork.freedesktop.org/series/29715/ State : failure == Summary == Test perf: Subgroup blocking: fail -> PASS (shard-hsw) fdo#102252 Test gem_ctx_p

Re: [Intel-gfx] [PATCH] drm/i915/cnl: WaFbcSkipSegments

2017-09-01 Thread Rodrigo Vivi
On Fri, Sep 1, 2017 at 2:04 PM, Paulo Zanoni wrote: > Em Ter, 2017-08-29 às 16:08 -0700, Rodrigo Vivi escreveu: >> Skip compressing 1 segment at the end of the frame, >> avoid a pixel count mismatch nuke event when last active >> pixel and dummy pixel has same color for Odd Plane >> Width / Height

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Annotate user relocs with __user

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Annotate user relocs with __user URL : https://patchwork.freedesktop.org/series/29713/ State : success == Summary == Test perf: Subgroup polling: pass -> FAIL (shard-hsw) fdo#102252 fdo#102252 https://bugs.freedesktop.

Re: [Intel-gfx] [PATCH] drm/i915/cnl: WaFbcSkipSegments

2017-09-01 Thread Paulo Zanoni
Em Ter, 2017-08-29 às 16:08 -0700, Rodrigo Vivi escreveu: > Skip compressing 1 segment at the end of the frame, > avoid a pixel count mismatch nuke event when last active > pixel and dummy pixel has same color for Odd Plane > Width / Height. > > Cc: Paulo Zanoni > Signed-off-by: Rodrigo Vivi > -

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Wake up the device for the fbdev setup

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Wake up the device for the fbdev setup URL : https://patchwork.freedesktop.org/series/29726/ State : success == Summary == Series 29726v1 drm/i915: Wake up the device for the fbdev setup https://patchwork.freedesktop.org/api/1.0/series/29726/revisions/1/m

[Intel-gfx] [PATCH] drm/i915: Wake up the device for the fbdev setup

2017-09-01 Thread ville . syrjala
From: Ville Syrjälä Our fbdev setup requires the device to be awake for access through the GTT. If one boots without connected displays and later plugs one in, we won't have any runtime PM references when the fbdev setup runs. Explicitly grab a runtime PM reference during the fbdev setup to avoid

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Try harder to finish the idle-worker

2017-09-01 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Try harder to finish the idle-worker URL : https://patchwork.freedesktop.org/series/29708/ State : success == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL (shard-hsw) fdo#99912 T

Re: [Intel-gfx] [PATCH i-g-t] tests/kms_frontbuffer_tracking: convert macros to functions

2017-09-01 Thread Paulo Zanoni
Em Seg, 2017-08-14 às 11:25 +0200, Daniel Vetter escreveu: > Macros that should be C functions but aren't are really hard to > read and confusing. Convert them over. > > v2: Clean up commit message and keep printing the line numbers > (Paulo). > > v3: Actually git add (silly me). > > Cc: Paulo Z

Re: [Intel-gfx] [PATCH i-g-t v2] tests/kms_frontbuffer_tracking: increase FBC wait timeout to 5s

2017-09-01 Thread Paulo Zanoni
Em Sex, 2017-08-25 às 14:11 +0100, Chris Wilson escreveu: > Quoting Lofstedt, Marta (2017-08-25 13:50:16) > > > > > > > -Original Message- > > > From: Lofstedt, Marta > > > Sent: Friday, August 25, 2017 2:54 PM > > > To: 'Chris Wilson' ; intel-...@lists.fr > > > eedesktop.org > > > Subjec

Re: [Intel-gfx] [RFC PATCH 4/4] drm/i915: Expose RPCS (SSEU) configuration to userspace

2017-09-01 Thread Chris Wilson
Quoting Lionel Landwerlin (2017-09-01 18:12:30) > From: Chris Wilson > > We want to allow userspace to reconfigure the subslice configuration for > its own use case. To do so, we expose a context parameter to allow > adjustment of the RPCS register stored within the context image (and > currently

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/syncobj: Mark up the fence as an RCU protected pointer

2017-09-01 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/syncobj: Mark up the fence as an RCU protected pointer URL : https://patchwork.freedesktop.org/series/29700/ State : success == Summary == Test perf: Subgroup polling: fail -> PASS (shard-hsw) fdo#

Re: [Intel-gfx] [PATCH 2/2] drm/i915: io unmap functions want __iomem

2017-09-01 Thread Chris Wilson
Quoting ville.syrj...@linux.intel.com (2017-09-01 18:12:52) > From: Ville Syrjälä > > Don't cast away the __iomem from the io_mapping functions so that > sparse won't be so unhappy when we pass the pointer to the unmap > functions. Instead let's move the cast to where we actually use the > pointe

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Add __rcu to radix tree slot pointer

2017-09-01 Thread Chris Wilson
Quoting ville.syrj...@linux.intel.com (2017-09-01 18:12:51) > From: Ville Syrjälä > > radix_tree_for_each_slot() wants an __rcu annotated pointer for the > slot. So let's add the annotation. > > Fixes the following sparse warnings: > i915_gem.c:2217:9: warning: incorrect type in assignment (diff

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Add __rcu to radix tree slot pointer

2017-09-01 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Add __rcu to radix tree slot pointer URL : https://patchwork.freedesktop.org/series/29716/ State : success == Summary == Series 29716v1 series starting with [1/2] drm/i915: Add __rcu to radix tree slot pointer https://patchwor

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Make i9xx_load_ycbcr_conversion_matrix() static

2017-09-01 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Make i9xx_load_ycbcr_conversion_matrix() static URL : https://patchwork.freedesktop.org/series/29694/ State : success == Summary == Test kms_atomic_transition: Subgroup plane-use-after-nonblocking-unbind:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: enable userspace to program slice/subslice programming

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: enable userspace to program slice/subslice programming URL : https://patchwork.freedesktop.org/series/29715/ State : success == Summary == Series 29715v1 drm/i915: enable userspace to program slice/subslice programming https://patchwork.freedesktop.org/ap

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Annotate user relocs with __user

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Annotate user relocs with __user URL : https://patchwork.freedesktop.org/series/29713/ State : success == Summary == Series 29713v1 drm/i915: Annotate user relocs with __user https://patchwork.freedesktop.org/api/1.0/series/29713/revisions/1/mbox/ Test k

[Intel-gfx] [PATCH i-g-t] tests: add slice power programming test

2017-09-01 Thread Lionel Landwerlin
Verifies that the kernel programs slices correctly by reading the value of PWR_CLK_STATE register. Signed-off-by: Lionel Landwerlin --- tests/Makefile.sources | 1 + tests/ctx_rpcs.c | 235 + 2 files changed, 236 insertions(+) create mode

[Intel-gfx] [PATCH 2/2] drm/i915: io unmap functions want __iomem

2017-09-01 Thread ville . syrjala
From: Ville Syrjälä Don't cast away the __iomem from the io_mapping functions so that sparse won't be so unhappy when we pass the pointer to the unmap functions. Instead let's move the cast to where we actually use the pointer. Fixes the following sparse warnings: i915_gem.c:1022:33: warning: in

[Intel-gfx] [PATCH 1/2] drm/i915: Add __rcu to radix tree slot pointer

2017-09-01 Thread ville . syrjala
From: Ville Syrjälä radix_tree_for_each_slot() wants an __rcu annotated pointer for the slot. So let's add the annotation. Fixes the following sparse warnings: i915_gem.c:2217:9: warning: incorrect type in assignment (different address spaces) i915_gem.c:2217:9:expected void **slot i915_gem

[Intel-gfx] [RFC PATCH 3/4] drm/i915: Record the sseu configuration per-context & engine

2017-09-01 Thread Lionel Landwerlin
From: Chris Wilson We want to expose the ability to reconfigure the slices, subslice and eu per context and per engine. To facilitate that, store the current configuration on the context for each engine, which is initially set to the device default upon creation. v2: record sseu configuration pe

[Intel-gfx] [RFC PATCH 0/4] drm/i915: enable userspace to program slice/subslice programming

2017-09-01 Thread Lionel Landwerlin
Hi all, This is a respin of a series from Chris. Actually got around testing it a bit. The main reason for this feature is to allow media workloads to tweak the number of slices powered on. It seems to have significant performance gains. Cheers, Chris Wilson (4): drm/i915: Record both min/max

[Intel-gfx] [RFC PATCH 1/4] drm/i915: Record both min/max eu_per_subslice in sseu_dev_info

2017-09-01 Thread Lionel Landwerlin
From: Chris Wilson When we query the available eu on each subslice, we currently only report the max. It would also be useful to report the minimum found as well. When we set RPCS (power gating over the EU), we can also specify both the min and max number of eu to configure on each slice; curren

[Intel-gfx] [RFC PATCH 4/4] drm/i915: Expose RPCS (SSEU) configuration to userspace

2017-09-01 Thread Lionel Landwerlin
From: Chris Wilson We want to allow userspace to reconfigure the subslice configuration for its own use case. To do so, we expose a context parameter to allow adjustment of the RPCS register stored within the context image (and currently not accessible via LRI). If the context is adjusted before

[Intel-gfx] [RFC PATCH 2/4] drm/i915: Program RPCS for Broadwell

2017-09-01 Thread Lionel Landwerlin
From: Chris Wilson Currently we only configure the power gating for Skylake and above, but the configuration should equally apply to Broadwell and Braswell. Even though, there is not as much variation as for later generations, we want to expose control over the configuration to userspace and may

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Speed up DMC firmware loading

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Speed up DMC firmware loading URL : https://patchwork.freedesktop.org/series/29688/ State : warning == Summary == Test perf: Subgroup blocking: fail -> PASS (shard-hsw) fdo#102252 Test kms_busy: Subgroup extende

[Intel-gfx] [PATCH] drm/i915: Annotate user relocs with __user

2017-09-01 Thread ville . syrjala
From: Ville Syrjälä Add the missing __user to the urelocs cast to fix the following sparse warning: i915_gem_execbuffer.c:1541:47: warning: cast removes address space of expression i915_gem_execbuffer.c:1541:62: warning: incorrect type in argument 2 (different address spaces) i915_gem_execbuffer

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Make i9xx_load_ycbcr_conversion_matrix() static

2017-09-01 Thread Ville Syrjälä
On Fri, Sep 01, 2017 at 03:37:31PM +0100, Chris Wilson wrote: > Quoting ville.syrj...@linux.intel.com (2017-09-01 15:31:21) > > From: Ville Syrjälä > > > > Make i9xx_load_ycbcr_conversion_matrix() static to appease sparse: > > intel_color.c:110:6: warning: symbol 'i9xx_load_ycbcr_conversion_matri

Re: [Intel-gfx] [PATCH 1/2] drm/syncobj: Mark up the fence as an RCU protected pointer

2017-09-01 Thread Ville Syrjälä
On Fri, Sep 01, 2017 at 03:57:06PM +0100, Chris Wilson wrote: > We take advantage of that syncobj->fence is an RCU-protected pointer, and > so sparse complains that it is lacking annotation. > > Signed-off-by: Chris Wilson > --- > include/drm/drm_syncobj.h | 2 +- > 1 file changed, 1 insertion(+

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Try harder to finish the idle-worker

2017-09-01 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Try harder to finish the idle-worker URL : https://patchwork.freedesktop.org/series/29708/ State : success == Summary == Series 29708v1 series starting with [1/2] drm/i915: Try harder to finish the idle-worker https://patchwor

[Intel-gfx] [PATCH 2/2] drm/i915: Keep the device awake whilst in the GTT domain

2017-09-01 Thread Chris Wilson
Since runtime suspend is very harsh on GTT mmappings (they all get zapped on suspend) keep the device awake while the buffer remains in the GTT domain. However, userspace can control the domain and although there is a soft contract that writes must be flushed (for e.g. flushing scanouts and fbc), w

[Intel-gfx] [PATCH 1/2] drm/i915: Try harder to finish the idle-worker

2017-09-01 Thread Chris Wilson
If a worker requeues itself, it may switch to a different kworker pool, which flush_work() considers as complete. To be strict, we then need to keep flushing the work until it is no longer pending. References: https://bugs.freedesktop.org/show_bug.cgi?id=102456 Signed-off-by: Chris Wilson Cc: Mik

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Silence sparse by using gfp_t

2017-09-01 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Silence sparse by using gfp_t URL : https://patchwork.freedesktop.org/series/29702/ State : failure == Summary == Series 29702v1 series starting with [1/2] drm/i915: Silence sparse by using gfp_t https://patchwork.freedesktop.o

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/syncobj: Mark up the fence as an RCU protected pointer

2017-09-01 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/syncobj: Mark up the fence as an RCU protected pointer URL : https://patchwork.freedesktop.org/series/29700/ State : success == Summary == Series 29700v1 series starting with [1/2] drm/syncobj: Mark up the fence as an RCU protected

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Silence sparse by using gfp_t

2017-09-01 Thread Ville Syrjälä
On Fri, Sep 01, 2017 at 03:57:28PM +0100, Chris Wilson wrote: > Sparse enforces that GFP flags are only manipulated inside gfp_t locals. > > Fixes: 4d470f7359c4 ("drm/i915: Avoid undefined behaviour of "u32 >> 32"") > Signed-off-by: Chris Wilson > Cc: Joonas Lahtinen > Cc: Tvrtko Ursulin Revie

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Make i9xx_load_ycbcr_conversion_matrix() static

2017-09-01 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Make i9xx_load_ycbcr_conversion_matrix() static URL : https://patchwork.freedesktop.org/series/29694/ State : success == Summary == Series 29694v1 series starting with [1/3] drm/i915: Make i9xx_load_ycbcr_conversion_matrix() s

Re: [Intel-gfx] [PATCH 2/2] drm/i915/perf: Remove __user from u64 in drm_i915_perf_oa_config

2017-09-01 Thread Lionel Landwerlin
Sure : Reviewed-by: Lionel Landwerlin On 01/09/17 15:57, Chris Wilson wrote: Sparse complains that these integers from which we form void __user *, and so we don't need the annotation itself inside the uABI. Signed-off-by: Chris Wilson Cc: Lionel Landwerlin Cc: Matthew Auld --- include/u

[Intel-gfx] [PATCH 1/2] drm/i915: Silence sparse by using gfp_t

2017-09-01 Thread Chris Wilson
Sparse enforces that GFP flags are only manipulated inside gfp_t locals. Fixes: 4d470f7359c4 ("drm/i915: Avoid undefined behaviour of "u32 >> 32"") Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +- 1 file changed, 1 insert

[Intel-gfx] [PATCH 2/2] drm/i915/perf: Remove __user from u64 in drm_i915_perf_oa_config

2017-09-01 Thread Chris Wilson
Sparse complains that these integers from which we form void __user *, and so we don't need the annotation itself inside the uABI. Signed-off-by: Chris Wilson Cc: Lionel Landwerlin Cc: Matthew Auld --- include/uapi/drm/i915_drm.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) dif

[Intel-gfx] [PATCH 2/2] dma-buf/fence: Sparse wants __rcu on the object itself

2017-09-01 Thread Chris Wilson
In order to silent sparse in dma_fence_get_rcu_safe(), we need to mark the incoming fence object as being RCU protected and not the pointer to the object. Signed-off-by: Chris Wilson --- include/linux/dma-fence.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/d

[Intel-gfx] [PATCH 1/2] drm/syncobj: Mark up the fence as an RCU protected pointer

2017-09-01 Thread Chris Wilson
We take advantage of that syncobj->fence is an RCU-protected pointer, and so sparse complains that it is lacking annotation. Signed-off-by: Chris Wilson --- include/drm/drm_syncobj.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/drm/drm_syncobj.h b/include/drm/drm_s

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Try harder to finish the idle-worker

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Try harder to finish the idle-worker URL : https://patchwork.freedesktop.org/series/29690/ State : warning == Summary == Series 29690v1 drm/i915: Try harder to finish the idle-worker https://patchwork.freedesktop.org/api/1.0/series/29690/revisions/1/mbox/

[Intel-gfx] [PATCH 4/6] drm/i915: Use correct path to trace include

2017-09-01 Thread Thierry Reding
From: Thierry Reding The header comment in include/trace/define_trace.h specifies that the TRACE_INCLUDE_PATH needs to be relative to the define_trace.h header rather than the trace file including it. Most instances get that wrong and work around it by adding the $(src) directory to the include p

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Fix enum pipe vs. enum transcoder for the PCH transcoder

2017-09-01 Thread Chris Wilson
Quoting ville.syrj...@linux.intel.com (2017-09-01 15:31:23) > From: Ville Syrjälä > > Use enum pipe for PCH transcoders also in the FIFO underrun code. > > Fixes the following new sparse warnings: > intel_fifo_underrun.c:340:49: warning: mixing different enum types > intel_fifo_underrun.c:340:49

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Speed up DMC firmware loading

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Speed up DMC firmware loading URL : https://patchwork.freedesktop.org/series/29688/ State : success == Summary == Series 29688v1 drm/i915: Speed up DMC firmware loading https://patchwork.freedesktop.org/api/1.0/series/29688/revisions/1/mbox/ Test kms_cur

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Make i2c lock ops static

2017-09-01 Thread Chris Wilson
Quoting ville.syrj...@linux.intel.com (2017-09-01 15:31:22) > From: Ville Syrjälä > > Make gmbus_lock_ops and proxy_lock_ops static to appease sparse > intel_i2c.c:652:34: warning: symbol 'gmbus_lock_ops' was not declared. Should > it be static? > intel_sdvo.c:2981:34: warning: symbol 'proxy_loc

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Make i9xx_load_ycbcr_conversion_matrix() static

2017-09-01 Thread Chris Wilson
Quoting ville.syrj...@linux.intel.com (2017-09-01 15:31:21) > From: Ville Syrjälä > > Make i9xx_load_ycbcr_conversion_matrix() static to appease sparse: > intel_color.c:110:6: warning: symbol 'i9xx_load_ycbcr_conversion_matrix' was > not declared. Should it be static? > > Cc: Shashank Sharma >

[Intel-gfx] ✓ Fi.CI.IGT: success for scripts/run-tests.sh: Use piglit's --ignore-missing

2017-09-01 Thread Patchwork
== Series Details == Series: scripts/run-tests.sh: Use piglit's --ignore-missing URL : https://patchwork.freedesktop.org/series/29685/ State : success == Summary == Test perf: Subgroup polling: fail -> PASS (shard-hsw) fdo#102252 fdo#102252 https://bugs.fre

[Intel-gfx] [PATCH 3/3] drm/i915: Fix enum pipe vs. enum transcoder for the PCH transcoder

2017-09-01 Thread ville . syrjala
From: Ville Syrjälä Use enum pipe for PCH transcoders also in the FIFO underrun code. Fixes the following new sparse warnings: intel_fifo_underrun.c:340:49: warning: mixing different enum types intel_fifo_underrun.c:340:49: int enum pipe versus intel_fifo_underrun.c:340:49: int enum tra

[Intel-gfx] [PATCH 1/3] drm/i915: Make i9xx_load_ycbcr_conversion_matrix() static

2017-09-01 Thread ville . syrjala
From: Ville Syrjälä Make i9xx_load_ycbcr_conversion_matrix() static to appease sparse: intel_color.c:110:6: warning: symbol 'i9xx_load_ycbcr_conversion_matrix' was not declared. Should it be static? Cc: Shashank Sharma Fixes: 25edf91501b8 ("drm/i915: prepare csc unit for YCBCR420 output") Sign

[Intel-gfx] [PATCH 2/3] drm/i915: Make i2c lock ops static

2017-09-01 Thread ville . syrjala
From: Ville Syrjälä Make gmbus_lock_ops and proxy_lock_ops static to appease sparse intel_i2c.c:652:34: warning: symbol 'gmbus_lock_ops' was not declared. Should it be static? intel_sdvo.c:2981:34: warning: symbol 'proxy_lock_ops' was not declared. Should it be static? Cc: Daniel Vetter Fixes

Re: [Intel-gfx] [PATCH] drm/i915: Speed up DMC firmware loading

2017-09-01 Thread Ville Syrjälä
On Fri, Sep 01, 2017 at 03:10:58PM +0100, Chris Wilson wrote: > Quoting David Weinehall (2017-09-01 15:01:17) > > Currently we're doing: > > > > 1. acquire lock > > 2. write word to hardware > > 3. release lock > > 4. repeat from 1 > > > > to load the DMC firmware. Due to the cost of acquiring/re

[Intel-gfx] [PATCH] drm/i915: Try harder to finish the idle-worker

2017-09-01 Thread Chris Wilson
If a worker requeues itself, it may switch to a different kworker pool, which flush_work() considers as complete. To be strict, we then need to keep flushing the work until it is no longer pending. References: https://bugs.freedesktop.org/show_bug.cgi?id=102456 Signed-off-by: Chris Wilson Cc: Mik

Re: [Intel-gfx] [PATCH] drm/i915: Speed up DMC firmware loading

2017-09-01 Thread Chris Wilson
Quoting David Weinehall (2017-09-01 15:01:17) > Currently we're doing: > > 1. acquire lock > 2. write word to hardware > 3. release lock > 4. repeat from 1 > > to load the DMC firmware. Due to the cost of acquiring/releasing a lock, > and the size of the DMC firmware, this slows down DMC loading

[Intel-gfx] [PATCH] drm/i915: Speed up DMC firmware loading

2017-09-01 Thread David Weinehall
Currently we're doing: 1. acquire lock 2. write word to hardware 3. release lock 4. repeat from 1 to load the DMC firmware. Due to the cost of acquiring/releasing a lock, and the size of the DMC firmware, this slows down DMC loading a lot. This patch simply acquires the lock, writes the entire f

Re: [Intel-gfx] [PATCH 4/7] drm/i915: Pass proper old/new states to intel_plane_atomic_check_with_state()

2017-09-01 Thread Ville Syrjälä
On Fri, Sep 01, 2017 at 07:15:55AM +0200, Maarten Lankhorst wrote: > Op 31-08-17 om 20:50 schreef Ville Syrjälä: > > On Wed, Aug 23, 2017 at 06:22:23PM +0300, ville.syrj...@linux.intel.com > > wrote: > >> From: Ville Syrjälä > >> > >> Eliminate plane->state and crtc->state usage from > >> intel_p

Re: [Intel-gfx] [PATCH 00/12] drm/i915: Fix up the CCS code

2017-09-01 Thread Ville Syrjälä
On Thu, Aug 31, 2017 at 05:05:01PM -0700, Rodrigo Vivi wrote: > Hi Ville, > > On Wed, Aug 30, 2017 at 10:09 AM, Ville Syrjälä > wrote: > > On Wed, Aug 30, 2017 at 11:31:16AM +0300, Jani Nikula wrote: > >> On Mon, 28 Aug 2017, Ville Syrjälä wrote: > >> > On Mon, Aug 28, 2017 at 02:35:54PM +0100,

Re: [Intel-gfx] [PATCH 1/2] drm/i915/dsi: Send SHUTDOWN only for v3+ VBT's

2017-09-01 Thread Ville Syrjälä
On Fri, Sep 01, 2017 at 10:51:00AM +0300, Mika Kahola wrote: > According to spec we should send SHUTDOWN before MIPI_SEQ_DISPLAY_OFF for > v3+ VBT's. Testing with VBT v3 the current implementation yields the > following error message > > *ERROR* Video mode command 0x0041 send failed. > > To g

[Intel-gfx] ✓ Fi.CI.BAT: success for scripts/run-tests.sh: Use piglit's --ignore-missing

2017-09-01 Thread Patchwork
== Series Details == Series: scripts/run-tests.sh: Use piglit's --ignore-missing URL : https://patchwork.freedesktop.org/series/29685/ State : success == Summary == IGT patchset tested on top of latest successful build 5ce65a9a51f17e0183e3e4f8943981ee7b96cadd pm_rps: Changes in waitboost scena

[Intel-gfx] [PATCH i-g-t] scripts/run-tests.sh: Use piglit's --ignore-missing

2017-09-01 Thread Arkadiusz Hiler
Recently we added a number of chamelium tests to the fast-feedback testlist. Chemelium is build-optional - requires `./configure --enable-chamelium`. To mitigate issue with piglit exiting abruptly due to the (possibly) missing test binaries, this makes it behave more gracefuly, considering those

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Keep the device awake whilst in the GTT write domain (rev4)

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Keep the device awake whilst in the GTT write domain (rev4) URL : https://patchwork.freedesktop.org/series/29594/ State : warning == Summary == Series 29594v4 drm/i915: Keep the device awake whilst in the GTT write domain https://patchwork.freedesktop.org

[Intel-gfx] [PATCH v3] drm/i915: Keep the device awake whilst in the GTT domain

2017-09-01 Thread Chris Wilson
Since runtime suspend is very harsh on GTT mmappings (they all get zapped on suspend) keep the device awake while the buffer remains in the GTT domain. However, userspace can control the domain and although there is a soft contract that writes must be flushed (for e.g. flushing scanouts and fbc), w

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Redo old gmch irq handling (rev2)

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Redo old gmch irq handling (rev2) URL : https://patchwork.freedesktop.org/series/26215/ State : success == Summary == Test kms_setmode: Subgroup basic: fail -> PASS (shard-hsw) fdo#99912 fdo#99912 https://bugs.freedesk

Re: [Intel-gfx] [PATCH i-g-t v2] tests/gem_flink_basic: Add documentation for subtests

2017-09-01 Thread Arkadiusz Hiler
On Thu, Aug 31, 2017 at 02:33:23PM -0700, Vinay Belgaumkar wrote: > Added the missing IGT_TEST_DESCRIPTION and some subtest > descriptions. Trying to establish a method to document Hey Vinay, Please add appropriate tag to the subject, as this is clearly an RFC. > subtests, it should describe the

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Redo old gmch irq handling (rev2)

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Redo old gmch irq handling (rev2) URL : https://patchwork.freedesktop.org/series/26215/ State : success == Summary == Test kms_setmode: Subgroup basic: fail -> PASS (shard-hsw) fdo#99912 fdo#99912 https://bugs.freedesk

Re: [Intel-gfx] [v2] igt/pm_rpm: Use libc 'ftw' rather than opencoding our own filetree walk

2017-09-01 Thread Tahvanainen, Jari
On Wed, Aug 23, 2017 at 05:06:42PM +0100, Chris Wilson wrote: > By using ftw, we avoid the issue of having to handle directory recursion > ourselves and can focus on the test of checking the reading a > sysfs/debugfs does not break runtime suspend. In the process, disregard > errors when opening th

Re: [Intel-gfx] [PATCH v2] drm/i915: Add interface to reserve fence registers for vGPU

2017-09-01 Thread Chris Wilson
Quoting changbin...@intel.com (2017-09-01 08:08:26) > diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c > b/drivers/gpu/drm/i915/i915_gem_fence_reg.c > index 5fe2cd8..429ce5f 100644 > --- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c > +++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c > @@ -360,6

Re: [Intel-gfx] tests/gem_flink_basic: Add documentation for subtests

2017-09-01 Thread Katarzyna Dec
> Date: Thu, 31 Aug 2017 14:33:23 -0700 > From: Vinay Belgaumkar > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH i-g-t v2] tests/gem_flink_basic: Add > documentation for subtests > Message-ID: > <1504215203-197533-1-git-send-email-vinay.belgaum...@intel.com> > Conte

Re: [Intel-gfx] [PATCH v5 2/4] drm/i915: mark all device info struct with __initdata

2017-09-01 Thread Chris Wilson
Quoting Lionel Landwerlin (2017-08-30 17:12:06) > As recommended by Chris. > > Signed-off-by: Lionel Landwerlin Didn't even blow up! I wonder if there's a script/option to tell us how many pages we save by using initdata? Reviewed-by: Chris Wilson -Chris ___

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Redo old gmch irq handling (rev2)

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Redo old gmch irq handling (rev2) URL : https://patchwork.freedesktop.org/series/26215/ State : success == Summary == Series 26215v2 drm/i915: Redo old gmch irq handling https://patchwork.freedesktop.org/api/1.0/series/26215/revisions/2/mbox/ Test kms_cu

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Redo old gmch irq handling (rev2)

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Redo old gmch irq handling (rev2) URL : https://patchwork.freedesktop.org/series/26215/ State : success == Summary == Series 26215v2 drm/i915: Redo old gmch irq handling https://patchwork.freedesktop.org/api/1.0/series/26215/revisions/2/mbox/ Test kms_cu

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/dsi: Fix error on DSI video mode command

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915/dsi: Fix error on DSI video mode command URL : https://patchwork.freedesktop.org/series/29658/ State : warning == Summary == Test kms_universal_plane: Subgroup disable-primary-vs-flip-pipe-C: pass -> SKIP (shard-hsw) sh

Re: [Intel-gfx] [PATCH] drm/i915/edp: Increase T12 panel delay to 900 ms to fix DP AUX CH timeouts

2017-09-01 Thread Saarinen, Jani
Hi, > -Original Message- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf > Of Ville Syrjälä > Sent: torstai 31. elokuuta 2017 21.47 > To: Navare, Manasi D > Cc: Sarvela, Tomi P ; Vetter, Daniel > ; intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PAT

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Add interface to reserve fence registers for vGPU (rev2)

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Add interface to reserve fence registers for vGPU (rev2) URL : https://patchwork.freedesktop.org/series/29523/ State : warning == Summary == Test kms_vblank: Subgroup wait-busy: pass -> SKIP (shard-hsw) shard-hsw

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dsi: Fix error on DSI video mode command

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915/dsi: Fix error on DSI video mode command URL : https://patchwork.freedesktop.org/series/29658/ State : success == Summary == Series 29658v1 drm/i915/dsi: Fix error on DSI video mode command https://patchwork.freedesktop.org/api/1.0/series/29658/revisions/1

[Intel-gfx] [PATCH 0/2] drm/i915/dsi: Fix error on DSI video mode command

2017-09-01 Thread Mika Kahola
In CI system, the Broxton with DSI display throws an error message with *ERROR* Video mode command 0x0041 send failed. In order to get rid of the error message, we should send SHUTDOWN before MIPI_SEQ_DISPLAY_OFF for VBT's higher than v3. If we end up sending two or more MIPI commands that a

[Intel-gfx] [PATCH 1/2] drm/i915/dsi: Send SHUTDOWN only for v3+ VBT's

2017-09-01 Thread Mika Kahola
According to spec we should send SHUTDOWN before MIPI_SEQ_DISPLAY_OFF for v3+ VBT's. Testing with VBT v3 the current implementation yields the following error message *ERROR* Video mode command 0x0041 send failed. To get rid of this error message, let's limit SHUTDOWN only for VBT versions 3

[Intel-gfx] [PATCH 2/2] drm/i915/dsi: Replace MIPI command error message with debug message

2017-09-01 Thread Mika Kahola
Error message indicating that the same MIPI command is sent consecutively is perhaps too strongly said. Let's replace that as a debug message instead. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/d

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add interface to reserve fence registers for vGPU (rev2)

2017-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Add interface to reserve fence registers for vGPU (rev2) URL : https://patchwork.freedesktop.org/series/29523/ State : success == Summary == Series 29523v2 drm/i915: Add interface to reserve fence registers for vGPU https://patchwork.freedesktop.org/api/1

[Intel-gfx] [PATCH 18/20] drm/i915/slpc: Add SKL SLPC Support

2017-09-01 Thread Sagar Arun Kamble
From: Tom O'Rourke This patch adds has_slpc to skylake info. The SLPC interface has changed and could continue to change. Only GuC versions known to be compatible are supported here. On Skylake, GuC firmware v6 is supported. Other platforms and versions can be added here later. v1: Move slpc_

[Intel-gfx] [PATCH 07/20] drm/i915/slpc: Enable SLPC in GuC if supported

2017-09-01 Thread Sagar Arun Kamble
From: Tom O'Rourke If slpc enabled, then add enable SLPC flag to guc control parameter during guc load. v1: Use intel_slpc_enabled() (Paulo) v2-v4: Rebase. v5: Changed intel_slpc_enabled() to i915.enable_slpc. (Sagar) Signed-off-by: Tom O'Rourke Signed-off-by: Sagar Arun Kamble --- drivers

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