== Series Details ==
Series: drm/i915: Mention which driver is taking over the VGA console
URL : https://patchwork.freedesktop.org/series/32791/
State : success
== Summary ==
Test perf:
Subgroup oa-exponents:
fail -> PASS (shard-hsw) fdo#102254
Test kms_flip
== Series Details ==
Series: drm/i915/cnl: Remove unnecessary check in cnl_setup_private_ppat
URL : https://patchwork.freedesktop.org/series/32792/
State : failure
== Summary ==
Series 32792v1 drm/i915/cnl: Remove unnecessary check in cnl_setup_private_ppat
https://patchwork.freedesktop.org/ap
== Series Details ==
Series: drm/i915/vbt: Fix HDMI level shifter and max data rate bitfield sizes
URL : https://patchwork.freedesktop.org/series/32785/
State : warning
== Summary ==
Test kms_busy:
Subgroup extended-modeset-hang-oldfb-with-reset-render-B:
pass ->
== Series Details ==
Series: tools/intel_vbt_decode: Fix HDMI level shifter and max data rate
bitfield sizes
URL : https://patchwork.freedesktop.org/series/32786/
State : failure
== Summary ==
IGT patchset tested on top of latest successful build
1fc4de1ca390adec9be8bd7cc0c36cab07465959 igt/g
There is no need check if PPGTT is disabled because that not possible
in CNL. Execlists and GuC submission modes rely on at least aliasing
PPGTT and even intel_sanitize_enable_ppgtt says: "We don't allow disabling
PPGTT for gen9+ as it's a requirement for execlists, the sole mechanism
available to
== Series Details ==
Series: drm/i915: Mention which driver is taking over the VGA console
URL : https://patchwork.freedesktop.org/series/32791/
State : success
== Summary ==
Series 32791v1 drm/i915: Mention which driver is taking over the VGA console
https://patchwork.freedesktop.org/api/1.0/
== Series Details ==
Series: series starting with [1/2] drm/i915/fbc: intel_fbc.crtc and
intel_fbc.enabled are synonymous
URL : https://patchwork.freedesktop.org/series/32784/
State : success
== Summary ==
Test perf:
Subgroup oa-exponents:
fail -> PASS (sha
== Series Details ==
Series: drm/i915: Downgrade misleading "Memory usable" message
URL : https://patchwork.freedesktop.org/series/32790/
State : failure
== Summary ==
Series 32790v1 drm/i915: Downgrade misleading "Memory usable" message
https://patchwork.freedesktop.org/api/1.0/series/32790/r
On 10/25/2017 05:15 PM, Rodrigo Vivi wrote:
CNL adds an extra register for slice/subslice information.
Although no SKU is planed with an extra slice let's already
handle this extra piece of information so we don't have the
risk in future of getting a part that might have chosen this
part of the
== Series Details ==
Series: HAX: kernel/swsusp: Show invalid swap signature (rev3)
URL : https://patchwork.freedesktop.org/series/32130/
State : warning
== Summary ==
Series 32130v3 HAX: kernel/swsusp: Show invalid swap signature
https://patchwork.freedesktop.org/api/1.0/series/32130/revision
Currently there is a rather bland,
[4.987589] [drm] Replacing VGA console driver
for when we take over the console. Let's put a (device) name on that.
If we opt for DRM_DEV_INFO we get
[5.071879] i915 :00:02.0: [drm:i915_kick_out_vgacon] Replacing VGA
console driver
which is a litt
It never meant what it said, as it was always the total size of the
Global GTT and not a limit upon memory usage. Originally it served as a
quick guide to the largest batch that could be submitted by userspace,
an approximation to its maximum RSS, but was phrased badly. Today with
the 48b ppgtt, it
== Series Details ==
Series: drm/i915/vbt: Fix HDMI level shifter and max data rate bitfield sizes
URL : https://patchwork.freedesktop.org/series/32785/
State : success
== Summary ==
Series 32785v1 drm/i915/vbt: Fix HDMI level shifter and max data rate bitfield
sizes
https://patchwork.freedes
== Series Details ==
Series: series starting with [1/2] drm/i915/fbc: intel_fbc.crtc and
intel_fbc.enabled are synonymous
URL : https://patchwork.freedesktop.org/series/32784/
State : success
== Summary ==
Series 32784v1 series starting with [1/2] drm/i915/fbc: intel_fbc.crtc and
intel_fbc.e
On 26/10/17 03:32, Chris Wilson wrote:
It has been many years since the last confirmed sighting (and fix) of an
RC6 related bug (usually a system hang). Remove the parameter to stop
users from setting dangerous values, as they often set it during triage
and end up disabling the entire runtime p
---
kernel/power/swap.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/kernel/power/swap.c b/kernel/power/swap.c
index d7cdc426ee38..1eed3fa04e21 100644
--- a/kernel/power/swap.c
+++ b/kernel/power/swap.c
@@ -306,9 +306,12 @@ static int mark_swapfiles(struct swap_
== Series Details ==
Series: drm/i915: Last part of DDI encoder->type cleanup (rev2)
URL : https://patchwork.freedesktop.org/series/32298/
State : failure
== Summary ==
Series 32298v2 drm/i915: Last part of DDI encoder->type cleanup
https://patchwork.freedesktop.org/api/1.0/series/32298/revisi
On Fri, 27 Oct 2017, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The HDMI level shifter value should be 5 bits and the max data rate 3 bits.
>
> Cc: Jani Nikula
> Reported-by: Jani Nikula
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> tools/intel_vbt_defs.h | 4 ++--
>
On Fri, 27 Oct 2017, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The HDMI level shifter value should be 5 bits and the max data rate 3 bits.
>
> Cc: Jani Nikula
> Reported-by: Jani Nikula
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/intel_vbt_defs
Quoting Ville Syrjälä (2017-10-27 21:08:55)
> On Fri, Oct 27, 2017 at 08:42:40PM +0100, Chris Wilson wrote:
> > If we are transfering an fb from one crtc to another, we will keep FBC
> > activated (due to only having a single pipe) but then we will call
> > intel_fbc_disable() from intel_atomic_com
From: Ville Syrjälä
The HDMI level shifter value should be 5 bits and the max data rate 3 bits.
Cc: Jani Nikula
Reported-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
tools/intel_vbt_defs.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/intel_vbt_defs.h b/to
From: Ville Syrjälä
The HDMI level shifter value should be 5 bits and the max data rate 3 bits.
Cc: Jani Nikula
Reported-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_vbt_defs.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/
On 27/10/17 19:31, Oscar Mateo wrote:
On 10/27/2017 11:20 AM, Chris Wilson wrote:
Quoting Oscar Mateo (2017-10-27 19:01:03)
AubCrash is a companion to i915_gpu_error. It gives us the
possibility to
dump an AUB file that describes the state of the system at the point of
the crash (GTTs, conte
== Series Details ==
Series: series starting with [1/2] drm/i915: Clean up the mess around
hdmi_12bpc_possible()
URL : https://patchwork.freedesktop.org/series/32698/
State : warning
== Summary ==
Series 32698v1 series starting with [1/2] drm/i915: Clean up the mess around
hdmi_12bpc_possibl
On Fri, Oct 27, 2017 at 08:42:40PM +0100, Chris Wilson wrote:
> If we are transfering an fb from one crtc to another, we will keep FBC
> activated (due to only having a single pipe) but then we will call
> intel_fbc_disable() from intel_atomic_commit_tail() on the old pipe
> before enabling the new
Quoting Ville Syrjälä (2017-10-27 20:56:44)
> On Fri, Oct 27, 2017 at 08:42:39PM +0100, Chris Wilson wrote:
> > diff --git a/drivers/gpu/drm/i915/intel_fbc.c
> > b/drivers/gpu/drm/i915/intel_fbc.c
> > index 1a0f5e0c8d10..f4c3a3b9a8e6 100644
> > --- a/drivers/gpu/drm/i915/intel_fbc.c
> > +++ b/driv
On Fri, Oct 27, 2017 at 08:42:39PM +0100, Chris Wilson wrote:
> Slightly reduce the chance for confusion by only having one variable
> instead of two to tell us when intel_fbc is enabled on a crtc.
>
> Signed-off-by: Chris Wilson
> Cc: Rodrigo Vivi
> Cc: Daniel Vetter
> ---
> drivers/gpu/drm/i
== Series Details ==
Series: drm/i915: Fix BXT lane latenccy optimal setting with MST
URL : https://patchwork.freedesktop.org/series/32756/
State : failure
== Summary ==
Series 32756v1 drm/i915: Fix BXT lane latenccy optimal setting with MST
https://patchwork.freedesktop.org/api/1.0/series/327
Slightly reduce the chance for confusion by only having one variable
instead of two to tell us when intel_fbc is enabled on a crtc.
Signed-off-by: Chris Wilson
Cc: Rodrigo Vivi
Cc: Daniel Vetter
---
drivers/gpu/drm/i915/i915_drv.h | 1 -
drivers/gpu/drm/i915/intel_fbc.c | 33 +---
If we are transfering an fb from one crtc to another, we will keep FBC
activated (due to only having a single pipe) but then we will call
intel_fbc_disable() from intel_atomic_commit_tail() on the old pipe
before enabling the new pipe. However, we insist that before disabling
FBC, it is deactivated
On Fri, Oct 27, 2017 at 01:02:24PM +0300, Jani Nikula wrote:
> On Fri, 27 Oct 2017, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > DP dongles may signal downstream HPD via short HPD pulses. Setting the
> > sink to DPMS off apparently kills the downstream HPD (at least on my
> > DP->VGA dong
From: Ville Syrjälä
Pass an old crtc state to intel_ddi_post_disable() from the MST code.
Note that this crtc state won't necessaitly match the one that was
passed to intel_ddi_pre_enable() if the first stream to be enabled isn't
the last stream to be disabled. But this is fine since the states
From: Ville Syrjälä
Eliminate the partially duplicated DDI readout code from MST, and
instead just call intel_ddi_get_config(). As a nice bonus we get
more cross checking as intel_ddi_get_config() will populate
output_types based on the actual mode of the DDI port.
Additonally intel_ddi_get_conf
On Fri, Oct 27, 2017 at 02:05:38PM +0200, Maarten Lankhorst wrote:
> Op 19-10-17 om 15:37 schreef Ville Syrjala:
> > From: Ville Syrjälä
> >
> > Currently the DDI encoder->type will change at runtime depending on
> > what kind of hotplugs we've processed. That's quite bad since we can't
> > really
From: Ville Syrjälä
encoder->port works for FDI, and it also works for MST (regardless of
whether we're dealing with the "fake" MST encoder, or mst->primary).
So let's eliminate intel_ddi_get_encoder_port().
Signed-off-by: Ville Syrjälä
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/
From: Ville Syrjälä
Rather than having the caller of .get_config() set output_types based on
encoder->type, let's just have .get_config() itself populate
output_types. This way we are isolated from encoder->type, which won't
be useable for this purpose anyway soon (at least for DDI encoders).
Cc
From: Ville Syrjälä
I pushed the first four patches of the last series, and split out
populating output_types in .get_config() to a separate patch. Hence
a new series with the leftovers.
Cc: Maarten Lankhorst
Ville Syrjälä (6):
drm/i915: Populate output_types from .get_config()
drm/i915: S
From: Ville Syrjälä
Currently the DDI encoder->type will change at runtime depending on
what kind of hotplugs we've processed. That's quite bad since we can't
really trust that that current value of encoder->type actually matches
the type of signal we're trying to drive through it.
Let's elimina
From: Ville Syrjälä
We should be using the DPLL hw state we got from the current crtc state
to determine the corresponding port clock frequency rather than getting
it via the current state programmed into the DPLL.
v2: Rebase due to intel_dpll_id changes
Signed-off-by: Ville Syrjälä
Reviewed-b
Quoting Oscar Mateo (2017-10-27 19:45:39)
>
>
> On 10/27/2017 11:30 AM, Chris Wilson wrote:
> > Quoting Oscar Mateo (2017-10-27 19:01:03)
> >> AubCrash is a companion to i915_gpu_error. It gives us the possibility to
> >> dump an AUB file that describes the state of the system at the point of
> >
On 10/27/2017 11:30 AM, Chris Wilson wrote:
Quoting Oscar Mateo (2017-10-27 19:01:03)
AubCrash is a companion to i915_gpu_error. It gives us the possibility to
dump an AUB file that describes the state of the system at the point of
the crash (GTTs, contexts, BBs, BOs, etc...). Being an AUB fil
== Series Details ==
Series: drm/i915: Fix BXT lane latenccy optimal setting with MST
URL : https://patchwork.freedesktop.org/series/32756/
State : success
== Summary ==
Test kms_flip:
Subgroup plain-flip-fb-recreate-interruptible:
pass -> FAIL (shard-hsw) f
== Series Details ==
Series: tests: add device information tests
URL : https://patchwork.freedesktop.org/series/32764/
State : failure
== Summary ==
IGT patchset build failed on latest successful build
1fc4de1ca390adec9be8bd7cc0c36cab07465959 igt/gem_exec_latency: Wire up an
interloper for pr
== Series Details ==
Series: AubCrash
URL : https://patchwork.freedesktop.org/series/32774/
State : failure
== Summary ==
Series 32774v1 AubCrash
https://patchwork.freedesktop.org/api/1.0/series/32774/revisions/1/mbox/
Test gem_exec_reloc:
Subgroup basic-cpu-active:
pa
On 10/27/2017 11:20 AM, Chris Wilson wrote:
Quoting Oscar Mateo (2017-10-27 19:01:03)
AubCrash is a companion to i915_gpu_error. It gives us the possibility to
dump an AUB file that describes the state of the system at the point of
the crash (GTTs, contexts, BBs, BOs, etc...). Being an AUB fil
Quoting Oscar Mateo (2017-10-27 19:01:03)
> AubCrash is a companion to i915_gpu_error. It gives us the possibility to
> dump an AUB file that describes the state of the system at the point of
> the crash (GTTs, contexts, BBs, BOs, etc...). Being an AUB file, it can be
> used by a number of already
Quoting Oscar Mateo (2017-10-27 19:01:13)
> If we want the AUB file to be complete (and, therefore, more useful)
> we need to capture all BOs in use, we cannot leave that to the UMD
> as before.
There's a very good reason why we don't try to capture the entirety of
mem from within the error captur
On 27/10/17 19:20, Chris Wilson wrote:
Quoting Oscar Mateo (2017-10-27 19:01:03)
AubCrash is a companion to i915_gpu_error. It gives us the possibility to
dump an AUB file that describes the state of the system at the point of
the crash (GTTs, contexts, BBs, BOs, etc...). Being an AUB file, it c
Quoting Oscar Mateo (2017-10-27 19:01:12)
> With every page of physical data we store: its physical address, the PTE
> that points to it and the physical address of the PTE itself. We will be
> using all this information later.
But then you've stuck it in the error_object.pages which doesn't relat
On 27/10/17 18:10, Rodrigo Vivi wrote:
On Fri, Oct 27, 2017 at 02:47:24PM +, Lionel Landwerlin wrote:
I don't know whether anyone noticed that sseu_status appears to be broken on
BXT :
cat /sys/kernel/debug/dri/0/i915_sseu_status
SSEU Device Info
Available Slice Mask: 0001
Available S
Quoting Oscar Mateo (2017-10-27 19:01:10)
> Includes some documentation on what AubCrash is supposed to achieve.
Which is missing *here*.
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/int
Quoting Oscar Mateo (2017-10-27 19:01:03)
> AubCrash is a companion to i915_gpu_error. It gives us the possibility to
> dump an AUB file that describes the state of the system at the point of
> the crash (GTTs, contexts, BBs, BOs, etc...). Being an AUB file, it can be
> used by a number of already
Quoting Oscar Mateo (2017-10-27 19:01:08)
> It can be useful if it's in play at the time of the crash,
> and I will be needing it in AubCrash.
Ambiguous pronoun.
Just add it to the error-state unconditionally. Active is used very
loosely here.
-Chris
__
Quoting Oscar Mateo (2017-10-27 19:01:07)
> Namely:
> - Capture tiling per drm_i915_error_object
tiling isn't that useful as it only relates to fences and not userspace.
> - Capture the LRC descriptor per active request
Context details.
> - Capture the wa_batchbuffer unconditionally
> - Capture
== Series Details ==
Series: series starting with [1/2] drm/i915: Add is-wedged flag to
intel_engine_dump()
URL : https://patchwork.freedesktop.org/series/32772/
State : failure
== Summary ==
Series 32772v1 series starting with [1/2] drm/i915: Add is-wedged flag to
intel_engine_dump()
https:
Use all the information previously recorded in the GPU error
state to write an AUB file.
TODO: output an already compressed file?
Signed-off-by: Oscar Mateo
Cc: Chris Wilson
---
drivers/gpu/drm/i915/Makefile| 2 +-
drivers/gpu/drm/i915/i915_aubcrash.c | 174 ++
This is where the magic happens. For the moment, this will be
used by AubCrash to output a correctly-formatted AUB file of
GPU error information.
In the future, it could be used by other modules to generate
all kinds of AUB files. D.g. a running AUB capture of everything
a given userspace applicat
I am planning on using them in AubCrash. While at it, define the mask
and shift for the Last Context Switch Reason field inside the Execlist
Status register.
Signed-off-by: Oscar Mateo
Cc: Mika Kuoppala
Cc: Chris Wilson
---
drivers/gpu/drm/i915/intel_lrc.c | 12
drivers/gpu/drm/i9
The number of PML4Es per PML4 and the number of PDPEs per PDP
should not be confused (even if the amount, 512, is indeed the
same).
Signed-off-by: Oscar Mateo
Cc: Mika Kuoppala
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
dif
I'm planning on using it later for AubCrash.
Signed-off-by: Oscar Mateo
Cc: Mika Kuoppala
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 1 +
drivers/gpu/drm/i915/i915_gem_gtt.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu
With every page of physical data we store: its physical address, the PTE
that points to it and the physical address of the PTE itself. We will be
using all this information later.
Signed-off-by: Oscar Mateo
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_aubcrash.c | 46
Namely:
- Capture tiling per drm_i915_error_object
- Capture the LRC descriptor per active request
- Capture the wa_batchbuffer unconditionally
- Capture the GAM_ECOCHK register for all GENs
They don't increase the size greatly, and they can be useful even in
the existing GPU error dump (but I wil
i915_error_puts becomes an specialization of the more general case.
Also, make it publicly accesible (since I will be using it inside
AubCrash).
Signed-off-by: Oscar Mateo
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_gpu_error.c | 19 +++-
Includes some documentation on what AubCrash is supposed to achieve.
Signed-off-by: Oscar Mateo
Cc: Chris Wilson
---
drivers/gpu/drm/i915/Kconfig | 8 ++
drivers/gpu/drm/i915/Makefile| 1 +
drivers/gpu/drm/i915/i915_aubcrash.c | 47 +++
drivers/
It can be useful if it's in play at the time of the crash,
and I will be needing it in AubCrash.
Signed-off-by: Oscar Mateo
Cc: Mika Kuoppala
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.h | 3 ++-
drivers/gpu/drm/i915/i915_gem_render_state.c | 11 +++
drivers/gpu/d
Or, at least, the first thee levels (PML4, PDPs, PDs). We'll deal
with the PTs later, at the same time we record actual physical pages
with data.
We only do this when AubCrash is enabled, to save space, but
we could also do it unconditionally and maybe dump it in text
mode when in the legacy crash
AubCrash is a companion to i915_gpu_error. It gives us the possibility to
dump an AUB file that describes the state of the system at the point of
the crash (GTTs, contexts, BBs, BOs, etc...). Being an AUB file, it can be
used by a number of already existing tools (graphical AUB file browsers,
simul
If we want the AUB file to be complete (and, therefore, more useful)
we need to capture all BOs in use, we cannot leave that to the UMD
as before.
Signed-off-by: Oscar Mateo
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_aubcrash.h | 12
drivers/gpu/drm/i915/i915_gem_execbuff
== Series Details ==
Series: i915: Cannonlake perf support
URL : https://patchwork.freedesktop.org/series/32762/
State : success
== Summary ==
Test perf:
Subgroup blocking:
fail -> PASS (shard-hsw) fdo#102252
Test kms_force_connector_basic:
Subgroup
== Series Details ==
Series: drm/i915: Add is-wedged flag to intel_engine_dump()
URL : https://patchwork.freedesktop.org/series/32771/
State : failure
== Summary ==
Series 32771v1 drm/i915: Add is-wedged flag to intel_engine_dump()
https://patchwork.freedesktop.org/api/1.0/series/32771/revisio
== Series Details ==
Series: drm/i915/guc: Split GuC firmware xfer function into clear steps
URL : https://patchwork.freedesktop.org/series/32768/
State : failure
== Summary ==
Series 32768v1 drm/i915/guc: Split GuC firmware xfer function into clear steps
https://patchwork.freedesktop.org/api/
Since a global reset affects the engine, include that along side the
per-engine reset counter when pretty printing the engine state in
intel_engine_dump().
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/intel_engine_cs.c | 5 +++--
1 file changed, 3 insertions(+), 2 dele
Comparing the state tested by intel_engine_is_idle() and printed by
intel_engine_dump(), the only bit not shown is whether or not the device
is wedged. Add that little bit of information to the pretty printer so
that if the engine fails to idle we can see why.
Signed-off-by: Chris Wilson
Cc: Mika
Comparing the state tested by intel_engine_is_idle() and printed by
intel_engine_dump(), the only bit not shown is whether or not the device
is wedged. Add that little bit of information to the pretty printer so
that if the engine fails to idle we can see why.
Signed-off-by: Chris Wilson
Cc: Mika
== Series Details ==
Series: drm/i915: Fix BXT lane latenccy optimal setting with MST
URL : https://patchwork.freedesktop.org/series/32756/
State : success
== Summary ==
Series 32756v1 drm/i915: Fix BXT lane latenccy optimal setting with MST
https://patchwork.freedesktop.org/api/1.0/series/327
Transfer of GuC firmware requires few steps that currently
are implemented in two large functions. Split this code into
smaller functions to make these steps small and clear.
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Sagar Arun Kamble
---
drivers/gpu/drm/i915/in
On Fri, Oct 27, 2017 at 02:47:24PM +, Lionel Landwerlin wrote:
> I don't know whether anyone noticed that sseu_status appears to be broken on
> BXT :
>
> cat /sys/kernel/debug/dri/0/i915_sseu_status
> SSEU Device Info
> Available Slice Mask: 0001
> Available Slice Total: 1
> Available Su
== Series Details ==
Series: i915: Cannonlake perf support
URL : https://patchwork.freedesktop.org/series/32762/
State : success
== Summary ==
Series 32762v1 i915: Cannonlake perf support
https://patchwork.freedesktop.org/api/1.0/series/32762/revisions/1/mbox/
Test chamelium:
Subgroup
== Series Details ==
Series: drm/i915: Last part of DDI encoder->type cleanup
URL : https://patchwork.freedesktop.org/series/32298/
State : failure
== Summary ==
Series 32298v1 drm/i915: Last part of DDI encoder->type cleanup
https://patchwork.freedesktop.org/api/1.0/series/32298/revisions/1/m
We can verify that topology is consistent with previous getparam like
EU_TOTAL/SLICE_MASK/SUBSLICE_MASK.
We also verify that CS timestamp frequency is always filled.
Signed-off-by: Lionel Landwerlin
---
tests/Makefile.sources| 1 +
tests/intel_device_info.c | 324 +
Quoting Lionel Landwerlin (2017-10-27 17:03:26)
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 0eac65119129..fd1a6dc0c70b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -884,6 +884,8 @@ struct intel_device_info {
== Series Details ==
Series: drm/i915: Fallback to reserve forcewake if primary ack missing (rev2)
URL : https://patchwork.freedesktop.org/series/32694/
State : success
== Summary ==
shard-hswtotal:2539 pass:1434 dwarn:0 dfail:0 fail:8 skip:1097
time:9269s
== Logs ==
For more
Now that we have that information in topology fields, let's just reused it.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_debugfs.c | 26 ++
1 file changed, 10 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu
Gen8/9 aren't very different and we can merge some of this code.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 48 +---
1 file changed, 25 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm
This adds new registers to the whitelist to configs emitted from userspace.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/Makefile | 3 +-
drivers/gpu/drm/i915/i915_oa_cnl.c | 121 +
drivers/gpu/drm/i915/i915_oa_cnl.h | 34 +++
driv
We use to have this fixed per generation, but starting with CNL userspace
cannot tell just off the PCI ID. Let's make this information available. This
is particularly useful for performance monitoring where much of the
normalization work is done using those timestamps (this include pipeline
statist
With the introduction of asymetric slices in CNL, we cannot rely on the
previous SUBSLICE_MASK getparam. Here we introduce a more detailed way of
querying the Gen's GPU topology that doesn't aggregate numbers.
This is essential for monitoring parts of the GPU with the OA unit, because
counters nee
Now that we have this stored in the device info, we can drop it from perf
part of the driver.
Note that this requires to init perf after we've computed the frequency,
hence why we move i915_perf_init() from i915_driver_init_early() to after
intel_device_info_runtime_init().
Signed-off-by: Lionel
This name was added with the whitelisting of registers for building up OA
configs. It is contained in a range gen8 whitelist :
addr >= RPM_CONFIG0.reg && addr <= NOA_CONFIG(8).reg
Hence why the name isn't used anywhere.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_reg.h |
We were missing some registers and also can name one for which we only had
the offset.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 3 ++-
drivers/gpu/drm/i915/i915_reg.h | 14 ++
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/
We can enable GT3 as well as GT2.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/Makefile | 3 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_oa_cflgt3.c | 109 ++
drivers/gpu/drm/i915/i915_oa_cflgt3.h | 34 ++
Hi all,
Here is a series to enable perf support on Cannonlake. It requires
exposing some more information to userspace, for a couple of reasons :
1) Cannonlake introduces asymetric slices (i.e. not the same number
of subslices for each slice)
2) Depending on the parts, the frequency
== Series Details ==
Series: drm/i915: Improve DP downstream HPD handling (rev2)
URL : https://patchwork.freedesktop.org/series/32714/
State : success
== Summary ==
Test kms_busy:
Subgroup extended-modeset-hang-oldfb-with-reset-render-B:
pass -> DMESG-WARN (shard-
== Series Details ==
Series: series starting with [1/4] drm: Enable pr_debug() for drm_printer
URL : https://patchwork.freedesktop.org/series/32750/
State : warning
== Summary ==
Test kms_busy:
Subgroup extended-modeset-hang-newfb-with-reset-render-A:
pass -> DMES
== Series Details ==
Series: drm/i915: Fix BXT lane latenccy optimal setting with MST
URL : https://patchwork.freedesktop.org/series/32756/
State : failure
== Summary ==
Series 32756v1 drm/i915: Fix BXT lane latenccy optimal setting with MST
https://patchwork.freedesktop.org/api/1.0/series/327
== Series Details ==
Series: drm/i915: Fix BXT lane latenccy optimal setting with MST
URL : https://patchwork.freedesktop.org/series/32756/
State : failure
== Summary ==
Series 32756v1 drm/i915: Fix BXT lane latenccy optimal setting with MST
https://patchwork.freedesktop.org/api/1.0/series/327
== Series Details ==
Series: series starting with [v2,1/3] drm/i915: Reject unknown syncobj flags
(rev2)
URL : https://patchwork.freedesktop.org/series/32755/
State : failure
== Summary ==
Series 32755v2 series starting with [v2,1/3] drm/i915: Reject unknown syncobj
flags
https://patchwork.f
I don't know whether anyone noticed that sseu_status appears to be
broken on BXT :
cat /sys/kernel/debug/dri/0/i915_sseu_status
SSEU Device Info
Available Slice Mask: 0001
Available Slice Total: 1
Available Subslice Total: 2
Available Slice0 Subslice Mask: 0006
Available EU Total: 12
Quoting Mika Kuoppala (2017-10-27 15:04:21)
> There is a possibility on gen9 hardware to miss the forcewake ack
> message. The recommended workaround is to use another free
> bit and toggle it until original bit is successfully acknowledged.
>
> Some future gen9 revs might or might not fix the und
== Series Details ==
Series: drm/i915: Fallback to reserve forcewake if primary ack missing (rev2)
URL : https://patchwork.freedesktop.org/series/32694/
State : success
== Summary ==
Series 32694v2 drm/i915: Fallback to reserve forcewake if primary ack missing
https://patchwork.freedesktop.org
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