Be paranoid and flush the GTIIR after clearing the CS interrupt to be
sure it has taken before we re-enable the interrupt handler. We still
see early interrupts following reset, the tasklet handling the mmio read
before it has been written by the CS. This hopefully reduces the
frequency to 0...
Re
On Fri, Feb 02, 2018 at 07:42:47PM +0530, Ramalingam C wrote:
>
>
> On Friday 02 February 2018 07:43 PM, Sean Paul wrote:
> > On Fri, Feb 02, 2018 at 04:15:14PM +0530, Ramalingam C wrote:
> > > If a HDCP repeater is detected with zero hdcp authenticated
> > > downstream devices, there are two opt
On Fri, Feb 02, 2018 at 03:27:43PM +0100, Maarten Lankhorst wrote:
> This will make it possible for userspace to know whether reading
> will block, without blocking on the fd. This makes it possible to
> drain all queued CRC's in blocking mode, without having to reopen
> the fd.
>
> Signed-off-by:
On Fri, Feb 02, 2018 at 07:52:24PM +0530, Ramalingam C wrote:
>
>
> On Friday 02 February 2018 07:39 PM, Sean Paul wrote:
> > On Fri, Feb 02, 2018 at 04:15:13PM +0530, Ramalingam C wrote:
> > > We enable the HDCP encryption as a part of first stage authentication.
> > > So when second stage authe
On Friday 02 February 2018 07:54 PM, Sean Paul wrote:
On Fri, Feb 02, 2018 at 04:15:18PM +0530, Ramalingam C wrote:
As a first step of HDCP authentication detects the panel's HDCP
capability. This is mandated for DP HDCP1.4.
For DP 0th Bit of Bcaps register indicates the panel's hdcp capabili
On Fri, Feb 02, 2018 at 07:56:22PM +0530, Ramalingam C wrote:
>
>
> On Friday 02 February 2018 07:46 PM, Sean Paul wrote:
> > On Fri, Feb 02, 2018 at 04:15:16PM +0530, Ramalingam C wrote:
> > > When BKSV is invalid, to mitigate any communication errors,
> > > BKSV is read once again.
> > Why is t
On Fri, Feb 02, 2018 at 04:15:20PM +0530, Ramalingam C wrote:
> This patch aligns all definitions of hdcp registers and their bits.
Ah, thanks! I think these got mangled when I dropped the SKL_ prefix.
Reviewed-by: Sean Paul
>
> Signed-off-by: Ramalingam C
> ---
> drivers/gpu/drm/i915/i915_r
On Fri, 02 Feb 2018, Greg KH wrote:
> On Fri, Feb 02, 2018 at 12:44:38PM +0200, Jani Nikula wrote:
>>
>> +Knut, Fengguang
>>
>> On Fri, 02 Feb 2018, Greg KH wrote:
>> >- If clang now builds the kernel "cleanly", yes, I want to take
>> > warning fixes in the stable tree. And even bette
On Friday 02 February 2018 07:48 PM, Sean Paul wrote:
On Fri, Feb 02, 2018 at 04:15:17PM +0530, Ramalingam C wrote:
HDCP key need not be cleared on each hdcp disable. And HDCP key Load
is skipped if key is already loaded.
I had previously encountered issues without clearing the key in my tes
On Fri, Feb 02, 2018 at 04:15:19PM +0530, Ramalingam C wrote:
> When HDCP authentication fails, we add two more reauthentication.
> This will address all reauth expectation from compliance perspective.
>
> Signed-off-by: Ramalingam C
> ---
> drivers/gpu/drm/i915/intel_hdcp.c | 18 +++
== Series Details ==
Series: tools/intel_reg: Fix segfault in intel_reg dump (rev2)
URL : https://patchwork.freedesktop.org/series/37537/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
a20a69e25a18ec63236633b804d89cc0c0cea259 overlay: fix invalid pointer ac
On Friday 02 February 2018 07:46 PM, Sean Paul wrote:
On Fri, Feb 02, 2018 at 04:15:16PM +0530, Ramalingam C wrote:
When BKSV is invalid, to mitigate any communication errors,
BKSV is read once again.
Why is the Bksv read any more volatile than other reads? If the channel is
noisy, the retrie
On Friday 02 February 2018 07:39 PM, Sean Paul wrote:
On Fri, Feb 02, 2018 at 04:15:13PM +0530, Ramalingam C wrote:
We enable the HDCP encryption as a part of first stage authentication.
So when second stage authentication fails, we need to disable the HDCP
encryption and signalling.
This pat
This will make it possible for userspace to know whether reading
will block, without blocking on the fd. This makes it possible to
drain all queued CRC's in blocking mode, without having to reopen
the fd.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_debugfs_crc.c | 19 +++
On Fri, Feb 02, 2018 at 04:15:18PM +0530, Ramalingam C wrote:
> As a first step of HDCP authentication detects the panel's HDCP
> capability. This is mandated for DP HDCP1.4.
>
> For DP 0th Bit of Bcaps register indicates the panel's hdcp capability
> For HDMI valid BKSV indicates the panel's hdcp
Quoting Michal Wajdeczko (2018-02-01 17:32:48)
> We're using i915_inject_load_failure() to inject dummy
> faults during driver load, but since this is debug utility
> we shouldn't expose it in default config as it consumes
> both code and data.
>
> add/remove: 0/1 grow/shrink: 0/2 up/down: 0/-302
== Series Details ==
Series: drm/i915: reduce indent in pch detection
URL : https://patchwork.freedesktop.org/series/37547/
State : success
== Summary ==
Test kms_vblank:
Subgroup pipe-a-ts-continuation-suspend:
fail -> PASS (shard-hsw) fdo#104783
Test perf:
On Friday 02 February 2018 07:43 PM, Sean Paul wrote:
On Fri, Feb 02, 2018 at 04:15:14PM +0530, Ramalingam C wrote:
If a HDCP repeater is detected with zero hdcp authenticated
downstream devices, there are two option as below:
1. Dont continue on second stage authentication. Disable encryptio
On Fri, Feb 02, 2018 at 04:15:17PM +0530, Ramalingam C wrote:
> HDCP key need not be cleared on each hdcp disable. And HDCP key Load
> is skipped if key is already loaded.
>
I had previously encountered issues without clearing the key in my testing.
IIRC, without clearing the keys things acted di
== Series Details ==
Series: series starting with disable-gem-trace (rev3)
URL : https://patchwork.freedesktop.org/series/37473/
State : success
== Summary ==
Series 37473v3 series starting with disable-gem-trace
https://patchwork.freedesktop.org/api/1.0/series/37473/revisions/3/mbox/
Test de
On Fri, Feb 02, 2018 at 04:15:16PM +0530, Ramalingam C wrote:
> When BKSV is invalid, to mitigate any communication errors,
> BKSV is read once again.
Why is the Bksv read any more volatile than other reads? If the channel is
noisy, the retries should be done in the shim implementation (I think th
On Fri, Feb 02, 2018 at 04:15:15PM +0530, Ramalingam C wrote:
> When HDCP authentication is triggered on multiple connector, having
> connector name and ID in debug message will be more informative.
>
> Signed-off-by: Ramalingam C
> ---
> drivers/gpu/drm/i915/intel_hdcp.c | 17 -
On Fri, Feb 02, 2018 at 04:15:14PM +0530, Ramalingam C wrote:
> If a HDCP repeater is detected with zero hdcp authenticated
> downstream devices, there are two option as below:
>
> 1. Dont continue on second stage authentication. Disable encryption.
> 2. Continue with second stage authentication e
On Fri, Feb 02, 2018 at 04:15:13PM +0530, Ramalingam C wrote:
> We enable the HDCP encryption as a part of first stage authentication.
> So when second stage authentication fails, we need to disable the HDCP
> encryption and signalling.
>
> This patch handles above requirement.
>
> For reusing th
So the functional purpose of this patch is to provide capabilities
(including preemption status) within error information. I agree this is
required.
On 2018-02-01 20:02, Chris Wilson wrote:
Rather than having the high level ioctl interface guess the underlying
implementation details, having t
On Fri, Feb 02, 2018 at 11:38:07AM +0530, Sharma, Shashank wrote:
> Thanks for the comments, mine inline.
>
> Regards
> Shashank
> On 2/2/2018 12:39 AM, Ville Syrjälä wrote:
> > On Tue, Jan 30, 2018 at 03:05:57PM +0530, Shashank Sharma wrote:
> >> From: "Sharma, Shashank"
> >>
> >> Currently, we
Chris Wilson writes:
> Rather than having the high level ioctl interface guess the underlying
> implementation details, having the implementation declare what
> capabilities it exports. We define an intel_driver_caps, similar to the
> intel_device_info, which instead of trying to describe the HW
On Fri, Feb 02, 2018 at 11:44:01AM +0530, Sharma, Shashank wrote:
> Regards
>
> Shashank
>
>
> On 2/2/2018 12:39 AM, Ville Syrjälä wrote:
> > On Tue, Jan 30, 2018 at 03:06:03PM +0530, Shashank Sharma wrote:
> >> From: "Sharma, Shashank"
> >>
> >> LSPCON chips can generate YCBCR outputs, if aske
---
drivers/gpu/drm/i915/i915_gem.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.h b/drivers/gpu/drm/i915/i915_gem.h
index e920dab7f1b8..4e46a9fdabd0 100644
--- a/drivers/gpu/drm/i915/i915_gem.h
+++ b/drivers/gpu/drm/i915/i915_gem.h
@@ -48,7 +48
== Series Details ==
Series: drm/i915/icl: remove port A/E lane sharing limitation. (rev2)
URL : https://patchwork.freedesktop.org/series/37325/
State : success
== Summary ==
Test kms_flip:
Subgroup plain-flip-ts-check:
pass -> FAIL (shard-hsw) fdo#100368
Mika Kuoppala writes:
> We need to zero out the builtin reg spec we are parsing into.
> Otherwise engine will be uninitialized and we segfault when trying
> to find engine and accessing reg->engine in later stage.
>
Chris combined both file and builting based fixes. We can omit this.
-Mika
> v
== Series Details ==
Series: drm/i915: reduce indent in pch detection
URL : https://patchwork.freedesktop.org/series/37547/
State : success
== Summary ==
Series 37547v1 drm/i915: reduce indent in pch detection
https://patchwork.freedesktop.org/api/1.0/series/37547/revisions/1/mbox/
fi-bdw-555
We need to zero out the builtin reg spec we are parsing into.
Otherwise engine will be uninitialized and we segfault when trying
to find engine and accessing reg->engine in later stage.
v2: use {} (Jani)
Fixes: 7f0be0e7d9be ("tools/intel_reg: Add reading and writing registers
through engine")
Bu
On Fri, Feb 02, 2018 at 12:44:38PM +0200, Jani Nikula wrote:
>
> +Knut, Fengguang
>
> On Fri, 02 Feb 2018, Greg KH wrote:
> > - If clang now builds the kernel "cleanly", yes, I want to take
> > warning fixes in the stable tree. And even better yet, if you
> > keep working to ens
== Series Details ==
Series: tools/intel_reg: Fix segfault in intel_reg dump
URL : https://patchwork.freedesktop.org/series/37537/
State : success
== Summary ==
Test kms_cursor_legacy:
Subgroup flip-vs-cursor-toggle:
pass -> FAIL (shard-snb) fdo#102670
Test
Save some horizontal space.
Reviewed-by: David Weinehall
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.c | 189
1 file changed, 96 insertions(+), 93 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv
On Fri, 02 Feb 2018, Mahesh Kumar wrote:
> Platforms before Gen11 were sharing lanes between port-A & port-E.
> This limitation is no more there.
>
> Changes since V1:
> - optimize the code (Shashank/Jani)
> - create helper function to get max lanes (ville)
> Changes since V2:
> - Include BIOS
== Series Details ==
Series: Adhering to HDCP1.4 Compliance Test Spec
URL : https://patchwork.freedesktop.org/series/37539/
State : failure
== Summary ==
Test perf:
Subgroup blocking:
fail -> PASS (shard-hsw) fdo#102252
Subgroup oa-exponents:
== Series Details ==
Series: drm/i915/icl: remove port A/E lane sharing limitation. (rev2)
URL : https://patchwork.freedesktop.org/series/37325/
State : success
== Summary ==
Series 37325v2 drm/i915/icl: remove port A/E lane sharing limitation.
https://patchwork.freedesktop.org/api/1.0/series/
Platforms before Gen11 were sharing lanes between port-A & port-E.
This limitation is no more there.
Changes since V1:
- optimize the code (Shashank/Jani)
- create helper function to get max lanes (ville)
Changes since V2:
- Include BIOS fail fix-up in same helper function (ville)
Signed-off-b
== Series Details ==
Series: tools/intel_reg: Fix segfault in intel_reg dump
URL : https://patchwork.freedesktop.org/series/37537/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
a20a69e25a18ec63236633b804d89cc0c0cea259 overlay: fix invalid pointer access
w
== Series Details ==
Series: Adhering to HDCP1.4 Compliance Test Spec
URL : https://patchwork.freedesktop.org/series/37539/
State : success
== Summary ==
Series 37539v1 Adhering to HDCP1.4 Compliance Test Spec
https://patchwork.freedesktop.org/api/1.0/series/37539/revisions/1/mbox/
fi-bdw-555
On Fri, 02 Feb 2018, Mika Kuoppala wrote:
> We need to zero out the builtin reg spec we are parsing into.
> Otherwise engine will be uninitialized and we segfault when trying
> to find engine and accessing reg->engine in later stage.
>
> Fixes: 7f0be0e7d9be ("tools/intel_reg: Add reading and writi
We need to zero out the builtin reg spec we are parsing into.
Otherwise engine will be uninitialized and we segfault when trying
to find engine and accessing reg->engine in later stage.
Fixes: 7f0be0e7d9be ("tools/intel_reg: Add reading and writing registers
through engine")
Bugzilla: https://bug
When HDCP authentication fails, we add two more reauthentication.
This will address all reauth expectation from compliance perspective.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c | 18 +++---
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/driver
HDCP key need not be cleared on each hdcp disable. And HDCP key Load
is skipped if key is already loaded.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_hdcp.c
b/drivers/gpu/d
When HDCP authentication is triggered on multiple connector, having
connector name and ID in debug message will be more informative.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/gp
When BKSV is invalid, to mitigate any communication errors,
BKSV is read once again.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_hdcp.c
b/drivers/gpu/drm/i915/intel
This patch aligns all definitions of hdcp registers and their bits.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/i915_reg.h | 58 -
1 file changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i9
If a HDCP repeater is detected with zero hdcp authenticated
downstream devices, there are two option as below:
1. Dont continue on second stage authentication. Disable encryption.
2. Continue with second stage authentication excluding the KSV list and
continue encryption on success.
This patch
We enable the HDCP encryption as a part of first stage authentication.
So when second stage authentication fails, we need to disable the HDCP
encryption and signalling.
This patch handles above requirement.
For reusing the _intel_hdcp_disable from generic authentication flow,
this patch retain th
As a first step of HDCP authentication detects the panel's HDCP
capability. This is mandated for DP HDCP1.4.
For DP 0th Bit of Bcaps register indicates the panel's hdcp capability
For HDMI valid BKSV indicates the panel's hdcp capability.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/int
== Series Details ==
Series: series starting with [1/6] disable-gem-trace (rev2)
URL : https://patchwork.freedesktop.org/series/37473/
State : success
== Summary ==
Test perf:
Subgroup buffer-fill:
pass -> FAIL (shard-apl) fdo#103755
Subgroup oa-expo
This series is developed to address the expectations from HDCP compliance
test specification.
6/8 patches are for fixing failures in one or more compliance test cases
2 patches are Good to have kind. Not related to compliance.
Ramalingam C (8):
drm/i915: Handle failure from 2nd stage HDCP auth
+Knut, Fengguang
On Fri, 02 Feb 2018, Greg KH wrote:
> - If clang now builds the kernel "cleanly", yes, I want to take
> warning fixes in the stable tree. And even better yet, if you
> keep working to ensure the tree is "clean", that would be
> wonderful.
So we ca
On Fri, Feb 02, 2018 at 10:56:36AM +0100, Lukas Bulwahn wrote:
> On Fri, 2 Feb 2018, Jani Nikula wrote:
>
> > Being brutally honest, please write shorter reports and shorter emails
> > to the lists.
> >
> > The static analysis reports are welcome, but only when 1) we didn't
> > already fix it in
Hi,
On 01-02-18 13:31, Hans de Goede wrote:
Hi All,
As you may have heard I've recently been working on improving
Linux laptop battery life, specifically the OOTB experience
without tweaking any options such as e.g. powertop --auto-tune
would do, see:
https://fedoraproject.org/wiki/Changes/Imp
== Series Details ==
Series: series starting with [1/6] disable-gem-trace (rev2)
URL : https://patchwork.freedesktop.org/series/37473/
State : success
== Summary ==
Series 37473v2 series starting with [1/6] disable-gem-trace
https://patchwork.freedesktop.org/api/1.0/series/37473/revisions/2/mb
On Tue, 2018-01-30 at 22:38 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> i965 and g4x still have the pipe select bits in the plane control
> registers, they're just hardcoded to select a specific pipe. However
> plane C on i965 can still move between the pipes, thus we should
> program t
On Thu, 01 Feb 2018, Lukas Bulwahn wrote:
> Hi Greg,
>
> On Thu, 1 Feb 2018, Greg KH wrote:
>
>> On Thu, Feb 01, 2018 at 06:33:30PM +0100, Ozan Alpay wrote:
>> > Dear Rodrigo Vivi, Ville Syrjälä,
>> >
>> > My name is Ozan Alpay, and I am a student mentored by Lukas Bulwahn. We
>> > intend to use
On Thu, 01 Feb 2018, Ville Syrjälä wrote:
> On Thu, Feb 01, 2018 at 01:03:43PM +0200, Jani Nikula wrote:
>> We have the max DP link rate info available in VBT since BDB version
>> 216, included in child device config since commit c4fb60b9aba9
>> ("drm/i915/bios: add DP max link rate to VBT child d
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