== Series Details ==
Series: Adding NV12 support (rev12)
URL : https://patchwork.freedesktop.org/series/28103/
State : warning
== Summary ==
Test kms_plane_scaling:
Subgroup pipe-b-scaler-with-rotation:
pass -> DMESG-WARN (shard-apl)
Subgroup pipe-c-scaler
== Series Details ==
Series: drm/i915: Scanout fence fixes/cleanups
URL : https://patchwork.freedesktop.org/series/38714/
State : failure
== Summary ==
Series 38714v1 drm/i915: Scanout fence fixes/cleanups
https://patchwork.freedesktop.org/api/1.0/series/38714/revisions/1/mbox/
Test core_auth
== Series Details ==
Series: drm/i915: GuC test run (rev4)
URL : https://patchwork.freedesktop.org/series/38615/
State : failure
== Summary ==
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-pri-indfb-multidraw:
pass -> FAIL (shard-snb) fdo#103167
Test kms_ch
== Series Details ==
Series: drm/i915: Scanout fence fixes/cleanups
URL : https://patchwork.freedesktop.org/series/38714/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ebcdf69836d6 drm/i915: Fail if we can't get a fence for gen2/3 tiled scanout
d18a59c871b1 drm/i915: Only pin t
On Wed, Feb 21, 2018 at 07:53:12AM -0800, Rodrigo Vivi wrote:
> On Wed, Feb 21, 2018 at 03:09:30PM +0200, Ville Syrjälä wrote:
> > On Tue, Feb 20, 2018 at 05:51:47PM -0800, Rodrigo Vivi wrote:
> > > Current code has some limitations:
> > >
> > > 1. debugfs only shows raw latency we read from PCODE,
On 21/02/2018 14:45, Chris Wilson wrote:
We current have a single for_each_engine() iterator which we use to
generate both a set of uABI engines and a set of physical engines.
Determining what uABI ring-id corresponds to an actual HW engine is
tricky, so pull that out to a library function and i
== Series Details ==
Series: drm/atomic: Call ww_acquire_done after drm_modeset_lock_all
URL : https://patchwork.freedesktop.org/series/38711/
State : success
== Summary ==
Series 38711v1 drm/atomic: Call ww_acquire_done after drm_modeset_lock_all
https://patchwork.freedesktop.org/api/1.0/seri
== Series Details ==
Series: drm/i915/execlists: Move the GEM_BUG_ON context matches CSB later
URL : https://patchwork.freedesktop.org/series/38709/
State : success
== Summary ==
Series 38709v1 drm/i915/execlists: Move the GEM_BUG_ON context matches CSB later
https://patchwork.freedesktop.org/
From: Ville Syrjälä
Currently the FBC code doesn't handle the 90/270 degree rotated case
correctly. We would need the GTT tracking to monitor the fence on the
normal GTT view (the rotated view doesn't even have a fence). Not quite
sure how we should program the fence Y offset etc. in that case. F
From: Ville Syrjälä
As only a subset of primary planes are FBC capable there's no need
to waste fences on all of them. So let's skip the fence if the plane
isn't even fbc capable.
In the future we might extend this to skip the fence even for FBC
capable planes if the crtc and/or plane state isn'
From: Ville Syrjälä
We've replicated the fb pin/unpin code in a few places. Pull it into
convenint helpers.
Slight change in locking behaviour as intel_cleanup_plane_fb() now
grab struct_mutex unconditionally.
v2: Change the locking to be symmetric between pin and unpin
Cc: Chris Wilson
Signe
From: Ville Syrjälä
Let's record the information whether a plane can do fbc or not under
struct inte_plane.
v2: Rebase due to i9xx_plane_id
Handle BDW/HSW correctly
Cc: Chris Wilson
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 37 +++
From: Ville Syrjälä
Gen2/3 display engine depends on the fence for tiled scanout. So if we
fail to get a fence fail the entire operation.
Cc: Chris Wilson
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
dif
From: Ville Syrjälä
Currently we pin a fence on every plane doing tiled scanout. The
number of planes we have available is fast apporaching the number
of fences so we really should stop wasting them. Only FBC needs
the fence on gen4+, so let's use fences only for the primary planes
on those platf
From: Ville Syrjälä
Rebase of my earlier attempts at fixing the scanout fence mess on top
of Chris's PLANE_HAS_FENCE stuff.
Cc: Chris Wilson
Ville Syrjälä (6):
drm/i915: Fail if we can't get a fence for gen2/3 tiled scanout
drm/i915: Only pin the fence for primary planes (and gen2/3)
drm
On Wed, Feb 21, 2018 at 03:09:30PM +0200, Ville Syrjälä wrote:
> On Tue, Feb 20, 2018 at 05:51:47PM -0800, Rodrigo Vivi wrote:
> > Current code has some limitations:
> >
> > 1. debugfs only shows raw latency we read from PCODE,
> > not the ones we are configuring.
> >
> > 2. When determining if SAG
== Series Details ==
Series: drm/i915/execlists: Add a GEM_TRACE to show when the context is
completed
URL : https://patchwork.freedesktop.org/series/38707/
State : success
== Summary ==
Series 38707v1 drm/i915/execlists: Add a GEM_TRACE to show when the context is
completed
https://patchwor
Quoting Mika Kuoppala (2018-02-21 15:21:04)
> Chris Wilson writes:
>
> > Include a GEM_TRACE to show when the context is complete and we advance
> > the ELSP port.
> >
> > Signed-off-by: Chris Wilson
> > Cc: Mika Kuoppala
> > ---
> > drivers/gpu/drm/i915/intel_lrc.c | 3 +++
> > 1 file changed
Chris Wilson writes:
> Include a GEM_TRACE to show when the context is complete and we advance
> the ELSP port.
>
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/intel_lrc.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_lr
After we acquired all generic modeset locks in drm_modeset_lock_all, it's
unsafe acquire any other so just mark acquisition as done.
Atomic drivers shouldn't use drm_modeset_lock_all.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_modeset_lock.c | 1 +
1 file changed, 1 insertion(+)
Hi Dave,
A bunch of fixes for 4.16. For some reason the lut fixes showed up again
here when generating the pull-request with dim-tools. Once you pull I
can fast forward the to drm-fixes hopefully.
Thanks,
Gustavo
drm-misc-fixes-2018-02-21:
Fixes for 4.16. I contains fixes for deadlock on runtim
Print out the current request/context before doing the GEM_BUG_ON, so
that we can inspect the values in the ftrace.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/intel_lrc.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/
Include a GEM_TRACE to show when the context is complete and we advance
the ELSP port.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/intel_lrc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
in
If the machine doesn't support FBC, it will return -ENODEV from
i915_fbc_info, which we want to interpret as unsupported.
Reported-by: Marta Lofstedt
Signed-off-by: Chris Wilson
Reviewed-by: Marta Lofstedt
---
tests/kms_fbcon_fbt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/kms
If we do a global wait while trying to execute spinners in parallel,
it ends badly with a GPU hang.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104352
Signed-off-by: Chris Wilson
---
tests/gem_spin_batch.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --
We current have a single for_each_engine() iterator which we use to
generate both a set of uABI engines and a set of physical engines.
Determining what uABI ring-id corresponds to an actual HW engine is
tricky, so pull that out to a library function and introduce
for_each_physical_engine() for case
On 21.02.2018 12:20, Vidya Srinivas wrote:
From: Chandra Konduru
This patch adds NV12 to list of supported formats for
primary plane
v2: Rebased (Chandra Konduru)
v3: Rebased (me)
v4: Review comments by Ville addressed
Removed the skl_primary_formats_with_nv12 and
added NV12 case in existing
== Series Details ==
Series: drm/i915/execlists: Remove the ring advancement under preemption
URL : https://patchwork.freedesktop.org/series/38698/
State : success
== Summary ==
Series 38698v1 drm/i915/execlists: Remove the ring advancement under preemption
https://patchwork.freedesktop.org/ap
On 20/02/2018 11:18, Patchwork wrote:
== Series Details ==
Series: drm/i915: Make global seqno known in i915_gem_request_execute tracepoint
URL : https://patchwork.freedesktop.org/series/38578/
State : success
== Summary ==
Series 38578v1 drm/i915: Make global seqno known in i915_gem_reques
While you are at it could you fix the kms_fbcon_fbt test in the same manner?
And you'll have my R-b
> -Original Message-
> From: igt-dev [mailto:igt-dev-boun...@lists.freedesktop.org] On Behalf Of
> Chris Wilson
> Sent: Friday, February 16, 2018 11:00 AM
> To: intel-gfx@lists.freedesktop.
Quoting Tvrtko Ursulin (2018-02-21 13:42:29)
>
> On 21/02/2018 13:35, Tvrtko Ursulin wrote:
> >
> > On 21/02/2018 13:07, Chris Wilson wrote:
> >> Quoting Tvrtko Ursulin (2018-02-21 12:55:17)
> >>>
> >>> On 21/02/2018 12:53, Tvrtko Ursulin wrote:
>
> On 21/02/2018 12:17, Chris Wilson wro
On 21/02/2018 13:35, Tvrtko Ursulin wrote:
On 21/02/2018 13:07, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-02-21 12:55:17)
On 21/02/2018 12:53, Tvrtko Ursulin wrote:
On 21/02/2018 12:17, Chris Wilson wrote:
How much do I want this uABI to rot away? Say "Never again!" to
implicit
al
Quoting Tvrtko Ursulin (2018-02-21 13:35:38)
>
> On 21/02/2018 13:07, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-02-21 12:55:17)
> >>
> >> On 21/02/2018 12:53, Tvrtko Ursulin wrote:
> >>>
> >>> On 21/02/2018 12:17, Chris Wilson wrote:
> How much do I want this uABI to rot away? Say
On 21/02/2018 13:07, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-02-21 12:55:17)
On 21/02/2018 12:53, Tvrtko Ursulin wrote:
On 21/02/2018 12:17, Chris Wilson wrote:
How much do I want this uABI to rot away? Say "Never again!" to implicit
aliasing.
In the meantime, we do not need to pe
On Wednesday 21 February 2018 15:28:53 Ville Syrjälä wrote:
> On Mon, Feb 19, 2018 at 10:36:50AM +0100, Pali Rohár wrote:
> > On Tuesday 13 February 2018 19:45:56 Ville Syrjälä wrote:
> > > On Tue, Feb 13, 2018 at 06:43:41PM +0100, Pali Rohár wrote:
> > > > On Tuesday 13 February 2018 18:12:21 Vill
Load an empty ringbuffer for preemption, ignoring the lite-restore
workaround as we know the preempt context is always idle before preemption.
Note that after some digging by Michal Winiarski, we found that
RING_HEAD is no longer being updated (due to inhibiting context save
restore) so this patch
== Series Details ==
Series: drm/i915/hsw: add missing disabled EUs registers reads (rev2)
URL : https://patchwork.freedesktop.org/series/38441/
State : success
== Summary ==
Series 38441v2 drm/i915/hsw: add missing disabled EUs registers reads
https://patchwork.freedesktop.org/api/1.0/series/
On Mon, Feb 19, 2018 at 10:36:50AM +0100, Pali Rohár wrote:
> On Tuesday 13 February 2018 19:45:56 Ville Syrjälä wrote:
> > On Tue, Feb 13, 2018 at 06:43:41PM +0100, Pali Rohár wrote:
> > > On Tuesday 13 February 2018 18:12:21 Ville Syrjälä wrote:
> > > > On Tue, Feb 13, 2018 at 05:04:37PM +0100, P
On Wed, Feb 21, 2018 at 12:04:43AM +, Mustaffa, Mustamin B wrote:
> Hi Ville,
>
> Can you point out what makes you says the git diff is broken?
>
> Best regard
>
> Mustamin
>
>
> -Original Message-
> From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> Sent: Tuesday, Fe
== Series Details ==
Series: Adding NV12 support (rev12)
URL : https://patchwork.freedesktop.org/series/28103/
State : success
== Summary ==
Series 28103v12 Adding NV12 support
https://patchwork.freedesktop.org/api/1.0/series/28103/revisions/12/mbox/
Test kms_pipe_crc_basic:
Subgroup
On Tue, Feb 20, 2018 at 05:51:47PM -0800, Rodrigo Vivi wrote:
> Current code has some limitations:
>
> 1. debugfs only shows raw latency we read from PCODE,
> not the ones we are configuring.
>
> 2. When determining if SAGV can be enabled we only
> apply adjusted wa, but we don't apply the IPC on
Quoting Tvrtko Ursulin (2018-02-21 12:55:17)
>
> On 21/02/2018 12:53, Tvrtko Ursulin wrote:
> >
> > On 21/02/2018 12:17, Chris Wilson wrote:
> >> How much do I want this uABI to rot away? Say "Never again!" to implicit
> >> aliasing.
> >>
> >> In the meantime, we do not need to perform duplicate
4.15-stable review patch. If anyone has any objections, please let me know.
--
From: Lucas De Marchi
commit 33aa69ed8aacd92dea12671e52eb3ca6ac2d7a49 upstream.
CFL was missing from intel_early_ids[]. The PCI ID needs to be there to
allow the memory region to be stolen, otherwis
Reviewed-by: Shashank Sharma
Regards
Shashank
On 2/21/2018 3:50 PM, Vidya Srinivas wrote:
From: Chandra Konduru
This patch sets appropriate scaler mode for NV12 format.
In this mode, skylake scaler does either chroma-upsampling or
chroma-upsampling and resolution scaling
v2: Review comments
4.14-stable review patch. If anyone has any objections, please let me know.
--
From: Lucas De Marchi
commit 33aa69ed8aacd92dea12671e52eb3ca6ac2d7a49 upstream.
CFL was missing from intel_early_ids[]. The PCI ID needs to be there to
allow the memory region to be stolen, otherwis
On 21/02/2018 12:10, Chris Wilson wrote:
Convert the busy pwm from using a single calibration pass with a fixed
target into a self-correcting pwm that tries to adjust how long to sleep
on each pwm in order to converge at the target busy %%.
Being self-correcting, it should fare better against t
== Series Details ==
Series: Adding NV12 support (rev12)
URL : https://patchwork.freedesktop.org/series/28103/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
bcaef9063e6b drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
2f18b9726ab8 drm/i915/skl+: refactor WM calcula
It turns out that HSW has a register that tells us how many EUs are
disabled per half-slice (roughly a similar notion to subslice). We
didn't read those registers so far as most userspace drivers didn't
need those values prior to Gen8, but an internal library would like to
have access to this.
Sin
On 21/02/2018 12:53, Tvrtko Ursulin wrote:
On 21/02/2018 12:17, Chris Wilson wrote:
How much do I want this uABI to rot away? Say "Never again!" to implicit
aliasing.
In the meantime, we do not need to perform duplicate work on bsd2
machines, as especially we do not know which engine bsd rela
On Wed, Feb 21, 2018 at 09:56:36AM +, Chris Wilson wrote:
> We want to de-emphasize the link between the request (dependency,
> execution and fence tracking) from GEM and so rename the struct from
> drm_i915_gem_request to i915_request. That is we may implement the GEM
> user interface on top o
== Series Details ==
Series: drm/i915: Check for I915_MODE_FLAG_INHERITED before
drm_atomic_helper_check_modeset
URL : https://patchwork.freedesktop.org/series/38678/
State : warning
== Summary ==
Series 38678v1 drm/i915: Check for I915_MODE_FLAG_INHERITED before
drm_atomic_helper_check_mode
On 21/02/2018 12:17, Chris Wilson wrote:
How much do I want this uABI to rot away? Say "Never again!" to implicit
aliasing.
In the meantime, we do not need to perform duplicate work on bsd2
machines, as especially we do not know which engine bsd relates to.
v2: When in doubt, shout!
Signed-of
== Series Details ==
Series: drm/i915: Check for I915_MODE_FLAG_INHERITED before
drm_atomic_helper_check_modeset
URL : https://patchwork.freedesktop.org/series/38678/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2914152024df drm/i915: Check for I915_MODE_FLAG_INHERITED before
== Series Details ==
Series: drm/i915: GuC test run (rev4)
URL : https://patchwork.freedesktop.org/series/38615/
State : success
== Summary ==
Series 38615v4 drm/i915: GuC test run
https://patchwork.freedesktop.org/api/1.0/series/38615/revisions/4/mbox/
Test kms_pipe_crc_basic:
Subgro
Quoting Tvrtko Ursulin (2018-02-21 12:25:55)
>
> On 21/02/2018 11:21, Chris Wilson wrote:
> > How much do I want this uABI to rot away? Say "Never again!" to implicit
> > aliasing.
> >
> > In the meantime, we do not need to perform duplicate work on bsd2
> > machines, as especially we do not know
On 21/02/2018 11:21, Chris Wilson wrote:
How much do I want this uABI to rot away? Say "Never again!" to implicit
aliasing.
In the meantime, we do not need to perform duplicate work on bsd2
machines, as especially we do not know which engine bsd relates to.
Signed-off-by: Chris Wilson
Cc: Tvr
On Wed, 21 Feb 2018 09:08:08 +0100, Sagar Arun Kamble
wrote:
On 2/21/2018 4:27 AM, Michal Wajdeczko wrote:
Since commit 6ca9a2beb54a ("drm/i915: Unwind i915_gem_init() failure")
we believed that we correctly handle all errors encountered during
GuC initialization, including special one tha
How much do I want this uABI to rot away? Say "Never again!" to implicit
aliasing.
In the meantime, we do not need to perform duplicate work on bsd2
machines, as especially we do not know which engine bsd relates to.
v2: When in doubt, shout!
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
== Series Details ==
Series: Adding NV12 support (rev12)
URL : https://patchwork.freedesktop.org/series/28103/
State : failure
== Summary ==
Series 28103v12 Adding NV12 support
https://patchwork.freedesktop.org/api/1.0/series/28103/revisions/12/mbox/
Test gem_mmap_gtt:
Subgroup basic-
Convert the busy pwm from using a single calibration pass with a fixed
target into a self-correcting pwm that tries to adjust how long to sleep
on each pwm in order to converge at the target busy %%.
Being self-correcting, it should fare better against the more variable
systems CI presents.
v2: B
Chris Wilson writes:
> We want to de-emphasize the link between the request (dependency,
> execution and fence tracking) from GEM and so rename the struct from
> drm_i915_gem_request to i915_request. That is we may implement the GEM
> user interface on top of requests, but they are an abstraction
== Series Details ==
Series: Adding NV12 support (rev12)
URL : https://patchwork.freedesktop.org/series/28103/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
74d9f6f867c3 drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
98b6c62d8823 drm/i915/skl+: refactor WM calcula
Reviewed-by: Shashank Sharma
Regards
Shashank
On 2/21/2018 3:50 PM, Vidya Srinivas wrote:
From: Chandra Konduru
This patch adds NV12 to list of supported formats for sprite plane.
v2: Rebased (me)
v3: Review comments by Ville addressed
- Removed skl_plane_formats_with_nv12 and added
NV12 ca
== Series Details ==
Series: drm/i915: Rename drm_i915_gem_request to i915_request (rev2)
URL : https://patchwork.freedesktop.org/series/37958/
State : success
== Summary ==
Test kms_pipe_crc_basic:
Subgroup hang-read-crc-pipe-b:
pass -> FAIL (shard-apl) fdo
Quoting Lionel Landwerlin (2018-02-15 12:01:56)
> Hi all,
>
> After some discussion with Joonas we agreed on changing some of the
> rcs topology structs in the uAPI. It now uses a single struct instead
> of 3.
>
> I've also changed the bit the query uAPI to make it more sensible to
> userspace (p
Export the kmsg() function for use by tests to write into the kernel
message log, useful for tests to inline their progress with kernel error
messages.
Signed-off-by: Chris Wilson
---
lib/igt_core.c | 20 ++--
lib/igt_core.h | 17 +
2 files changed, 23 insertions(
When tracking down the cause of a particular kernel warning, knowing
which file it is associated with can be a big clue. So write the
filename into the kernel message log prior to opening it.
Signed-off-by: Chris Wilson
---
tests/debugfs_test.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletio
How much do I want this uABI to rot away? Say "Never again!" to implicit
aliasing.
In the meantime, we do not need to perform duplicate work on bsd2
machines, as especially we do not know which engine bsd relates to.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
lib/ioctl_wrappers.c | 2 +
== Series Details ==
Series: igt/gem_ctx_isolation: Check isolation of registers between contexts
(rev11)
URL : https://patchwork.freedesktop.org/series/32531/
State : success
== Summary ==
Test perf:
Subgroup blocking:
pass -> FAIL (shard-hsw) fdo#102252
T
== Series Details ==
Series: drm/doc: Fix documentation for _vblank_restore().
URL : https://patchwork.freedesktop.org/series/38662/
State : success
== Summary ==
Test kms_flip:
Subgroup 2x-flip-vs-expired-vblank:
pass -> FAIL (shard-hsw) fdo#102887 +1
Quoting Tvrtko Ursulin (2018-02-21 11:03:32)
> From: Tvrtko Ursulin
>
> Apollolake machine in the shards cannot bring the CPU0 back online so
> skip the test on all Broxtons for now.
>
> v2: Fix inverted check.
> v3: igt_skip_on. (Chris Wilson)
>
> Signed-off-by: Tvrtko Ursulin
Acked-by: Chris
From: Tvrtko Ursulin
Apollolake machine in the shards cannot bring the CPU0 back online so
skip the test on all Broxtons for now.
v2: Fix inverted check.
v3: igt_skip_on. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin
---
tests/perf_pmu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/test
Quoting Tvrtko Ursulin (2018-02-21 10:59:32)
> From: Tvrtko Ursulin
>
> Apollolake machine in the shards cannot bring the CPU0 back online so
> skip the test on all Broxtons for now.
>
> v2: Fix inverted check.
>
> Signed-off-by: Tvrtko Ursulin
> ---
> tests/perf_pmu.c | 1 +
> 1 file changed
From: Tvrtko Ursulin
Apollolake machine in the shards cannot bring the CPU0 back online so
skip the test on all Broxtons for now.
v2: Fix inverted check.
Signed-off-by: Tvrtko Ursulin
---
tests/perf_pmu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
Quoting Tvrtko Ursulin (2018-02-21 10:57:38)
> From: Tvrtko Ursulin
>
> Apollolake machine in the shards cannot bring the CPU0 back online so
> skip the test on all Broxtons for now.
>
> Signed-off-by: Tvrtko Ursulin
> ---
> tests/perf_pmu.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --
From: Tvrtko Ursulin
Apollolake machine in the shards cannot bring the CPU0 back online so
skip the test on all Broxtons for now.
Signed-off-by: Tvrtko Ursulin
---
tests/perf_pmu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index 0beb91976102..b6deb
Quoting Tvrtko Ursulin (2018-02-21 10:39:29)
>
> On 20/02/2018 13:50, Chris Wilson wrote:
> > Convert the busy pwm from using a single calibration pass with a fixed
> > target into a self-correcting pwm that tries to adjust how long to sleep
> > on each pwm in order to converge at the target busy
From: Tvrtko Ursulin
With disabled aggressive idling from IGT. To see how shard run fares.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_debugfs.c | 3 ---
drivers/gpu/drm/i915/i915_params.h | 2 +-
drivers/gpu/drm/i915/intel_uc.c | 2 ++
3 files changed, 3 insertions(+), 4
On 21/02/2018 10:34, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-02-21 10:29:57)
From: Tvrtko Ursulin
Instead of assuming PMU runs on CPU0, try all possible CPUs if that is not
the case. This makes the callers handle fallout from broken tests better,
as well as sysadmin interventions whe
On 21/02/2018 10:32, Sagar Arun Kamble wrote:
Hi Tvrtko,
On 2/21/2018 3:42 PM, Tvrtko Ursulin wrote:
Hi guys,
I was trying to do a test run with GuC enabled but I am possibly doing
something wrong, or something is broken on SKL GVT machine. Could you
please check:
This is known issue where
On 20/02/2018 13:50, Chris Wilson wrote:
Convert the busy pwm from using a single calibration pass with a fixed
target into a self-correcting pwm that tries to adjust how long to sleep
on each pwm in order to converge at the target busy %%.
Being self-correcting, it should fare better against t
From: Chandra Konduru
This patch updates scaler max limit support for NV12
v2: Rebased (me)
v3: Rebased (me)
v4: Missed the Tested-by/Reviewed-by in the previous series
Adding the same to commit message in this version.
v5: Addressed review comments from Ville and rebased
- calculation of max
From: Mahesh Kumar
This patch splits skl_compute_wm/ddb functions into two parts.
One adds all affected pipes after the commit to atomic_state structure
and second part does compute the DDB.
v2: Added reviewed by tag from Shashank Sharma
Reviewed-by: Shashank Sharma
Signed-off-by: Mahesh Kumar
If the fb format is YUV, enable the plane CSC mode bits
for the conversion.
v2: Addressed review comments from Shashank Sharma
Alignment issue fixed in i915_reg.h
v3: Adding Reviewed By from Shashank Sharma
Reviewed-by: Shashank Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/i9
From: Mahesh Kumar
Display Workaround #0826 (SKL:ALL BXT:ALL) & #1059(CNL:A)
Hardware sometimes fails to wake memory from pkg C states fetching the
last few lines of planar YUV 420 (NV12) planes. This causes
intermittent underflow and corruption.
WA: Disable package C states or do not enable late
From: Chandra Konduru
This patch sets appropriate scaler mode for NV12 format.
In this mode, skylake scaler does either chroma-upsampling or
chroma-upsampling and resolution scaling
v2: Review comments from Ville addressed
NV12 case to be checked first for setting
the scaler
v3: Rebased (me)
v
Quoting Tvrtko Ursulin (2018-02-21 10:29:57)
> From: Tvrtko Ursulin
>
> Instead of assuming PMU runs on CPU0, try all possible CPUs if that is not
> the case. This makes the callers handle fallout from broken tests better,
> as well as sysadmin interventions where callers are not tests.
>
> Sign
From: Chandra Konduru
This patch adds NV12 to list of supported formats for
primary plane
v2: Rebased (Chandra Konduru)
v3: Rebased (me)
v4: Review comments by Ville addressed
Removed the skl_primary_formats_with_nv12 and
added NV12 case in existing skl_primary_formats
v5: Rebased (me)
v6: M
From: Chandra Konduru
This patch adds NV12 as supported format
to intel_framebuffer_init and performs various checks.
v2:
-Fix an issue in checks added (Chandra Konduru)
v3: rebased (me)
v4: Review comments by Ville addressed
Added platform check for NV12 in intel_framebuffer_init
Removed offs
From: Chandra Konduru
This patch adds NV12 to list of supported formats for sprite plane.
v2: Rebased (me)
v3: Review comments by Ville addressed
- Removed skl_plane_formats_with_nv12 and added
NV12 case in existing skl_plane_formats
- Added the 10bpc RGB formats
v4: Addressed review comments
From: Chandra Konduru
This patch adds NV12 to format_is_yuv() function
for sprite planes.
v2:
-Use intel_ prefix for format_is_yuv (Ville)
v3: Rebased (me)
v4: Rebased and addressed review comments from Clinton A Taylor.
"static function in intel_sprite.c is not available
to the primary plane
== Series Details ==
Series: drm/i915: Rename drm_i915_gem_request to i915_request (rev2)
URL : https://patchwork.freedesktop.org/series/37958/
State : success
== Summary ==
Series 37958v2 drm/i915: Rename drm_i915_gem_request to i915_request
https://patchwork.freedesktop.org/api/1.0/series/37
Hi Tvrtko,
On 2/21/2018 3:42 PM, Tvrtko Ursulin wrote:
Hi guys,
I was trying to do a test run with GuC enabled but I am possibly doing
something wrong, or something is broken on SKL GVT machine. Could you
please check:
This is known issue where movntdqa support is disabled for hypervisor.
GuC
From: Tvrtko Ursulin
Instead of assuming PMU runs on CPU0, try all possible CPUs if that is not
the case. This makes the callers handle fallout from broken tests better,
as well as sysadmin interventions where callers are not tests.
Signed-off-by: Tvrtko Ursulin
Cc: Chris Wilson
---
lib/igt_p
From: Mahesh Kumar
NV12 requires WM calculation for UV plane as well.
UV plane WM should also fulfill all the WM related restrictions.
v2: Addressed review comments from Shashank Sharma.
v3: Addressed review comments from Shashank Sharma
Changed plane_num to plane_id in skl_compute_plane_wm_par
From: Mahesh Kumar
Add support of recognizing DRM_FORMAT_NV12 from plane_format
register value.
v2: Added reviewed by tag from Mika Kahola
Reviewed-by: Mika Kahola
Signed-off-by: Mahesh Kumar
---
drivers/gpu/drm/i915/intel_display.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drive
From: Mahesh Kumar
This patch passes skl_wm_level structure itself to watermark
computation function skl_compute_plane_wm function (instead
of its internal parameters). It reduces number of arguments
required to be passed.
v2: Addressed review comments by Shashank Sharma
v3: Adding reviewed by
From: Mahesh Kumar
Current code calculates DDB for planar formats in such a way that we
store DDB of plane-0 in plane 1 & vice-versa.
In order to make this clean this patch refactors WM/DDB calculation for
NV12 planar formats.
v2: Addressed review comments by Maarten
v3: Rebased and addressed r
From: Mahesh Kumar
For YUV 420 Planar formats like NV12,
buffer allocation is done for Y and UV surfaces separately.
For NV12 plane formats, the UV buffer
allocation must be programmed in the Plane Buffer Config register
and the Y buffer allocation must be programmed in the
Plane NV12 Buffer Conf
From: Mahesh Kumar
DDB allocation optimization algorithm requires/assumes ddb allocation for
any memory C-state level DDB value to be as high as level below the
current level. Render decompression requires level WM to be as high as
wm level-0. This patch fulfils both the requirements.
v2: Change
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