On 2018.03.28 16:26:17 +0800, Zhenyu Wang wrote:
>
> Hi, Joonas
>
> Here's refreshed pull for 4.17 without that revert patch which
> also include new fixes for ggtt dma unmap and virtual display.
>
Joonas, pls ignore this one, smoke test pass but seems new issue found
in full test. I'll send yo
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Avoid sleeping inside
per-engine reset
URL : https://patchwork.freedesktop.org/series/40915/
State : success
== Summary ==
Known issues:
Test gem_exec_suspend:
Subgroup basic-s3-devices:
pass
== Series Details ==
Series: trace: Default to using trace_global_clock if sched_clock is unstable
(rev2)
URL : https://patchwork.freedesktop.org/series/40728/
State : failure
== Summary ==
Possible new issues:
Test kms_cursor_legacy:
Subgroup cursor-vs-flip-atomic-transitions-v
== Series Details ==
Series: series starting with [v3,01/10] drm: Add DP PSR2 sink enable bit
URL : https://patchwork.freedesktop.org/series/40839/
State : success
== Summary ==
Known issues:
Test kms_flip:
Subgroup 2x-flip-vs-absolute-wf_vblank:
pass -> FAI
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Avoid sleeping inside
per-engine reset
URL : https://patchwork.freedesktop.org/series/40915/
State : success
== Summary ==
Series 40915v1 series starting with [CI,1/2] drm/i915: Avoid sleeping inside
per-engine reset
https:
== Series Details ==
Series: trace: Default to using trace_global_clock if sched_clock is unstable
(rev2)
URL : https://patchwork.freedesktop.org/series/40728/
State : success
== Summary ==
Series 40728v2 trace: Default to using trace_global_clock if sched_clock is
unstable
https://patchwork
As intel_wait_for_register_fw() may use, and if successful only use, a
busy-wait loop, the might_sleep() warning is a little over-zealous.
Restrict it to a might_sleep_if() a slow timeout is specified (and so
the caller authorises use of a usleep).
Signed-off-by: Chris Wilson
Reviewed-by: Mika Ku
Only sleep and repeat when asked for a full device reset (ALL_ENGINES)
and avoid using sleeping waits when asked for a per-engine reset. The
goal is to be able to use a per-engine reset from hardirq/softirq/timer
context. A consequence is that our individual wait timeouts are a
thousand times short
== Series Details ==
Series: trace: Default to using trace_global_clock if sched_clock is unstable
(rev2)
URL : https://patchwork.freedesktop.org/series/40728/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
206b3fc619b5 trace: Default to using trace_global_clock if sched_clock
Across suspend, we may see a very large drift in timestamps if the sched
clock is unstable, prompting the global trace's ringbuffer code to warn
and suggest switching to the global clock. Preempt this request by
detecting when the sched clock is unstable (determined during
late_initcall) and automa
== Series Details ==
Series: series starting with [v3,01/10] drm: Add DP PSR2 sink enable bit
URL : https://patchwork.freedesktop.org/series/40839/
State : success
== Summary ==
Series 40839v1 series starting with [v3,01/10] drm: Add DP PSR2 sink enable bit
https://patchwork.freedesktop.org/ap
== Series Details ==
Series: drm/edid: Dump valid EDIDs too
URL : https://patchwork.freedesktop.org/series/40896/
State : success
== Summary ==
Known issues:
Test kms_flip:
Subgroup 2x-plain-flip-fb-recreate:
pass -> FAIL (shard-hsw) fdo#100368
== Series Details ==
Series: series starting with [v3,01/10] drm: Add DP PSR2 sink enable bit
URL : https://patchwork.freedesktop.org/series/40839/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9ae66e05586d drm: Add DP PSR2 sink enable bit
ea5ff834dac7 drm: Add DP last received
== Series Details ==
Series: drm/i915/dp: Write to SET_POWER dpcd to enable MST hub. (rev2)
URL : https://patchwork.freedesktop.org/series/39927/
State : failure
== Summary ==
Applying: drm/i915/dp: Write to SET_POWER dpcd to enable MST hub.
Using index info to reconstruct a base tree...
M
If bios sets up an MST output and hardware state readout code sees this is
an SST configuration, when disabling the encoder we end up calling
->post_disable_dp() hook instead of the MST version. Consequently, we write
to the DP_SET_POWER dpcd to set it D3 state. Further along when we try
enable the
== Series Details ==
Series: blacklist: Don't run DRRS test on Intel CI system
URL : https://patchwork.freedesktop.org/series/40871/
State : failure
== Summary ==
Possible new issues:
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-primscrn-cur-indfb-draw-render:
p
From: Tvrtko Ursulin
intel-gpu-top is a dangerous tool which can hang machines due unsafe mmio
register access. This patch rewrites it to use only PMU.
Only overall command streamer busyness and GPU global data such as power
and frequencies are included in this new version.
For access to more G
== Series Details ==
Series: HDCP1.4 fixes (rev3)
URL : https://patchwork.freedesktop.org/series/38978/
State : failure
== Summary ==
Possible new issues:
Test drv_selftest:
Subgroup live_hangcheck:
pass -> DMESG-FAIL (shard-apl)
Known issues:
Test km
Chris Wilson writes:
> We would like to start doing some bookkeeping at the beginning, between
> contexts and at the end of execlists submission. We already mark the
> beginning and end using EXECLISTS_ACTIVE_USER, to provide an indication
> when the HW is idle. This give us a pair of sequence po
== Series Details ==
Series: series starting with [v6,1/2] drm/i915/cnl: Implement
WaProgramMgsrForCorrectSliceSpecificMmioReads (rev7)
URL : https://patchwork.freedesktop.org/series/40503/
State : failure
== Summary ==
Series 40503v7 series starting with [v6,1/2] drm/i915/cnl: Implement
WaP
== Series Details ==
Series: drm/i915: Some plane init cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/39390/
State : failure
== Summary ==
Possible new issues:
Test kms_chv_cursor_fail:
Subgroup pipe-b-64x64-top-edge:
pass -> FAIL (shar
Quoting Ville Syrjälä (2018-03-29 17:14:05)
> On Thu, Mar 29, 2018 at 05:01:13PM +0100, Chris Wilson wrote:
> > Quoting Ville Syrjala (2018-03-29 16:50:23)
> > > From: Ville Syrjälä
> > >
> > > Having the EDID available is often very beneficial for bug analysis,
> > > even when the EDID itself is
== Series Details ==
Series: drm/edid: Dump valid EDIDs too
URL : https://patchwork.freedesktop.org/series/40896/
State : success
== Summary ==
Series 40896v1 drm/edid: Dump valid EDIDs too
https://patchwork.freedesktop.org/api/1.0/series/40896/revisions/1/mbox/
Known issues:
Test gem_m
== Series Details ==
Series: drm/i915/execlists: Track begin/end of execlists submission sequences
URL : https://patchwork.freedesktop.org/series/40870/
State : failure
== Summary ==
Possible new issues:
Test kms_chv_cursor_fail:
Subgroup pipe-a-64x64-left-edge:
p
L3Bank could be fused off in hardware for debug purpose, and it
is possible that subslice is enabled while its corresponding L3Bank pairs
are disabled. In such case, if MCR packet control register(0xFDC) is
programed to point to a disabled bank pair, a MMIO read into L3Bank range
will return 0 inst
On Mon, Mar 26, 2018 at 10:28:06PM +0200, Daniel Vetter wrote:
> On Thu, Mar 22, 2018 at 05:22:52PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > drm_atomic_helper_shutdown() needs to release the reference held by
> > plane->fb, so we want to use drm_atomic_clean_old_fb() in
> > drm
Quoting Tvrtko Ursulin (2018-03-29 11:33:34)
> From: Tvrtko Ursulin
>
> intel-gpu-top is a dangerous tool which can hang machines due unsafe mmio
> register access. This patch rewrites it to use only PMU.
>
> Only overall command streamer busyness and GPU global data such as power
> and frequenc
On Wed, Mar 28, 2018 at 02:03:04PM -0700, Michel Thierry wrote:
> It's not like it will magically appear or disappear ;)
>
> Signed-off-by: Michel Thierry
> Cc: Ville Syrjälä
Not sure why someone keeps using a driver that doesn't support the
hw they have ;)
Anyways,
Reviewed-by: Ville Syrjälä
== Series Details ==
Series: series starting with [v6,1/2] drm/i915/cnl: Implement
WaProgramMgsrForCorrectSliceSpecificMmioReads (rev6)
URL : https://patchwork.freedesktop.org/series/40503/
State : failure
== Summary ==
Series 40503v6 series starting with [v6,1/2] drm/i915/cnl: Implement
WaP
On Thu, Mar 29, 2018 at 05:01:13PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjala (2018-03-29 16:50:23)
> > From: Ville Syrjälä
> >
> > Having the EDID available is often very beneficial for bug analysis,
> > even when the EDID itself is valid and not the direct cause of the
> > bug. So let's
Quoting Ville Syrjala (2018-03-29 16:50:23)
> From: Ville Syrjälä
>
> Having the EDID available is often very beneficial for bug analysis,
> even when the EDID itself is valid and not the direct cause of the
> bug. So let's dump the EDID to dmesg even when it's valid. This
> should also give us a
On 29/03/18 02:11, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Wrong file descriptor was passed to the iterator. This had currently no
effect, since it wasn't used in the macro, but needs to be fixed.
At the same time make the macro consistent by checking for engine presence
like the other iter
WaProgramMgsrForCorrectSliceSpecificMmioReads dictate that before any MMIO
read into Slice/Subslice specific registers, MCR packet control
register(0xFDC) needs to be programmed to point to any enabled
slice/subslice pair. Otherwise, incorrect value will be returned.
However, that means each subse
From: Ville Syrjälä
Having the EDID available is often very beneficial for bug analysis,
even when the EDID itself is valid and not the direct cause of the
bug. So let's dump the EDID to dmesg even when it's valid. This
should also give us a better historical record of EDIDs for later
analysis.
== Series Details ==
Series: blacklist: Don't run DRRS test on Intel CI system
URL : https://patchwork.freedesktop.org/series/40871/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
2cbd4ddf11b3eaf01f33d8bc2ad46411ec6c299a lib/igt_kms: Improve connector probi
== Series Details ==
Series: drm/i915/execlists: Set queue priority from secondary port
URL : https://patchwork.freedesktop.org/series/40869/
State : success
== Summary ==
Known issues:
Test kms_cursor_crc:
Subgroup cursor-64x64-suspend:
incomplete -> PASS (
== Series Details ==
Series: HDCP1.4 fixes (rev3)
URL : https://patchwork.freedesktop.org/series/38978/
State : success
== Summary ==
Series 38978v3 HDCP1.4 fixes
https://patchwork.freedesktop.org/api/1.0/series/38978/revisions/3/mbox/
Known issues:
Test kms_pipe_crc_basic:
Subg
On Thu, Mar 29, 2018 at 07:39:08PM +0530, Ramalingam C wrote:
> In both HDMI and DP, device count is represented by 6:0 bits of a
> register(BInfo/Bstatus)
>
> So macro for bitmasking the device_count is fixed(0x3F->0x7F).
>
Reviewed-by: Sean Paul
> Signed-off-by: Ramalingam C
> cc: Sean Pau
On Thu, Mar 29, 2018 at 07:39:06PM +0530, Ramalingam C wrote:
> In case of V prime mismatch, DP HDCP spec mandates the re-read of
> Vprime atleast twice.
>
> This patch needed for DP HDCP1.4 CTS Test: 1B-05.
>
> v2:
> Moved the V' validation into a function for retry. [Sean Paul]
>
> Signed-of
On Thu, Mar 29, 2018 at 07:39:05PM +0530, Ramalingam C wrote:
> As per DP spec when R0 mismatch is detected, HDCP source supported
> re-read the R0 atleast twice.
>
> And For HDMI and DP minimum wait required for the R0 availability is
> 100mSec. So this patch changes the wait time to 100mSec but
On Thu, Mar 29, 2018 at 07:39:07PM +0530, Ramalingam C wrote:
> HDCP1.4 key can be loaded, only when Power well #1 is enabled and cdclk
> is enabled. Using the I915 power well infrastruture, above requirement
> is verified.
>
> This patch enables the hdcp initialization for HSW, BDW, and BXT.
>
>
== Series Details ==
Series: YCBCR 4:2:0/4:4:4 output support for LSPCON (rev4)
URL : https://patchwork.freedesktop.org/series/36068/
State : warning
== Summary ==
Series 36068v4 YCBCR 4:2:0/4:4:4 output support for LSPCON
https://patchwork.freedesktop.org/api/1.0/series/36068/revisions/4/mbox
Hi,
I tested this on HSW GT2, BYT, BDW GT3, SKL GT2 and KBL GT3e,
with Ubuntu 16.04 and 17.10, using Ubuntu default kernels (4.4 to 4.13)
and latest drm-tip build (4.16.0-rc7).
General comments
This will be used by our customers and people who aren't necessarily
familiar with
On Thursday 29 March 2018 07:39 PM, Ramalingam C wrote:
First two patches needed for below DP HDCP compliance tests
1A-06 and 1B-05
Third patch fixes the HDCP1.4 Key loadability check. where as fourth
one fixes the downstream device count read.
Fix for HDMI HDCP1.4 CTS tests: 1A-04 and
In case of V prime mismatch, DP HDCP spec mandates the re-read of
Vprime atleast twice.
This patch needed for DP HDCP1.4 CTS Test: 1B-05.
v2:
Moved the V' validation into a function for retry. [Sean Paul]
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c | 113 +++
HDCP1.4 key can be loaded, only when Power well #1 is enabled and cdclk
is enabled. Using the I915 power well infrastruture, above requirement
is verified.
This patch enables the hdcp initialization for HSW, BDW, and BXT.
v2:
Choose the PW# based on the platform.
Signed-off-by: Ramalingam C
R
As per DP spec when R0 mismatch is detected, HDCP source supported
re-read the R0 atleast twice.
And For HDMI and DP minimum wait required for the R0 availability is
100mSec. So this patch changes the wait time to 100mSec but retries
twice with the time interval of 100mSec for each attempt.
This
First two patches needed for below DP HDCP compliance tests
1A-06 and 1B-05
Third patch fixes the HDCP1.4 Key loadability check. where as fourth
one fixes the downstream device count read.
Fix for HDMI HDCP1.4 CTS tests: 1A-04 and 1A-07a are functional.
But the change from v2, as thinking
In both HDMI and DP, device count is represented by 6:0 bits of a
register(BInfo/Bstatus)
So macro for bitmasking the device_count is fixed(0x3F->0x7F).
Signed-off-by: Ramalingam C
cc: Sean Paul
---
include/drm/drm_hdcp.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/incl
== Series Details ==
Series: YCBCR 4:2:0/4:4:4 output support for LSPCON (rev4)
URL : https://patchwork.freedesktop.org/series/36068/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Introduce CRTC output format
Okay!
Commit: drm/i915: Add CRTC output format YCBCR 4
== Series Details ==
Series: YCBCR 4:2:0/4:4:4 output support for LSPCON (rev4)
URL : https://patchwork.freedesktop.org/series/36068/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2b5dfa9c4aa1 drm/i915: Introduce CRTC output format
-:86: CHECK:PARENTHESIS_ALIGNMENT: Alignment s
== Series Details ==
Series: drm/i915: Some plane init cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/39390/
State : success
== Summary ==
Series 39390v2 drm/i915: Some plane init cleanups
https://patchwork.freedesktop.org/api/1.0/series/39390/revisions/2/mbox/
Known issu
== Series Details ==
Series: drm/i915/execlists: Track begin/end of execlists submission sequences
URL : https://patchwork.freedesktop.org/series/40870/
State : success
== Summary ==
Series 40870v1 drm/i915/execlists: Track begin/end of execlists submission
sequences
https://patchwork.freedes
On Thu, 29 Mar 2018, Chris Wilson wrote:
> Quoting Yang (2018-03-29 08:12:13)
>> From: Yang Shi
>>
>> snd_hdac driver would use the component interface from i915 driver.
>> if i915 driver do the audio component intialization too late, snd_hdac
>> driver will meet ipanic.
>>
>> Signed-off-by: Bo
From: Tvrtko Ursulin
Context destroyer is supposed to trigger wedging or resets at incovenient
times and then re-use the context so either the context or driver tracking
might get confused and break.
Signed-off-by: Tvrtko Ursulin
---
tests/gem_eio.c | 62 +++
From: Tvrtko Ursulin
Contexts executing when reset triggers are potentialy corrupt so trying to
use them from a subsequent test (like the default context) can hang the
GPU or even the driver.
Workaround that by always creating a dedicated context which will be
running when GPU reset happens.
v2
This patch adds support for YCBCR 4:4:4 CRTC output format.
To do this, this patch extends the existing YCBCR 4:2:0
framework by:
- Adding new parameter in for YCBCR 4:4:4 enum crtc_iutput_format.
- Adding case for YCBCR 4:4:4 in while setting AVI infoframes.
- Adding necessary checks in modeset se
LSPCON chips can generate YCBCR outputs, if asked nicely :).
In order to generate YCBCR 4:2:0 outputs, a source must:
- send YCBCR 4:4:4 signals to LSPCON
- program color space as 4:2:0 in AVI infoframes
Whereas for YCBCR 4:4:4 outputs, the source must:
- send YCBCR 4:4:4 signals to LSPCON
- prog
This patch series adds YCBCR 4:2:0 output support for LSPCON displays.
In order to indicate the color format of output, to the LSPCON device,
a source has to set and send proper AVI infoframes to LSPCON. So this
patch series:
- introduces concept of CRTC output format.
- adds AVI infoframes support
Currently, we are using a bool in CRTC state (state->ycbcr420),
to indicate modeset, that the output format is YCBCR 4:2:0. Now in
order to support other YCBCR formats, we will need more such flags.
This patch adds a new enum parameter for YCBCR 4:2:0 outputs, in the
CRTC output formats and then p
In order to pass AVI infoframes to LSPCON devices, a source has to
write them in a vendor recommended method and location.
This patch series:
- adds generic LSPCON infoframe setup functions.
- registers these functions into existing AVI infoframe framework.
- triggers these functions from modeset
From: "Sharma, Shashank"
Different LSPCON vendors specify their custom methods to pass
AVI infoframes to the LSPCON chip, so does Parade tech.
This patch adds functions to arrange and write AVI infoframes
into Parade LSPCON chips.
V2: rebase
V3: Added r-b from Maarten
V4: rebase
V5: rebase
V6:
From: "Sharma, Shashank"
As LSPCON is a DP branch device, LSPCON vendors define
specific methods to pass AVI infoframes to the the chip.
This patch adds:
- a generic wrapper function for writing AVI infoframes for
all LSPCON devices.
- a vendor specific function to wrire AVI infoframes into
M
This patch adds an enum "intel_output_format" to represent
the output format of a particular CRTC. This enum will be
used to produce a RGB/YCBCR4:4:4/YCBCR4:2:0 output format
during the atomic modeset calculations.
V5:
- Created this separate patch to introduce and init output_format.
- Initialize
From: "Sharma, Shashank"
Intel LSPCON chip is provided by 2 vendors:
- Megachips America (MCA)
- Parade technologies (Parade tech)
Its important to know the vendor of this chip, as the address to
write AVI infoframes is different for those two.
This patch reads the vendor OUI signature, and mar
== Series Details ==
Series: Add NV12 support (rev6)
URL : https://patchwork.freedesktop.org/series/39670/
State : failure
== Summary ==
Possible new issues:
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-indfb-draw-blt:
pass -> FAIL (shar
Quoting Yang (2018-03-29 08:12:13)
> From: Yang Shi
>
> snd_hdac driver would use the component interface from i915 driver.
> if i915 driver do the audio component intialization too late, snd_hdac
> driver will meet ipanic.
>
> Signed-off-by: Bo He
> Signed-off-by: Yang Shi
> ---
> drivers/gp
/0day-ci/linux/commits/Chris-Wilson/drm-i915-selftests-Add-basic-sanitychecks-for-execlists/20180329-183934
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-x011-201812 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the
== Series Details ==
Series: series starting with [1/1] drm/i915: move audio component intialization
before audio driver use it
URL : https://patchwork.freedesktop.org/series/40858/
State : success
== Summary ==
Known issues:
Test kms_cursor_crc:
Subgroup cursor-64x64-suspend:
On Thu, Mar 29, 2018 at 12:28:48PM +0200, Maarten Lankhorst wrote:
> Op 29-03-18 om 11:19 schreef Srinivas, Vidya:
> >
> >> -Original Message-
> >> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
> >> Sent: Thursday, March 29, 2018 2:19 PM
> >> To: Srinivas, Vidya ; intel
== Series Details ==
Series: drm/i915/execlists: Set queue priority from secondary port
URL : https://patchwork.freedesktop.org/series/40869/
State : success
== Summary ==
Series 40869v1 drm/i915/execlists: Set queue priority from secondary port
https://patchwork.freedesktop.org/api/1.0/series
Quoting Tvrtko Ursulin (2018-03-29 10:43:11)
>
> On 29/03/2018 09:55, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-03-29 09:42:52)
> >>
> >> On 27/03/2018 22:01, Chris Wilson wrote:
> >>> When we include a request's global_seqno in a GEM_TRACE it often helps
> >>> to know how that relates
On 03/28/2018 06:09 PM, Daniel Vetter wrote:
On Wed, Mar 28, 2018 at 10:38:35AM +0300, Oleksandr Andrushchenko wrote:
From: Noralf Trønnes
Use srcu to protect drm_device.unplugged in a race free manner.
Drivers can use drm_dev_enter()/drm_dev_exit() to protect and mark
sections preventing acce
== Series Details ==
Series: drm/i915/execlists: Set queue priority from secondary port
URL : https://patchwork.freedesktop.org/series/40869/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c8d32fcce635 drm/i915/execlists: Set queue priority from secondary port
-:25: WARNING:COMM
== Series Details ==
Series: drm/i915: Don't deballoon unused ggtt drm_mm_node in linux guest
URL : https://patchwork.freedesktop.org/series/40851/
State : failure
== Summary ==
Possible new issues:
Test drm_read:
Subgroup empty-nonblock:
pass -> FAIL
On 28/03/2018 21:11, Rinat Ibragimov wrote:
Среда, 28 марта 2018, 21:30 +03:00 от Tvrtko Ursulin :
+static struct engines *discover_engines(void)
{
-uint32_t devid = pci_dev->device_id;
-uint16_t gcfgc;
+const char *sysfs_root = "/sys/devices/i915/events";
Just a question.
I think, I h
From: Tvrtko Ursulin
intel-gpu-top is a dangerous tool which can hang machines due unsafe mmio
register access. This patch rewrites it to use only PMU.
Only overall command streamer busyness and GPU global data such as power
and frequencies are included in this new version.
For access to more G
Quoting Michel Thierry (2018-03-28 21:58:50)
> Probably lost while rebasing commit eacd8391f977 ("drm/i915/guc: Keep GuC
> interrupts enabled when using GuC").
>
> Not really needed since i915_gem_init_hw is called before uc_resume, but
> it brings symmetry to uc_suspend.
>
> Signed-off-by: Miche
> -Original Message-
> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
> Sent: Thursday, March 29, 2018 3:59 PM
> To: Srinivas, Vidya ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v18 18/18] drm/i915: Keep plane size mult of
> 4 for NV12
>
> O
Op 29-03-18 om 11:19 schreef Srinivas, Vidya:
>
>> -Original Message-
>> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
>> Sent: Thursday, March 29, 2018 2:19 PM
>> To: Srinivas, Vidya ; intel-
>> g...@lists.freedesktop.org
>> Subject: Re: [Intel-gfx] [PATCH v18 18/18] d
Skipping takes time, specifically for the big amount of drrs
related kms_frontbuffer_tracking tests. Since we currently
don't have any system set up with DRRS panels, blacklisting
all those test will save time, and we can avoid the need to
increase the Jenkins timeout in order to solve the Bugzilla
We would like to start doing some bookkeeping at the beginning, between
contexts and at the end of execlists submission. We already mark the
beginning and end using EXECLISTS_ACTIVE_USER, to provide an indication
when the HW is idle. This give us a pair of sequence points we can then
expand on for
On Thu, 29 Mar 2018, "Shi, Yang A" wrote:
> snd_hdac driver would use the component interface from i915 driver.
> if i915 driver do the audio component intialization too late, snd_hdac
> driver will meet ipanic.
Please include the oops.
What is it about this patch that fixes the issue? Based on
== Series Details ==
Series: drm/i915: Avoid sleeping inside per-engine reset
URL : https://patchwork.freedesktop.org/series/40838/
State : success
== Summary ==
Series 40838v1 drm/i915: Avoid sleeping inside per-engine reset
https://patchwork.freedesktop.org/api/1.0/series/40838/revisions/1/m
Quoting Tvrtko Ursulin (2018-03-29 10:34:40)
> From: Tvrtko Ursulin
>
> Contexts executing when reset triggers are potentialy corrupt so trying to
> use them from a subsequent test (like the default context) can hang the
> GPU or even the driver.
>
> Workaround that by always creating a dedicate
On 29/03/2018 09:55, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-03-29 09:42:52)
On 27/03/2018 22:01, Chris Wilson wrote:
When we include a request's global_seqno in a GEM_TRACE it often helps
to know how that relates to the current breadcrumb as seen by the
hardware.
Signed-off-by: Chr
+ Zhi and Zhenyu
Quoting Xiong Zhang (2018-03-29 13:58:41)
> Four drm_mm_node are used to reserve guest ggtt space, but some of them
> may aren't initialized and used in intel_vgt_balloon(), so these unused
> drm_mm_node couldn't be removed through drm_mm_remove_node().
I'm not sure how this slip
> -Original Message-
> From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> Sent: Thursday, March 29, 2018 3:04 PM
> To: Srinivas, Vidya
> Cc: intel-gfx@lists.freedesktop.org; Lankhorst, Maarten
>
> Subject: Re: [Intel-gfx] [PATCH v18 18/18] drm/i915: Keep plane size mult of
> 4
We can refine our current execlists->queue_priority if we inspect
ELSP[1] rather than the head of the unsubmitted queue. Currently, we use
the unsubmitted queue and say that if a subsequent request is more than
important than the current queue, we will rerun the submission tasklet
to evaluate the n
From: Tvrtko Ursulin
Contexts executing when reset triggers are potentialy corrupt so trying to
use them from a subsequent test (like the default context) can hang the
GPU or even the driver.
Workaround that by always creating a dedicated context which will be
running when GPU reset happens.
v2
On Thu, Mar 29, 2018 at 09:29:06AM +, Srinivas, Vidya wrote:
>
>
> > -Original Message-
> > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> > Sent: Thursday, March 29, 2018 2:56 PM
> > To: Srinivas, Vidya
> > Cc: intel-gfx@lists.freedesktop.org; Lankhorst, Maarten
> >
>
> -Original Message-
> From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> Sent: Thursday, March 29, 2018 2:56 PM
> To: Srinivas, Vidya
> Cc: intel-gfx@lists.freedesktop.org; Lankhorst, Maarten
>
> Subject: Re: [Intel-gfx] [PATCH v18 18/18] drm/i915: Keep plane size mult of
> 4
On Thu, Mar 29, 2018 at 01:36:02PM +0530, Vidya Srinivas wrote:
> As per display WA 1106, to avoid corruption issues
> NV12 plane height needs to be multiplier of 4
> Hence we modify the fb src and destination height
> and width to be multiples of 4. Without this, pipe
> fifo underruns were seen on
Quoting Tvrtko Ursulin (2018-03-29 10:11:28)
> From: Tvrtko Ursulin
>
> Wrong file descriptor was passed to the iterator. This had currently no
> effect, since it wasn't used in the macro, but needs to be fixed.
>
> At the same time make the macro consistent by checking for engine presence
> lik
> -Original Message-
> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
> Sent: Thursday, March 29, 2018 2:19 PM
> To: Srinivas, Vidya ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v18 18/18] drm/i915: Keep plane size mult of
> 4 for NV12
>
> O
Chris Wilson writes:
> As intel_wait_for_register_fw() may use, and if successful only use, a
> busy-wait loop, the might_sleep() warning is a little over-zealous.
> Restrict it to a might_sleep_if() a slow timeout is specified (and so
> the caller authorises use of a usleep).
>
> Signed-off-by:
From: Tvrtko Ursulin
Wrong file descriptor was passed to the iterator. This had currently no
effect, since it wasn't used in the macro, but needs to be fixed.
At the same time make the macro consistent by checking for engine presence
like the other iterators do.
Added __for_each_engine_class_in
== Series Details ==
Series: drm/i915: Avoid sleeping inside per-engine reset
URL : https://patchwork.freedesktop.org/series/40838/
State : success
== Summary ==
Known issues:
Test kms_atomic_transition:
Subgroup 1x-modeset-transitions-nonblocking:
pass -> F
Quoting Tvrtko Ursulin (2018-03-29 09:42:52)
>
> On 27/03/2018 22:01, Chris Wilson wrote:
> > When we include a request's global_seqno in a GEM_TRACE it often helps
> > to know how that relates to the current breadcrumb as seen by the
> > hardware.
> >
> > Signed-off-by: Chris Wilson
> > ---
> >
> Quoting Xiong Zhang (2018-03-29 11:58:41)
> > Four drm_mm_node are used to reserve guest ggtt space, but some of
> > them may aren't initialized and used in intel_vgt_balloon(), so these
> > unused
>
> may be skipped and not initialised due to space constraints,
[Zhang, Xiong Y] OK, I will apply
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