[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Fix memory leak in intel_hdcp auth

== Series Details == Series: series starting with [1/2] drm/i915: Fix memory leak in intel_hdcp auth URL : https://patchwork.freedesktop.org/series/41099/ State : success == Summary == Possible new issues: Test kms_draw_crc: Subgroup draw-method-xrgb-mmap-wc-untiled:

Re: [Intel-gfx] [PATCH v3 24/40] drm/i915: Implement HDCP2.2 repeater authentication

Hi Ramalingam, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on next-20180403] [cannot apply to v4.16] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url

Re: [Intel-gfx] [PATCH v3 4/4] drm/i915/psr: Timestamps for PSR entry and exit interrupts.

On Tue, 2018-04-03 at 14:24 -0700, Dhinakaran Pandiyan wrote: > Timestamps are useful for IGT tests that trigger PSR exit and/or wait > for > PSR entry. > > v2: Removed seqlock (Ville) > Removed erroneous warning in irq loop (Chris) > > Cc: Ville Syrjälä > Cc:

Re: [Intel-gfx] [PATCH v3 3/4] drm/i915/psr: Control PSR interrupts via debugfs

On Tue, 2018-04-03 at 14:24 -0700, Dhinakaran Pandiyan wrote: > Interrupts other than the one for AUX errors are required only for > debug, > so unmask them via debugfs when the user requests debug. > > User can make such a request with > echo 1 > /dri/0/i915_edp_psr_debug > > There are no locks

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Fix memory leak in intel_hdcp auth

== Series Details == Series: series starting with [1/2] drm/i915: Fix memory leak in intel_hdcp auth URL : https://patchwork.freedesktop.org/series/41099/ State : success == Summary == Series 41099v1 series starting with [1/2] drm/i915: Fix memory leak in intel_hdcp auth

[Intel-gfx] [PATCH i-g-t v4] tests/kms_rotation_crc: Move platform checks to one place for non exhaust fence cases

From: Anusha Srivatsa Cleanup the testcases by moving the platform checks to a single function. The earlier version of the path is posted here [1] v2: Make use of the property enums to get the supported rotations v3: Move hardcodings to a single function(Ville) v4:

[Intel-gfx] [PATCH 1/2] drm/i915: Fix memory leak in intel_hdcp auth

Static code analysis tool reported memory leak in intel_hdcp_auth_downstream. Fixing the memory leak. Cc: Anusha Srivatsa Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/intel_hdcp.c | 19 +++ 1 file

[Intel-gfx] [PATCH 2/2] drm/i915: Use int instead of u32 to cache GuC logging level

Static code analysis tool has reported an unused check of log_level<0 when using u32. Use int instead of u32 to store guc_log_level. Cc: Anusha Srivatsa Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/intel_guc.c | 2 +- 1

[Intel-gfx] [RFC PATCH] misc/mei/hdcp: mei_cldev_state_notify_clients() can be static

Fixes: ca998fc3888e ("misc/mei/hdcp: Notifier chain for mei cldev state change") Signed-off-by: Fengguang Wu --- mei_hdcp.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c index

Re: [Intel-gfx] [PATCH v3 12/40] misc/mei/hdcp: Initiate Locality check

Hi Ramalingam, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on next-20180403] [cannot apply to v4.16] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url

Re: [Intel-gfx] [PATCH v3 11/40] misc/mei/hdcp: Store the HDCP Pairing info

Hi Ramalingam, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on next-20180403] [cannot apply to v4.16] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url

Re: [Intel-gfx] [PATCH v3 10/40] misc/mei/hdcp: Verify H_prime

Hi Ramalingam, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on next-20180403] [cannot apply to v4.16] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v3,1/4] drm/i915: Enable edp psr error interrupts on hsw

== Series Details == Series: series starting with [v3,1/4] drm/i915: Enable edp psr error interrupts on hsw URL : https://patchwork.freedesktop.org/series/41095/ State : failure == Summary == Series 41095v1 series starting with [v3,1/4] drm/i915: Enable edp psr error interrupts on hsw

Re: [Intel-gfx] [PATCH v2] drm/i915: Store preemption capability in engine->flags

On 03/04/18 11:35, Chris Wilson wrote: Let's avoid having to delve down the pointer chain to see if the i915 device has support for preemption and store that on the engine, which made the decision in the first place! v2: Refactor common preemption policy between execlists/guc. Signed-off-by:

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/4] drm/i915: Enable edp psr error interrupts on hsw

== Series Details == Series: series starting with [v3,1/4] drm/i915: Enable edp psr error interrupts on hsw URL : https://patchwork.freedesktop.org/series/41095/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7f73ae199d28 drm/i915: Enable edp psr error interrupts on hsw -:109:

Re: [Intel-gfx] [PATCH v3 09/40] misc/mei/hdcp: Verify Receiver Cert and prepare km

Hi Ramalingam, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on next-20180403] [cannot apply to v4.16] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url

[Intel-gfx] [PATCH v3 3/4] drm/i915/psr: Control PSR interrupts via debugfs

Interrupts other than the one for AUX errors are required only for debug, so unmask them via debugfs when the user requests debug. User can make such a request with echo 1 > /dri/0/i915_edp_psr_debug There are no locks to serialize PSR debug enabling from irq_postinstall() and debugfs for

[Intel-gfx] [PATCH v3 4/4] drm/i915/psr: Timestamps for PSR entry and exit interrupts.

Timestamps are useful for IGT tests that trigger PSR exit and/or wait for PSR entry. v2: Removed seqlock (Ville) Removed erroneous warning in irq loop (Chris) Cc: Ville Syrjälä Cc: Rodrigo Vivi Cc: Chris Wilson

[Intel-gfx] [PATCH v3 2/4] drm/i915: Enable edp psr error interrupts on bdw+

From: Ville Syrjälä Plug in the bdw+ irq handling for PSR interrupts. bdw+ supports psr on any transcoder in theory, though the we don't currenty enable PSR except on the EDP transcoder. v2: From DK * Rebased on drm-tip v3: Switched author to Ville based on IRC

[Intel-gfx] [PATCH v3 1/4] drm/i915: Enable edp psr error interrupts on hsw

From: Daniel Vetter The definitions for the error register should be valid on bdw/skl too, but there we haven't even enabled DE_MISC handling yet. Somewhat confusing the the moved register offset on bdw is only for the _CTL/_AUX register, and that _IIR/IMR stayed where

Re: [Intel-gfx] [PATCH v3 08/40] misc/mei/hdcp: Initiate Wired HDCP2.2 Tx Session

Hi Ramalingam, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on next-20180403] [cannot apply to v4.16] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url

Re: [Intel-gfx] [PATCH v3 37/40] drm/i915: Implement the HDCP2.2 support for DP

Hi Ramalingam, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on next-20180403] [cannot apply to v4.16] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url

Re: [Intel-gfx] [PATCH v3 05/40] misc/mei/hdcp: Notifier chain for mei cldev state change

Hi Ramalingam, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on next-20180403] [cannot apply to v4.16] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url

Re: [Intel-gfx] [PATCH v3 20/40] drm/i915: Define HDCP2.2 related variables

Hi Ramalingam, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on next-20180403] [cannot apply to v4.16] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Store preemption capability in engine->flags (rev2)

== Series Details == Series: drm/i915: Store preemption capability in engine->flags (rev2) URL : https://patchwork.freedesktop.org/series/40982/ State : success == Summary == Possible new issues: Test kms_draw_crc: Subgroup draw-method-xrgb-mmap-wc-untiled:

Re: [Intel-gfx] [PATCH v3 37/40] drm/i915: Implement the HDCP2.2 support for DP

Hi Ramalingam, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on next-20180403] [cannot apply to v4.16] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: WARN if we hit a signal from kernel context (rev2)

== Series Details == Series: drm/i915: WARN if we hit a signal from kernel context (rev2) URL : https://patchwork.freedesktop.org/series/41082/ State : warning == Summary == Possible new issues: Test gem_persistent_relocs: Subgroup forked-interruptible: pass

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Store preemption capability in engine->flags (rev2)

== Series Details == Series: drm/i915: Store preemption capability in engine->flags (rev2) URL : https://patchwork.freedesktop.org/series/40982/ State : success == Summary == Series 40982v2 drm/i915: Store preemption capability in engine->flags

[Intel-gfx] ✓ Fi.CI.IGT: success for HDCP1.4 fixes (rev5)

== Series Details == Series: HDCP1.4 fixes (rev5) URL : https://patchwork.freedesktop.org/series/38978/ State : success == Summary == Possible new issues: Test kms_draw_crc: Subgroup draw-method-xrgb-mmap-wc-untiled: skip -> PASS (shard-snb) Test

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: WARN if we hit a signal from kernel context (rev2)

Quoting Patchwork (2018-04-03 19:38:40) > == Series Details == > > Series: drm/i915: WARN if we hit a signal from kernel context (rev2) > URL : https://patchwork.freedesktop.org/series/41082/ > State : success > > == Summary == > > Series 41082v2 drm/i915: WARN if we hit a signal from kernel

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: WARN if we hit a signal from kernel context (rev2)

== Series Details == Series: drm/i915: WARN if we hit a signal from kernel context (rev2) URL : https://patchwork.freedesktop.org/series/41082/ State : success == Summary == Series 41082v2 drm/i915: WARN if we hit a signal from kernel context

[Intel-gfx] [PATCH v2] drm/i915: Store preemption capability in engine->flags

Let's avoid having to delve down the pointer chain to see if the i915 device has support for preemption and store that on the engine, which made the decision in the first place! v2: Refactor common preemption policy between execlists/guc. Signed-off-by: Chris Wilson

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v2 2/2] tests/gem_eio: Add reset and unwedge stress testing

On 03/04/18 11:24, Antonio Argenziano wrote: On 03/04/18 04:36, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Reset and unwedge stress testing is supposed to trigger wedging or resets at incovenient times and then re-use the context so either the context or driver

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v2 2/2] tests/gem_eio: Add reset and unwedge stress testing

On 03/04/18 04:36, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Reset and unwedge stress testing is supposed to trigger wedging or resets at incovenient times and then re-use the context so either the context or driver tracking might get confused and break. v2: *

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: WARN if we hit a signal from kernel context (rev2)

== Series Details == Series: drm/i915: WARN if we hit a signal from kernel context (rev2) URL : https://patchwork.freedesktop.org/series/41082/ State : warning == Summary == $ dim checkpatch origin/drm-tip 92d026855039 drm/i915: WARN if we hit a signal from kernel context -:44:

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: WARN if we hit a signal from kernel context

== Series Details == Series: drm/i915: WARN if we hit a signal from kernel context URL : https://patchwork.freedesktop.org/series/41082/ State : warning == Summary == Series 41082v1 drm/i915: WARN if we hit a signal from kernel context

[Intel-gfx] [PATCH] drm/i915: WARN if we hit a signal from kernel context

After a discussion with Wily I got the nagging feeling we might have some cases of nasty busy loops. The window is fairly small since we always have a non-faulting fastpath (using page_fault_dis|enable()) first, usually followed by a pile of pending signal checks, before we go into the slowpath

Re: [Intel-gfx] [stable:v4.15] drm/i915/dp: Write to SET_POWER dpcd to enable MST hub.

On Tue, 2018-04-03 at 19:40 +0200, Greg KH wrote: > On Tue, Apr 03, 2018 at 10:27:16AM +0300, Jani Nikula wrote: > > > > DK, please start stable backport commit messages with: > > > > commit b1e314462bba76660eec62760bb2e87f28f58866 upstream. Got it, I'll do that next time onwards since Greg

Re: [Intel-gfx] [PATCH 04/11] drm/i915/psr: Remove intel_crtc_state parameter from disable()

On Fri, Mar 30, 2018 at 03:23:29PM -0700, José Roberto de Souza wrote: > It is not necessary as is possible to get the pipe information > from intel_dp. > > Signed-off-by: José Roberto de Souza > Cc: Dhinakaran Pandiyan > Cc: Rodrigo Vivi

[Intel-gfx] [PATCH] drm/i915: WARN if we hit a signal from kernel context

After a discussion with Wily I got the nagging feeling we might have some cases of nasty busy loops. The window is fairly small since we always have a non-faulting fastpath (using page_fault_dis|enable()) first, usually followed by a pile of pending signal checks, before we go into the slowpath

Re: [Intel-gfx] [stable:v4.15] drm/i915/dp: Write to SET_POWER dpcd to enable MST hub.

On Tue, Apr 03, 2018 at 10:27:16AM +0300, Jani Nikula wrote: > > DK, please start stable backport commit messages with: > > commit b1e314462bba76660eec62760bb2e87f28f58866 upstream. Thank you for that, it helped me figure this out... greg k-h ___

[Intel-gfx] ✓ Fi.CI.BAT: success for HDCP1.4 fixes (rev5)

== Series Details == Series: HDCP1.4 fixes (rev5) URL : https://patchwork.freedesktop.org/series/38978/ State : success == Summary == Series 38978v5 HDCP1.4 fixes https://patchwork.freedesktop.org/api/1.0/series/38978/revisions/5/mbox/ Known issues: Test gem_mmap_gtt: Subgroup

Re: [Intel-gfx] [PATCH 06/11] drm/i915/psr: Add intel_psr_activate_block_get()/put()

On Mon, Apr 02, 2018 at 03:11:54PM -0700, Souza, Jose wrote: > On Mon, 2018-04-02 at 11:20 -0700, Rodrigo Vivi wrote: > > On Fri, Mar 30, 2018 at 03:23:31PM -0700, José Roberto de Souza > > wrote: > > > intel_psr_activate_block_get() should be called when by some reason > > > PSR should not be

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v2] intel-gpu-top: Rewrite the tool to be safe to use

On 03/04/2018 15:06, Eero Tamminen wrote: Hi, On 03.04.2018 12:36, Tvrtko Ursulin wrote: On 29/03/2018 15:30, Eero Tamminen wrote: I tested this on HSW GT2, BYT, BDW GT3, SKL GT2 and KBL GT3e, with Ubuntu 16.04 and 17.10, using Ubuntu default kernels (4.4 to 4.13) and latest drm-tip build

Re: [Intel-gfx] [PATCH v3 36/40] drm/i915: Implement gmbus burst read

On Tue, Apr 03, 2018 at 07:27:49PM +0530, Ramalingam C wrote: > Implements a interface for single burst read of data that is larger > than 512 Bytes through gmbus. > > HDCP2.2 spec expects HDCP2.2 transmitter to read 522Bytes of HDCP > receiver certificates in single burst read. On gmbus, to read

[Intel-gfx] [PATCH i-g-t v3] tests/perf_pmu: Avoid RT thread for accuracy test

From: Tvrtko Ursulin Realtime scheduling interferes with execlists submission (tasklet) so try to simplify the PWM loop in a few ways: * Drop RT. * Longer batches for smaller systematic error. * More truthful test duration calculation. * Less clock queries. * No

Re: [Intel-gfx] [PATCH i-g-t v2] tests/perf_pmu: Avoid RT thread for accuracy test

Quoting Tvrtko Ursulin (2018-04-03 17:09:09) > > On 03/04/2018 14:10, Chris Wilson wrote: > > To me it seems like the closed system with each loop being "spin then > > adjusted sleep" will autocorrect and more likely to finish correct (as > > we are less reliant on the next loop for the

Re: [Intel-gfx] [PATCH i-g-t v2] tests/perf_pmu: Avoid RT thread for accuracy test

On 03/04/2018 14:10, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-03 13:38:25) From: Tvrtko Ursulin Realtime scheduling interferes with execlists submission (tasklet) so try to simplify the PWM loop in a few ways: * Drop RT. * Longer batches for smaller

Re: [Intel-gfx] [PATCH v3 05/40] misc/mei/hdcp: Notifier chain for mei cldev state change

On Tue, Apr 03, 2018 at 07:27:18PM +0530, Ramalingam C wrote: > Notifier Chain is defined to inform all its clients about the mei > client device state change. Routine is defined for the clients to > register and unregister for the notification on state change. > > v2: > Rebased. > v3: >

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Add NV12 support (rev7)

HI, Clear idea if caused by changes? > -Original Message- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of > Patchwork > Sent: tiistai 3. huhtikuuta 2018 18.06 > To: Srinivas, Vidya > Cc: intel-gfx@lists.freedesktop.org >

[Intel-gfx] ✗ Fi.CI.IGT: failure for Add NV12 support (rev7)

== Series Details == Series: Add NV12 support (rev7) URL : https://patchwork.freedesktop.org/series/39670/ State : failure == Summary == Possible new issues: Test gem_linear_blits: Subgroup normal: pass -> INCOMPLETE (shard-hsw) Test kms_draw_crc:

Re: [Intel-gfx] [PATCH v4 5/5] i915: add documentation to intel_engine_cs

HI, -Original Message- From: Joonas Lahtinen [mailto:joonas.lahti...@linux.intel.com] - snip - >> >> void(*set_default_submission)(struct intel_engine_cs >> *engine); >> >> + /* In addition to pinning the context, returns the intel_ringbuffer >> +

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Implement HDCP2.2 (rev3)

== Series Details == Series: drm/i915: Implement HDCP2.2 (rev3) URL : https://patchwork.freedesktop.org/series/38254/ State : failure == Summary == CHK include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK include/generated/utsrelease.h CHK

[Intel-gfx] [PATCH v3 40/40] drm/i915: Add HDCP2.2 support for HDMI connectors

On HDMI connector init, intel_hdcp_init is passed with a flag for hdcp2.2 support based on the platform capability. v2: Rebased. v3: No Changes. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_hdmi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)

[Intel-gfx] [PATCH v3 39/40] drm/i915: Add HDCP2.2 support for DP connectors

On DP connector init, intel_hdcp_init is passed with a flag for hdcp2.2 support based on the platform capability. v2: Rebased. v3: No Changes. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_dp.c | 2 +- drivers/gpu/drm/i915/intel_drv.h | 1 +

[Intel-gfx] [PATCH v3 37/40] drm/i915: Implement the HDCP2.2 support for DP

Implements the DP adaptation specific HDCP2.2 functions. These functions perform the DPCD read and write for communicating the HDCP2.2 auth message back and forth. Note: Chris Wilson suggested alternate method for waiting for CP_IRQ, than completions concept. WIP to understand and implement

[Intel-gfx] [PATCH v3 38/40] drm/i915: Implement the HDCP2.2 support for HDMI

Implements the HDMI adapatation specific HDCP2.2 operations. Basically these are DDC read and write for authenticating through HDCP2.2 messages. v2: Rebased. v3: No Changes. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_hdmi.c | 203

[Intel-gfx] [PATCH v3 36/40] drm/i915: Implement gmbus burst read

Implements a interface for single burst read of data that is larger than 512 Bytes through gmbus. HDCP2.2 spec expects HDCP2.2 transmitter to read 522Bytes of HDCP receiver certificates in single burst read. On gmbus, to read more than 511Bytes, HW provides a workaround for burst read. This

[Intel-gfx] [PATCH v3 35/40] drm/i915: Check HDCP 1.4 and 2.2 link on CP_IRQ

On DP HDCP1.4 and 2.2, when CP_IRQ is received, start the link integrity check for the HDCP version that is enabled. v2: Rebased. Function name is changed. v3: No Changes. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_dp.c | 2 +-

[Intel-gfx] [PATCH v3 33/40] drm/i915: Enable HDCP1.4 incase of HDCP2.2 failure

When HDCP2.2 enabling fails and HDCP1.4 is supported, HDCP1.4 is enabled. v2: Rebased. v3: No Changes. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_hdcp.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH v3 34/40] drm/i915: hdcp_check_link only on CP_IRQ

HDCP check link is invoked only on CP_IRQ detection, instead of all short pulses. v3: No Changes. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_dp.c | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git

[Intel-gfx] [PATCH v3 32/40] drm/i915: Enable superior HDCP ver that is capable

Considering that HDCP2.2 is more secure than HDCP1.4, When a setup supports HDCP2.2 and HDCP1.4, HDCP2.2 will be enabled. v2: Included few optimization suggestions [Chris Wilson] Commit message is updated as per the rebased version. v3: No changes. Signed-off-by: Ramalingam C

[Intel-gfx] [PATCH v3 31/40] drm/i915: Schedule hdcp_check_link in _intel_hdcp_enable

As a preparation for making the intel_hdcp_enable as common function for both HDCP1.4 and HDCP2.2, HDCP1.4 check_link scheduling is moved into _intel_hdcp_enable() function. v3: No Changes. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_hdcp.c | 11

[Intel-gfx] [PATCH v3 30/40] drm/i915: Initialize HDCP2.2 and its MEI interface

Initialize HDCP2.2 support. This includes the mei interface initialization along with required notifier registration. v2: mei interface handle is protected with mutex. [Chris Wilson] v3: Notifiers are used for the mei interface state. Signed-off-by: Ramalingam C ---

[Intel-gfx] [PATCH v3 29/40] drm/i915: Pullout the bksv read and validation

For reusability purpose, this patch implements the hdcp1.4 bksv's read and validation as a functions. For detecting the HDMI panel's HDCP capability this fucntions will be used. v2: Rebased. v3: No Changes. Signed-off-by: Ramalingam C ---

[Intel-gfx] [PATCH v3 28/40] drm/i915: Handle HDCP2.2 downstream topology change

When repeater notifies a downstream topology change, this patch reauthenticate the repeater alone with out disabling the hdcp encryption. If that fails then complete reauthentication is executed. v2: Rebased. v3: No Changes. Signed-off-by: Ramalingam C ---

[Intel-gfx] [PATCH v3 27/40] drm/i915: Implement HDCP2.2 link integrity check

Implements the link integrity check once in 500mSec. Once encryption is enabled, an ongoing Link Integrity Check is performed by the HDCP Receiver to check that cipher synchronization is maintained between the HDCP Transmitter and the HDCP Receiver. On the detection of synchronization lost, the

[Intel-gfx] [PATCH v3 25/40] drm/i915: Enable and Disable HDCP2.2 port encryption

Implements the enable and disable functions for HDCP2.2 encryption of the PORT. v2: intel_wait_for_register is used instead of wait_for. [Chris Wilson] v3: No Changes. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_hdcp.c | 54

[Intel-gfx] [PATCH v3 24/40] drm/i915: Implement HDCP2.2 repeater authentication

Implements the HDCP2.2 repeaters authentication steps such as verifying the downstream topology and sending stream management information. v2: Rebased. v3: No Changes. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_hdcp.c | 135

[Intel-gfx] [PATCH v3 26/40] drm/i915: Implement HDCP2.2 En/Dis-able

Implements a sequence of enabling and disabling the HDCP2.2 (auth and encryption). v2: Rebased. v3: No Changes. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_hdcp.c | 75 +++ 1 file changed, 75 insertions(+) diff

[Intel-gfx] [PATCH v3 23/40] drm/i915: Implement HDCP2.2 receiver authentication

Implements HDCP2.2 authentication for hdcp2.2 receivers, with following steps: Authentication and Key enchange (AKE). Locality Check (LC). Session Key Exchange(SKE). DP Errata for stream type confuguration for receivers. At AKE, the HDCP Receiver’s public key

[Intel-gfx] [PATCH v3 20/40] drm/i915: Define HDCP2.2 related variables

For upcoming implementation of HDCP2.2 in I915, important variable required for HDCP2.2 are defined. HDCP_shim is extended to support encoder specific HDCP2.2 flows. v2: 1.4 shim is extended to support hdcp2.2. [Sean Paul] platform's/panel's hdcp ver capability is removed. [Sean Paul] mei

[Intel-gfx] [PATCH v3 19/40] drm/i915: wrapping all hdcp var into intel_hdcp

Considering the upcoming significant no HDCP2.2 variables, it will be clean to have separate struct fo HDCP. New structure called intel_hdcp is introduced. v2: struct hdcp statically allocated. [Sean Paul] enable and disable function parameters are retained.[Sean Paul] v3: No Changes.

[Intel-gfx] [PATCH v3 16/40] misc/mei/hdcp: Verify M_prime

Request to ME to verify the M_Prime received from the HDCP sink. ME FW will calculate the M and compare with M_prime received as part of RepeaterAuth_Stream_Ready, which is HDCP2.2 protocol msg. On successful completion of this stage, downstream propagation of the stream management info is

[Intel-gfx] [PATCH v3 15/40] misc/mei/hdcp: Repeater topology verifcation and ack

Request ot ME to verify the downatream topology information received. ME FW will validate the Repeaters receiver id list and downstream topology. On Success ME FW will provide the Least Significant 128bits of VPrime, which forms the repeater ack. v2: Rebased. v3: cldev is passed as first

[Intel-gfx] [PATCH v3 13/40] misc/mei/hdcp: Verify L_prime

Request to ME to verify the LPrime received from HDCP sink. On Success, ME FW will verify the received Lprime by calculating and comparing with L. This represents the completion of Locality Check. v2: Rebased. v3: cldev is passed as first parameter [Tomas] Redundant comments and cast are

[Intel-gfx] [PATCH v3 12/40] misc/mei/hdcp: Initiate Locality check

Requests ME to start the second stage of HDCP2.2 authentication, called Locality Check. On Success, ME FW will provide LC_Init message to send to hdcp sink. v2: Rebased. v3: cldev is passed as first parameter [Tomas] Redundant comments and cast are removed [Tomas] Signed-off-by:

[Intel-gfx] [PATCH v3 22/40] drm/i915: Wrappers for mei HDCP2.2 services

Adds the wrapper for all mei hdcp2.2 service functions. v2: Rebased. v3: cldev is moved from mei_hdcp_data to hdcp. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_hdcp.c | 194 ++ 1 file changed, 194 insertions(+)

[Intel-gfx] [PATCH v3 18/40] misc/mei/hdcp: Closing wired HDCP2.2 Tx Session

Request the ME to terminate the HDCP2.2 session for a port. On Success, ME FW will mark the intel port as Deauthenticated and terminate the wired HDCP2.2 Tx session started due to the cmd WIRED_INITIATE_HDCP2_SESSION. v2: Rebased. v3: cldev is passed as first parameter [Tomas] Redundant

[Intel-gfx] [PATCH v3 17/40] misc/mei/hdcp: Enabling the HDCP authentication

Request to ME to configure a port as authenticated. On Success, ME FW will mark th eport as authenticated and provides HDCP chiper of the port with the encryption keys. Enabling the Authentication can be requested once the all stages of HDCP2.2 authentication is completed by interating with ME

[Intel-gfx] [PATCH v3 21/40] drm/i915: Define Intel HDCP2.2 registers

Intel HDCP2.2 registers are defined with addr offsets and bit details. v2: Replaced the arith calc with _PICK [Sean Paul] v3: No changes. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/i915_reg.h | 32 1 file changed, 32

[Intel-gfx] [PATCH v3 11/40] misc/mei/hdcp: Store the HDCP Pairing info

Provides Pairing info to ME to store. Pairing is a process to fast track the subsequent authentication with the same HDCP sink. On Success, received HDCP pairing info is stored in non-volatile memory of ME. v2: Rebased. v3: cldev is passed as first parameter [Tomas] Redundant comments and

[Intel-gfx] [PATCH v3 14/40] misc/mei/hdcp: Prepare Session Key

Request to ME to prepare the encrypted session key. On Success, ME provides Encrypted session key. Functions populates the HDCP2.2 authentication msg SKE_Send_Eks. v2: Rebased. v3: cldev is passed as first parameter [Tomas] Redundant comments and cast are removed [Tomas] Signed-off-by:

[Intel-gfx] [PATCH v3 10/40] misc/mei/hdcp: Verify H_prime

Requests for the verifcation of AKE_Send_H_prime. ME will calculation the H and comparing it with received H_Prime. Here AKE_Send_H_prime is a HDCP2.2 Authentication msg. v2: Rebased. v3: cldev is passed as first parameter [Tomas] Redundant comments and cast are removed [Tomas]

[Intel-gfx] [PATCH v3 06/40] misc/mei/hdcp: Define ME FW interface for HDCP2.2

Defines the HDCP specific ME FW interfaces such as Request CMDs, payload structure for CMDs and their response status codes. This patch defines payload size(Excluding the Header)for each WIRED HDCP2.2 CMDs. v2: Rebased. v3: Extra comments are removed. Signed-off-by: Ramalingam C

[Intel-gfx] [PATCH v3 09/40] misc/mei/hdcp: Verify Receiver Cert and prepare km

Requests for verification for receiver certification and also the preparation for next AKE auth message with km. On Success ME FW validate the HDCP2.2 receivers certificate and do the revocation check on the receiver ID. AKE_Stored_Km will be prepared if the receiver is already paired, else

[Intel-gfx] [PATCH v3 07/40] linux/mei: Header for mei_hdcp driver interface

Data structures and Enum for the I915-MEI_HDCP interface are defined at v2: Rebased. v3: mei_cl_device is removed from mei_hdcp_data [Tomas] Signed-off-by: Ramalingam C --- include/linux/mei_hdcp.h | 70 1 file

[Intel-gfx] [PATCH v3 05/40] misc/mei/hdcp: Notifier chain for mei cldev state change

Notifier Chain is defined to inform all its clients about the mei client device state change. Routine is defined for the clients to register and unregister for the notification on state change. v2: Rebased. v3: Notifier chain is adopted for cldev state update [Tomas] Signed-off-by:

[Intel-gfx] [PATCH v3 04/40] misc/mei/hdcp: Client driver for HDCP application

ME FW is contributes a vital role in HDCP2.2 authentication. HDCP2.2 driver needs to communicate to ME FW for each step of the HDCP2.2 authentication. ME FW prepare and HDCP2.2 authentication parameters and encrypt them as per spec. With such parameter Driver prepares HDCP2.2 auth messages and

[Intel-gfx] [PATCH v3 08/40] misc/mei/hdcp: Initiate Wired HDCP2.2 Tx Session

Request ME FW to start the HDCP2.2 session for a intel port. Prepares payloads for command WIRED_INITIATE_HDCP2_SESSION and sent to ME FW. On Success, ME FW will start a HDCP2.2 session for the port and provides the content for HDCP2.2 AKE_Init message. v2: Rebased. v3: cldev is add as a

[Intel-gfx] [PATCH v3 02/40] drm: HDMI and DP specific HDCP2.2 defines

In preparation for implementing HDCP2.2 in I915, this patch adds HDCP register definitions for HDMI and DP HDCP adaptations. HDMI specific HDCP2.2 register definitions are added into drm_hdcp.h, where are HDCP2.2 register offsets in DPCD offsets are defined at drm_dp_helper.h. v2: bit_field

[Intel-gfx] [PATCH v3 01/40] drm: hdcp2.2 authentication msg definitions

This patch defines the hdcp2.2 protocol messages for the HDCP2.2 authentication. v2: bit_fields are removed. Instead bitmasking used. [Tomas and Jani] prefix HDCP_2_2_ is added to the macros. [Tomas] v3: No Changes. Signed-off-by: Ramalingam C ---

[Intel-gfx] [PATCH v3 00/40] drm/i915: Implement HDCP2.2

The sequence for HDCP2.2 authentication and encryption is implemented in I915. Encoder specific implementations are moved into hdcp_shim. Intel HWs supports HDCP2.2 through ME FW. Hence this series introduces a client driver for mei bus, so that for HDCP2.2 authentication, HDCP2.2 stack in I915

[Intel-gfx] [PATCH v3 03/40] mei: bus: whitelist hdcp client

From: Tomas Winkler Whitelist HDCP client for in kernel drm use v2: Rebased. v3: No changes. Signed-off-by: Tomas Winkler --- drivers/misc/mei/bus-fixup.c | 16 1 file changed, 16 insertions(+) diff --git

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v2] intel-gpu-top: Rewrite the tool to be safe to use

Hi, On 03.04.2018 12:36, Tvrtko Ursulin wrote: On 29/03/2018 15:30, Eero Tamminen wrote: I tested this on HSW GT2, BYT, BDW GT3, SKL GT2 and KBL GT3e, with Ubuntu 16.04 and 17.10, using Ubuntu default kernels (4.4 to 4.13) and latest drm-tip build (4.16.0-rc7). General comments

Re: [Intel-gfx] [PATCH v4 1/5] i915.rst: Narration overview on GEM + minor reorder to improve narration

kevin.rogo...@intel.com writes: > From: Kevin Rogovin > > Add a narration to i915.rst about Intel GEN GPU's: engines, > driver context and relocation. > > Signed-off-by: Kevin Rogovin > --- > Documentation/gpu/i915.rst | 116 >

Re: [Intel-gfx] [PATCH v4 1/5] i915.rst: Narration overview on GEM + minor reorder to improve narration

On Tue, 03 Apr 2018, Joonas Lahtinen wrote: > Quoting kevin.rogo...@intel.com (2018-04-03 13:52:23) >> From: Kevin Rogovin >> >> Add a narration to i915.rst about Intel GEN GPU's: engines, >> driver context and relocation. >> >>

Re: [Intel-gfx] [PATCH v4 5/5] i915: add documentation to intel_engine_cs

Quoting kevin.rogo...@intel.com (2018-04-03 13:52:27) > From: Kevin Rogovin > > Add documentation to a number of the function pointer fields of > intel_engine_cs. > > Signed-off-by: Kevin Rogovin > --- > drivers/gpu/drm/i915/intel_ringbuffer.h

Re: [Intel-gfx] [PATCH i-g-t v2] tests/perf_pmu: Avoid RT thread for accuracy test

Quoting Tvrtko Ursulin (2018-04-03 13:38:25) > From: Tvrtko Ursulin > > Realtime scheduling interferes with execlists submission (tasklet) so try > to simplify the PWM loop in a few ways: > > * Drop RT. > * Longer batches for smaller systematic error. > * More

[Intel-gfx] ✓ Fi.CI.BAT: success for Add NV12 support (rev7)

== Series Details == Series: Add NV12 support (rev7) URL : https://patchwork.freedesktop.org/series/39670/ State : success == Summary == Series 39670v7 Add NV12 support https://patchwork.freedesktop.org/api/1.0/series/39670/revisions/7/mbox/ fi-bdw-5557u total:285 pass:264 dwarn:0

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