[Intel-gfx] [PATCH 2/4] drm/i915: Drop DRM_CONTROL_ALLOW

2018-04-19 Thread Daniel Vetter
Control nodes are no more! Signed-off-by: Daniel Vetter Cc: Jani Nikula Cc: Joonas Lahtinen Cc: Rodrigo Vivi Cc: intel-gfx@lists.freedesktop.org --- drivers/gpu/drm/i915/i915_drv.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/dr

[Intel-gfx] [PATCH 3/4] drm/vmwgfx: Drop DRM_CONTROL_ALLOW

2018-04-19 Thread Daniel Vetter
Control nodes are no more! Signed-off-by: Daniel Vetter Cc: VMware Graphics Cc: Sinclair Yeh Cc: Thomas Hellstrom --- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/v

[Intel-gfx] [PATCH 4/4] drm: remove all control node code

2018-04-19 Thread Daniel Vetter
With the ioctl and driver prep done, we can remove everything else. Signed-off-by: Daniel Vetter Cc: Gustavo Padovan Cc: Maarten Lankhorst Cc: Sean Paul Cc: David Airlie --- drivers/gpu/drm/drm_drv.c | 10 -- drivers/gpu/drm/drm_framebuffer.c | 3 +-- drivers/gpu/drm/drm_ioc

[Intel-gfx] [PATCH 1/4] drm: Drop DRM_CONTROL_ALLOW from ioctls

2018-04-19 Thread Daniel Vetter
We've disabled control nodes in commit 8a357d10043c75e980e7fcdb60d2b913491564af Author: Daniel Vetter Date: Fri Oct 28 10:10:50 2016 +0200 drm: Nerf DRM_CONTROL nodes and there was only a minor uapi break that we've paper over with commit 6449b088dd51dd5aa6b38455888bbf538d21f2fc Author:

Re: [Intel-gfx] [PATCH] drm/i915: Wait for vblank after register read

2018-04-19 Thread Mika Kahola
On Thu, 2018-04-19 at 17:09 +0300, Jani Nikula wrote: > On Wed, 18 Apr 2018, Mika Kahola wrote: > > > > When reading out CRC's we  wait for a vblank on > > intel_dp_sink_crc_start() > > function. When we start reading out CRC's in intel_dp_sink_crc() > > loop we > > first wait for a vblank yieldi

[Intel-gfx] [PATCH v6 0/2] Enabling content-type setting for HDMI displays.

2018-04-19 Thread StanLis
From: Stanislav Lisovskiy Added content type setting property to drm_connector(part 1) and enabled transmitting it with HDMI AVI infoframes for i915(part 2). Stanislav Lisovskiy (2): drm: content-type property for HDMI connector i915: content-type property for HDMI connector Documentation/

[Intel-gfx] [PATCH v6 1/2] drm: content-type property for HDMI connector

2018-04-19 Thread StanLis
From: Stanislav Lisovskiy Added content_type property to drm_connector_state in order to properly handle external HDMI TV content-type setting. v2: * Moved helper function which attaches content type property to the drm core, as was suggested. Removed redundant connector state initializat

[Intel-gfx] [PATCH v6 2/2] i915: content-type property for HDMI connector

2018-04-19 Thread StanLis
From: Stanislav Lisovskiy Added encoding of drm content_type property from drm_connector_state within AVI infoframe in order to properly handle external HDMI TV content-type setting. This requires also manipulationg ITC bit, as stated in HDMI spec. v2: * Moved helper function which attaches co

Re: [Intel-gfx] [PATCH] drm/i915/psr: vbt change for psr

2018-04-19 Thread vathsala nagaraju
On Thursday 19 April 2018 07:05 PM, Jani Nikula wrote: On Thu, 19 Apr 2018, vathsala nagaraju wrote: From: Vathsala Nagaraju For psr block #9, the vbt description has moved to options [0-3] for TP1,TP2,TP3 Wakeup time from decimal value without any change to vbt structure. Since spec does not

Re: [Intel-gfx] [RESEND PATCH 1/1] drm/i915/glk: Add MODULE_FIRMWARE for Geminilake

2018-04-19 Thread Ian W MORRISON
On 18 April 2018 at 00:14, Joonas Lahtinen wrote: > Quoting Jani Nikula (2018-04-17 12:02:52) >> On Mon, 16 Apr 2018, "Srivatsa, Anusha" wrote: >> >>-Original Message- >> >>From: Jani Nikula [mailto:jani.nik...@linux.intel.com] >> >>Sent: Wednesday, April 11, 2018 5:27 AM >> >>To: Ian W M

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix drm:intel_enable_lvds ERROR message in kernel log (rev2)

2018-04-19 Thread Patchwork
== Series Details == Series: drm/i915: Fix drm:intel_enable_lvds ERROR message in kernel log (rev2) URL : https://patchwork.freedesktop.org/series/34125/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4070_full -> Patchwork_8757_full = == Summary - WARNING == Minor unknow

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Enable display WA#1183 from its correct spot

2018-04-19 Thread Patchwork
== Series Details == Series: drm/i915: Enable display WA#1183 from its correct spot URL : https://patchwork.freedesktop.org/series/41983/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4070_full -> Patchwork_8756_full = == Summary - WARNING == Minor unknown changes coming

Re: [Intel-gfx] [PATCH v4 1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes

2018-04-19 Thread Yaodong Li
On 04/19/2018 08:45 AM, Michal Wajdeczko wrote: On Wed, 18 Apr 2018 19:01:31 +0200, Jackie Li wrote: After enabled the WOPCM write-once registers locking status checking, reloading of the i915 module will fail with modparam enable_guc set to 3 (enable GuC and HuC firmware loading) if the modu

Re: [Intel-gfx] [PATCH v2] drm/i915/gen11: Preempt-to-idle support in execlists.

2018-04-19 Thread Daniele Ceraolo Spurio
@@ -1010,7 +1033,15 @@ static void execlists_submission_tasklet(unsigned long data) GEN8_CTX_STATUS_PREEMPTED)) execlists_set_active(execlists, EXECLISTS_ACTIVE_HWACK

Re: [Intel-gfx] [PATCH v3 3/4] drm/i915: Add code to accept valid locked WOPCM register values

2018-04-19 Thread Yaodong Li
On 04/19/2018 09:37 AM, Michal Wajdeczko wrote: On Mon, 16 Apr 2018 20:43:39 +0200, Yaodong Li wrote: On 04/13/2018 09:20 PM, Michal Wajdeczko wrote: On Tue, 10 Apr 2018 02:42:19 +0200, Jackie Li wrote: In current code, we only compare the locked WOPCM register values with the calculated

Re: [Intel-gfx] [PATCH v3 2/4] drm/i915: Always set HUC_LOADING_AGENT_GUC bit in WOPCM offset register

2018-04-19 Thread Yaodong Li
On 04/19/2018 08:52 AM, Michal Wajdeczko wrote: On Mon, 16 Apr 2018 19:43:52 +0200, Yaodong Li wrote: On 04/13/2018 07:26 PM, Michal Wajdeczko wrote: On Tue, 10 Apr 2018 02:42:18 +0200, Jackie Li wrote: The enable_guc modparam is used to enable/disable GuC/HuC FW uploading dynamcially du

Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes

2018-04-19 Thread Yaodong Li
On 04/19/2018 08:31 AM, Michal Wajdeczko wrote: On Mon, 16 Apr 2018 19:28:04 +0200, Yaodong Li wrote: On 04/13/2018 07:15 PM, Michal Wajdeczko wrote: On Tue, 10 Apr 2018 02:42:17 +0200, Jackie Li wrote: After enabled the WOPCM write-once registers locking status checking, reloading of th

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Show number of objects without client

2018-04-19 Thread Patchwork
== Series Details == Series: drm/i915: Show number of objects without client URL : https://patchwork.freedesktop.org/series/41977/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4069_full -> Patchwork_8755_full = == Summary - WARNING == Minor unknown changes coming with P

Re: [Intel-gfx] [PATCH v2] drm/i915/fbdev: Enable late fbdev initial configuration

2018-04-19 Thread Souza, Jose
On Thu, 2018-04-19 at 15:50 +0300, Jani Nikula wrote: > On Wed, 18 Apr 2018, José Roberto de Souza > wrote: > > If the initial fbdev configuration(intel_fbdev_initial_config()) > > runs and > > there still no sink connected it will cause > > drm_fb_helper_initial_config() to return 0 as no error h

[Intel-gfx] ✓ Fi.CI.IGT: success for Enabling content-type setting for HDMI displays. (rev4)

2018-04-19 Thread Patchwork
== Series Details == Series: Enabling content-type setting for HDMI displays. (rev4) URL : https://patchwork.freedesktop.org/series/41876/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4069_full -> Patchwork_8753_full = == Summary - SUCCESS == No regressions found. Ex

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/3] drm/i915: Move request->ctx aside

2018-04-19 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915: Move request->ctx aside URL : https://patchwork.freedesktop.org/series/41964/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4068_full -> Patchwork_8752_full = == Summary - FAILURE == Serious unknown cha

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix drm:intel_enable_lvds ERROR message in kernel log (rev2)

2018-04-19 Thread Patchwork
== Series Details == Series: drm/i915: Fix drm:intel_enable_lvds ERROR message in kernel log (rev2) URL : https://patchwork.freedesktop.org/series/34125/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4070 -> Patchwork_8757 = == Summary - SUCCESS == No regressions found.

Re: [Intel-gfx] [PATCH v3 3/4] drm/i915: Add code to accept valid locked WOPCM register values

2018-04-19 Thread Michal Wajdeczko
On Mon, 16 Apr 2018 20:43:39 +0200, Yaodong Li wrote: On 04/13/2018 09:20 PM, Michal Wajdeczko wrote: On Tue, 10 Apr 2018 02:42:19 +0200, Jackie Li wrote: In current code, we only compare the locked WOPCM register values with the calculated values. However, we can continue loading GuC/

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Enable display WA#1183 from its correct spot

2018-04-19 Thread Patchwork
== Series Details == Series: drm/i915: Enable display WA#1183 from its correct spot URL : https://patchwork.freedesktop.org/series/41983/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4070 -> Patchwork_8756 = == Summary - SUCCESS == No regressions found. External URL:

Re: [Intel-gfx] [PATCH] drm/i915: Enable display WA#1183 from its correct spot

2018-04-19 Thread Ville Syrjälä
On Thu, Apr 19, 2018 at 06:51:09PM +0300, Imre Deak wrote: > The DMC FW specific part of display WA#1183 is supposed to be enabled > whenever enabling DC5 or DC6, so move it to the DC6 enable function > from the DC6 disable function. That does make more sense :) Reviewed-by: Ville Syrjälä > >

[Intel-gfx] [PATCH v2] drm/i915: Fix drm:intel_enable_lvds ERROR message in kernel log

2018-04-19 Thread Ville Syrjala
From: Florent Flament Fix `[drm:intel_enable_lvds] *ERROR* timed out waiting for panel to power on` in kernel log at boot time. Toshiba Satellite Z930 laptops needs between 1 and 2 seconds to power on its screen during Intel i915 DRM initialization. This currently results in a `[drm:intel_enable

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gen11: Preempt-to-idle support in execlists. (rev2)

2018-04-19 Thread Patchwork
== Series Details == Series: drm/i915/gen11: Preempt-to-idle support in execlists. (rev2) URL : https://patchwork.freedesktop.org/series/40747/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4068_full -> Patchwork_8751_full = == Summary - WARNING == Minor unknown changes

Re: [Intel-gfx] [PATCH] drm/i915: Show number of objects without client

2018-04-19 Thread Chris Wilson
Quoting Mika Kuoppala (2018-04-19 16:34:27) > Chris Wilson writes: > > > Quoting Mika Kuoppala (2018-04-19 15:16:16) > >> Output the number of objects not tied to a client > >> or to a vma. This amount should be quite small and > >> on oom issues we can rule out significant bo leaks > >> quickly

Re: [Intel-gfx] [PATCH] drm/i915/icl: Adjust BSD2 semantics to mean any second VCS instance

2018-04-19 Thread Bloomfield, Jon
> -Original Message- > From: Intel-gfx On Behalf Of > Joonas Lahtinen > Sent: Wednesday, April 18, 2018 3:43 AM > To: Intel-gfx@lists.freedesktop.org; Tvrtko Ursulin > Subject: Re: [Intel-gfx] [PATCH] drm/i915/icl: Adjust BSD2 semantics to mean > any second VCS instance > > Quoting Tvrtk

Re: [Intel-gfx] [PATCH v3 2/4] drm/i915: Always set HUC_LOADING_AGENT_GUC bit in WOPCM offset register

2018-04-19 Thread Michal Wajdeczko
On Mon, 16 Apr 2018 19:43:52 +0200, Yaodong Li wrote: On 04/13/2018 07:26 PM, Michal Wajdeczko wrote: On Tue, 10 Apr 2018 02:42:18 +0200, Jackie Li wrote: The enable_guc modparam is used to enable/disable GuC/HuC FW uploading dynamcially during i915 module loading. If WOPCM offset regis

[Intel-gfx] [PATCH] drm/i915: Enable display WA#1183 from its correct spot

2018-04-19 Thread Imre Deak
The DMC FW specific part of display WA#1183 is supposed to be enabled whenever enabling DC5 or DC6, so move it to the DC6 enable function from the DC6 disable function. I noticed this after Daniel's patch to remove the unused skl_disable_dc6() function. Fixes: 53421c2fe99c ("drm/i915: Apply Displ

Re: [Intel-gfx] [PATCH v4 1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes

2018-04-19 Thread Michal Wajdeczko
On Wed, 18 Apr 2018 19:01:31 +0200, Jackie Li wrote: After enabled the WOPCM write-once registers locking status checking, reloading of the i915 module will fail with modparam enable_guc set to 3 (enable GuC and HuC firmware loading) if the module was originally loaded with enable_guc set to 1

Re: [Intel-gfx] [PATCH] drm/i915: Show number of objects without client

2018-04-19 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2018-04-19 15:16:16) >> Output the number of objects not tied to a client >> or to a vma. This amount should be quite small and >> on oom issues we can rule out significant bo leaks >> quickly by inspecting these values. Note that we are not >> fully

Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Always do WOPCM partitioning based on real firmware sizes

2018-04-19 Thread Michal Wajdeczko
On Mon, 16 Apr 2018 19:28:04 +0200, Yaodong Li wrote: On 04/13/2018 07:15 PM, Michal Wajdeczko wrote: On Tue, 10 Apr 2018 02:42:17 +0200, Jackie Li wrote: After enabled the WOPCM write-once registers locking status checking, reloading of the i915 module will fail with modparam enable_gu

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Show number of objects without client

2018-04-19 Thread Patchwork
== Series Details == Series: drm/i915: Show number of objects without client URL : https://patchwork.freedesktop.org/series/41977/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4069 -> Patchwork_8755 = == Summary - SUCCESS == No regressions found. External URL: https

Re: [Intel-gfx] [igt-dev] [PATCH igt] igt/gem_ppgtt: Flush the driver to idle before counting leaks

2018-04-19 Thread Tvrtko Ursulin
On 19/04/2018 06:48, Chris Wilson wrote: I have a cunning plan to make the vma open/close lazy to cache frequent reallocations (as buffers are passed between applications, e.g. DRI). However, this will mean that we will not be immediately closing vma and so need to tell the kernel to process the

Re: [Intel-gfx] [PATCH] drm/i915: Show number of objects without client

2018-04-19 Thread Chris Wilson
Quoting Mika Kuoppala (2018-04-19 15:16:16) > Output the number of objects not tied to a client > or to a vma. This amount should be quite small and > on oom issues we can rule out significant bo leaks > quickly by inspecting these values. Note that we are not > fully accurate due to how we take an

Re: [Intel-gfx] [i915] WARNING: CPU: 2 PID: 183 at drivers/gpu/drm/i915/intel_display.c:14584 intel_modeset_init+0x3be/0x1060

2018-04-19 Thread Maarten Lankhorst
Op 19-04-18 om 13:05 schreef Fengguang Wu: > Hi Maarten, > >> What extra dmesg output do you get when you boot with drm.debug=0x1f ? > > Attached is the dmesg with drm.debug=0x1f. > > Thanks, > Fengguang Ah so we're inheriting the FB 2x, once with 1280x1024, other with 1366x768: kern :debug : [

Re: [Intel-gfx] [PATCH v4 6/6] drm/i915: Add skl_check_nv12_surface for NV12

2018-04-19 Thread Maarten Lankhorst
Op 19-04-18 om 13:50 schreef Ville Syrjälä: > On Thu, Apr 19, 2018 at 01:30:32PM +0200, Maarten Lankhorst wrote: >> Op 19-04-18 om 13:22 schreef Ville Syrjälä: >>> On Thu, Apr 19, 2018 at 02:36:42AM +, Srinivas, Vidya wrote: > -Original Message- > From: Ville Syrjälä [

[Intel-gfx] ✓ Fi.CI.IGT: success for Enable NV12 support (rev3)

2018-04-19 Thread Patchwork
== Series Details == Series: Enable NV12 support (rev3) URL : https://patchwork.freedesktop.org/series/41674/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4068_full -> Patchwork_8750_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_8750_full ne

[Intel-gfx] [PATCH] drm/i915: Show number of objects without client

2018-04-19 Thread Mika Kuoppala
Output the number of objects not tied to a client or to a vma. This amount should be quite small and on oom issues we can rule out significant bo leaks quickly by inspecting these values. Note that we are not fully accurate due to how we take and release the locks during transversal of related list

Re: [Intel-gfx] [PATCH] drm/i915: Wait for vblank after register read

2018-04-19 Thread Jani Nikula
On Wed, 18 Apr 2018, Mika Kahola wrote: > When reading out CRC's we wait for a vblank on intel_dp_sink_crc_start() > function. When we start reading out CRC's in intel_dp_sink_crc() loop we > first wait for a vblank yielding that all in all we end up waiting two > vblanks on the first iteration r

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Do NOT skip the first 4k of stolen memory for pre-allocated buffers (rev2)

2018-04-19 Thread Patchwork
== Series Details == Series: drm/i915: Do NOT skip the first 4k of stolen memory for pre-allocated buffers (rev2) URL : https://patchwork.freedesktop.org/series/40929/ State : failure == Summary == Applying: drm/i915: Do NOT skip the first 4k of stolen memory for pre-allocated buffers error:

Re: [Intel-gfx] [PATCH 2/2] drm/i915/dsi: fix dphy param field widths and range checks for chv+

2018-04-19 Thread Jani Nikula
On Thu, 19 Apr 2018, Jani Nikula wrote: > On Thu, 19 Apr 2018, Ville Syrjälä wrote: >> On Thu, Apr 19, 2018 at 11:59:40AM +0300, Jani Nikula wrote: >>> Current CHV and BXT bspec says the dphy param register has four 8-bit >>> fields instead of the smaller VLV field widths. CHV bspec mentions the

Re: [Intel-gfx] [PATCH] drm/i915: Do NOT skip the first 4k of stolen memory for pre-allocated buffers

2018-04-19 Thread Hans de Goede
Hi, On 05-04-18 15:26, Daniel Vetter wrote: On Thu, Apr 5, 2018 at 1:47 PM, Hans de Goede wrote: Hi, On 05-04-18 09:14, Daniel Vetter wrote: On Fri, Mar 30, 2018 at 02:27:15PM +0200, Hans de Goede wrote: Before this commit the WaSkipStolenMemoryFirstPage workaround code was skipping the

Re: [Intel-gfx] [PATCH] drm/i915/psr: vbt change for psr

2018-04-19 Thread Jani Nikula
On Thu, 19 Apr 2018, vathsala nagaraju wrote: > From: Vathsala Nagaraju > > For psr block #9, the vbt description has moved to options [0-3] for > TP1,TP2,TP3 Wakeup time from decimal value without any change to vbt > structure. Since spec does not mention from which VBT version this > change wa

[Intel-gfx] ✓ Fi.CI.BAT: success for Enabling content-type setting for HDMI displays. (rev4)

2018-04-19 Thread Patchwork
== Series Details == Series: Enabling content-type setting for HDMI displays. (rev4) URL : https://patchwork.freedesktop.org/series/41876/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4069 -> Patchwork_8753 = == Summary - SUCCESS == No regressions found. External URL

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enabling content-type setting for HDMI displays. (rev4)

2018-04-19 Thread Patchwork
== Series Details == Series: Enabling content-type setting for HDMI displays. (rev4) URL : https://patchwork.freedesktop.org/series/41876/ State : warning == Summary == $ dim checkpatch origin/drm-tip b77a9ab3cc9a drm: content-type property for HDMI connector -:113: CHECK:PARENTHESIS_ALIGNMENT

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/3] drm/i915: Move request->ctx aside

2018-04-19 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915: Move request->ctx aside URL : https://patchwork.freedesktop.org/series/41964/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Move request->ctx aside Okay! Commit: drm/i915: Move fiddling with eng

[Intel-gfx] ✓ Fi.CI.IGT: success for Enabling content-type setting for HDMI displays. (rev3)

2018-04-19 Thread Patchwork
== Series Details == Series: Enabling content-type setting for HDMI displays. (rev3) URL : https://patchwork.freedesktop.org/series/41876/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4068_full -> Patchwork_8749_full = == Summary - WARNING == Minor unknown changes comin

Re: [Intel-gfx] [PATCH 2/2] drm/i915/dsi: fix dphy param field widths and range checks for chv+

2018-04-19 Thread Jani Nikula
On Thu, 19 Apr 2018, Ville Syrjälä wrote: > On Thu, Apr 19, 2018 at 11:59:40AM +0300, Jani Nikula wrote: >> Current CHV and BXT bspec says the dphy param register has four 8-bit >> fields instead of the smaller VLV field widths. CHV bspec mentions the >> register has changed since K0, but there's

Re: [Intel-gfx] [PATCH v2] drm/i915/fbdev: Enable late fbdev initial configuration

2018-04-19 Thread Jani Nikula
On Wed, 18 Apr 2018, José Roberto de Souza wrote: > If the initial fbdev configuration(intel_fbdev_initial_config()) runs and > there still no sink connected it will cause > drm_fb_helper_initial_config() to return 0 as no error happened(but > internally the return is -EAGAIN). > Because no frameb

Re: [Intel-gfx] [PATCH v5 1/2] drm: content-type property for HDMI connector

2018-04-19 Thread Hans Verkuil
On 04/19/18 14:38, StanLis wrote: > From: Stanislav Lisovskiy > > Added content_type property to drm_connector_state > in order to properly handle external HDMI TV content-type setting. > > v2: > * Moved helper function which attaches content type property >to the drm core, as was suggested

Re: [Intel-gfx] [PATCH v5 2/2] i915: content-type property for HDMI connector

2018-04-19 Thread Hans Verkuil
On 04/19/18 14:38, StanLis wrote: > From: Stanislav Lisovskiy > > Added encoding of drm content_type property from drm_connector_state > within AVI infoframe in order to properly handle external HDMI TV > content-type setting. > > This requires also manipulationg ITC bit, as stated in > HDMI spe

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: Store a pointer to intel_context in i915_request

2018-04-19 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-04-19 13:29:42) > > On 19/04/2018 12:58, Chris Wilson wrote: > > To ease the frequent and ugly pointer dance of > > &request->gem_context->engine[request->engine->id] during request > > submission, store that pointer as request->hw_context. One major > > advantage that

[Intel-gfx] [PATCH v5 2/2] i915: content-type property for HDMI connector

2018-04-19 Thread StanLis
From: Stanislav Lisovskiy Added encoding of drm content_type property from drm_connector_state within AVI infoframe in order to properly handle external HDMI TV content-type setting. This requires also manipulationg ITC bit, as stated in HDMI spec. v2: * Moved helper function which attaches co

[Intel-gfx] [PATCH v5 0/2] Enabling content-type setting for HDMI displays.

2018-04-19 Thread StanLis
From: Stanislav Lisovskiy Added content type setting property to drm_connector(part 1) and enabled transmitting it with HDMI AVI infoframes for i915(part 2). Stanislav Lisovskiy (2): drm: content-type property for HDMI connector i915: content-type property for HDMI connector Documentation/

[Intel-gfx] [PATCH v5 1/2] drm: content-type property for HDMI connector

2018-04-19 Thread StanLis
From: Stanislav Lisovskiy Added content_type property to drm_connector_state in order to properly handle external HDMI TV content-type setting. v2: * Moved helper function which attaches content type property to the drm core, as was suggested. Removed redundant connector state initializat

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915: Move request->ctx aside

2018-04-19 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915: Move request->ctx aside URL : https://patchwork.freedesktop.org/series/41964/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4068 -> Patchwork_8752 = == Summary - SUCCESS == No regressions found. Exte

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: Store a pointer to intel_context in i915_request

2018-04-19 Thread Tvrtko Ursulin
On 19/04/2018 12:58, Chris Wilson wrote: To ease the frequent and ugly pointer dance of &request->gem_context->engine[request->engine->id] during request submission, store that pointer as request->hw_context. One major advantage that we will exploit later is that this decouples the logical conte

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen11: Preempt-to-idle support in execlists. (rev2)

2018-04-19 Thread Patchwork
== Series Details == Series: drm/i915/gen11: Preempt-to-idle support in execlists. (rev2) URL : https://patchwork.freedesktop.org/series/40747/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4068 -> Patchwork_8751 = == Summary - SUCCESS == No regressions found. Externa

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Store a pointer to intel_context in i915_request

2018-04-19 Thread Tvrtko Ursulin
On 19/04/2018 12:10, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-04-19 11:40:06) On 19/04/2018 08:17, Chris Wilson wrote: To ease the frequent and ugly pointer dance of &request->gem_context->engine[request->engine->id] during request submission, store that pointer as request->hw_context

[Intel-gfx] [PATCH v2 2/3] drm/i915: Move fiddling with engine->last_retired_context

2018-04-19 Thread Chris Wilson
Move the knowledge about resetting the current context tracking on the engine from inside i915_gem_context.c into intel_engine_cs.c Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem_context.c | 12 ++-- drivers/gpu/drm/i915/intel_engine_cs.c | 23

[Intel-gfx] [PATCH v2 1/3] drm/i915: Move request->ctx aside

2018-04-19 Thread Chris Wilson
In the next patch, we want to store the intel_context pointer inside i915_request, as it is frequently access via a convoluted dance when submitting the request to hw. Having two context pointers inside i915_request leads to confusion so first rename the existing i915_gem_context pointer to i915_re

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gen11: Preempt-to-idle support in execlists. (rev2)

2018-04-19 Thread Patchwork
== Series Details == Series: drm/i915/gen11: Preempt-to-idle support in execlists. (rev2) URL : https://patchwork.freedesktop.org/series/40747/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/gen11: Preempt-to-idle support in execlists. -drivers/gpu/drm/i915/selftest

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gen11: Preempt-to-idle support in execlists. (rev2)

2018-04-19 Thread Patchwork
== Series Details == Series: drm/i915/gen11: Preempt-to-idle support in execlists. (rev2) URL : https://patchwork.freedesktop.org/series/40747/ State : warning == Summary == $ dim checkpatch origin/drm-tip 8e4bae99c558 drm/i915/gen11: Preempt-to-idle support in execlists. -:107: CHECK:COMPARIS

Re: [Intel-gfx] [PATCH v2] drm/i915/gen11: Preempt-to-idle support in execlists.

2018-04-19 Thread Chris Wilson
Quoting Tomasz Lis (2018-04-19 12:44:48) > The patch adds support of preempt-to-idle requesting by setting a proper > bit within Execlist Control Register, and receiving preemption result from > Context Status Buffer. > > Preemption in previous gens required a special batch buffer to be executed,

[Intel-gfx] [PATCH v2 3/3] drm/i915: Store a pointer to intel_context in i915_request

2018-04-19 Thread Chris Wilson
To ease the frequent and ugly pointer dance of &request->gem_context->engine[request->engine->id] during request submission, store that pointer as request->hw_context. One major advantage that we will exploit later is that this decouples the logical context state from the engine itself. v2: Set mo

Re: [Intel-gfx] [PATCH v4 6/6] drm/i915: Add skl_check_nv12_surface for NV12

2018-04-19 Thread Ville Syrjälä
On Thu, Apr 19, 2018 at 01:30:32PM +0200, Maarten Lankhorst wrote: > Op 19-04-18 om 13:22 schreef Ville Syrjälä: > > On Thu, Apr 19, 2018 at 02:36:42AM +, Srinivas, Vidya wrote: > >> > >> > >> > >>> -Original Message- > >>> From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > >>

[Intel-gfx] [PATCH v2] drm/i915/gen11: Preempt-to-idle support in execlists.

2018-04-19 Thread Tomasz Lis
The patch adds support of preempt-to-idle requesting by setting a proper bit within Execlist Control Register, and receiving preemption result from Context Status Buffer. Preemption in previous gens required a special batch buffer to be executed, so the Command Streamer never preempted to idle dir

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Move request->ctx aside

2018-04-19 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-04-19 11:43:25) > > On 19/04/2018 08:17, Chris Wilson wrote: > > In the next patch, we want to store the intel_context pointer inside > > i915_request, as it is frequently access via a convoluted dance when > > submitting the request to hw. Having two context pointers

Re: [Intel-gfx] [PATCH v3 0/2] Enabling content-type setting for HDMI displays.

2018-04-19 Thread Ville Syrjälä
On Thu, Apr 19, 2018 at 10:58:44AM +0300, StanLis wrote: > From: Stanislav Lisovskiy > > Rev 1: > Added content type setting property to drm_connector(part 1) > and enabled transmitting it with HDMI AVI infoframes > for i915(part 2). > > Rev 2: > Moved helper function which attaches content type

Re: [Intel-gfx] [PATCH v4 6/6] drm/i915: Add skl_check_nv12_surface for NV12

2018-04-19 Thread Maarten Lankhorst
Op 19-04-18 om 13:32 schreef Ville Syrjälä: > On Thu, Apr 19, 2018 at 10:12:56AM +0200, Maarten Lankhorst wrote: >> Op 18-04-18 om 20:35 schreef Ville Syrjälä: >>> On Wed, Apr 18, 2018 at 08:06:57PM +0200, Maarten Lankhorst wrote: Op 18-04-18 om 17:32 schreef Ville Syrjälä: > On Wed, Apr 1

Re: [Intel-gfx] [PATCH v4 6/6] drm/i915: Add skl_check_nv12_surface for NV12

2018-04-19 Thread Ville Syrjälä
On Thu, Apr 19, 2018 at 10:12:56AM +0200, Maarten Lankhorst wrote: > Op 18-04-18 om 20:35 schreef Ville Syrjälä: > > On Wed, Apr 18, 2018 at 08:06:57PM +0200, Maarten Lankhorst wrote: > >> Op 18-04-18 om 17:32 schreef Ville Syrjälä: > >>> On Wed, Apr 18, 2018 at 09:38:13AM +0530, Vidya Srinivas wro

Re: [Intel-gfx] [PATCH v4 6/6] drm/i915: Add skl_check_nv12_surface for NV12

2018-04-19 Thread Maarten Lankhorst
Op 19-04-18 om 13:22 schreef Ville Syrjälä: > On Thu, Apr 19, 2018 at 02:36:42AM +, Srinivas, Vidya wrote: >> >> >> >>> -Original Message- >>> From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] >>> Sent: Thursday, April 19, 2018 12:06 AM >>> To: Maarten Lankhorst >>> Cc: Sriniv

Re: [Intel-gfx] [PATCH v4 6/6] drm/i915: Add skl_check_nv12_surface for NV12

2018-04-19 Thread Ville Syrjälä
On Thu, Apr 19, 2018 at 02:36:42AM +, Srinivas, Vidya wrote: > > > > > > -Original Message- > > > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > > > Sent: Thursday, April 19, 2018 12:06 AM > > > To: Maarten Lankhorst > > > Cc: Srinivas, Vidya ; intel- > > > g...@

Re: [Intel-gfx] [PATCH v2 3/9] drm/i915/psr: Remove intel_crtc_state parameter from disable()

2018-04-19 Thread Ville Syrjälä
On Wed, Apr 18, 2018 at 03:43:05PM -0700, José Roberto de Souza wrote: > It is only used by VLV/CHV and we can get this information from > intel_dp for those platforms. But why? Abusing active_pipe (which is there just for the pps tracking) is not a good idea IMO. > > Signed-off-by: José Roberto

[Intel-gfx] ✓ Fi.CI.BAT: success for Enable NV12 support (rev3)

2018-04-19 Thread Patchwork
== Series Details == Series: Enable NV12 support (rev3) URL : https://patchwork.freedesktop.org/series/41674/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4068 -> Patchwork_8750 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesk

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Store a pointer to intel_context in i915_request

2018-04-19 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-04-19 11:40:06) > > On 19/04/2018 08:17, Chris Wilson wrote: > > To ease the frequent and ugly pointer dance of > > &request->gem_context->engine[request->engine->id] during request > > submission, store that pointer as request->hw_context. One major > > advantage that

Re: [Intel-gfx] [PATCH 2/2] drm/i915/dsi: fix dphy param field widths and range checks for chv+

2018-04-19 Thread Ville Syrjälä
On Thu, Apr 19, 2018 at 11:59:40AM +0300, Jani Nikula wrote: > Current CHV and BXT bspec says the dphy param register has four 8-bit > fields instead of the smaller VLV field widths. CHV bspec mentions the > register has changed since K0, but there's no indication of what exactly > changed. Lacking

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/dsi: improve dphy param limits logging

2018-04-19 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/dsi: improve dphy param limits logging URL : https://patchwork.freedesktop.org/series/41953/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4067_full -> Patchwork_8748_full = == Summary - WARNING == Minor u

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable NV12 support (rev3)

2018-04-19 Thread Patchwork
== Series Details == Series: Enable NV12 support (rev3) URL : https://patchwork.freedesktop.org/series/41674/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5083520a4ee4 drm/i915: Enable display workaround 827 for all planes, v2. -:64: CHECK:PARENTHESIS_ALIGNMENT: Alignment shou

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Move fiddling with engine->last_retired_context

2018-04-19 Thread Tvrtko Ursulin
On 19/04/2018 08:17, Chris Wilson wrote: Move the knowledge about resetting the current context tracking on the engine from inside i915_gem_context.c into intel_engine_cs.c Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem_context.c | 12 ++-- drivers/gpu/drm/i915/intel_

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Move request->ctx aside

2018-04-19 Thread Tvrtko Ursulin
On 19/04/2018 08:17, Chris Wilson wrote: In the next patch, we want to store the intel_context pointer inside i915_request, as it is frequently access via a convoluted dance when submitting the request to hw. Having two context pointers inside i915_request leads to confusion so first rename the

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Store a pointer to intel_context in i915_request

2018-04-19 Thread Tvrtko Ursulin
On 19/04/2018 08:17, Chris Wilson wrote: To ease the frequent and ugly pointer dance of &request->gem_context->engine[request->engine->id] during request submission, store that pointer as request->hw_context. One major advantage that we will exploit later is that this decouples the logical conte

[Intel-gfx] [PATCH v5 1/6] drm/i915: Enable display workaround 827 for all planes, v2.

2018-04-19 Thread Vidya Srinivas
From: Maarten Lankhorst The workaround was applied only to the primary plane, but is required on all planes. Iterate over all planes in the crtc atomic check to see if the workaround is enabled, and only perform the actual toggling in the pre/post plane update functions. Changes since v1: - Trac

[Intel-gfx] [PATCH v5 3/6] drm/i915: Add NV12 as supported format for sprite plane

2018-04-19 Thread Vidya Srinivas
From: Chandra Konduru This patch adds NV12 to list of supported formats for sprite plane. v2: Rebased (me) v3: Review comments by Ville addressed - Removed skl_plane_formats_with_nv12 and added NV12 case in existing skl_plane_formats - Added the 10bpc RGB formats v4: Addressed review comments

[Intel-gfx] [PATCH v5 5/6] drm/i915: Enable Display WA 0528

2018-04-19 Thread Vidya Srinivas
Possible hang with NV12 plane surface formats. WA: When the plane source pixel format is NV12, the CHICKEN_PIPESL_* register bit 22 must be set to 1 and the render decompression must not be enabled on any of the planes in that pipe. v2: removed unnecessary POSTING_READ v3: Added RB from Maarten

[Intel-gfx] [PATCH v5 4/6] drm/i915: Add NV12 support to intel_framebuffer_init

2018-04-19 Thread Vidya Srinivas
From: Chandra Konduru This patch adds NV12 as supported format to intel_framebuffer_init and performs various checks. v2: -Fix an issue in checks added (Chandra Konduru) v3: rebased (me) v4: Review comments by Ville addressed Added platform check for NV12 in intel_framebuffer_init Removed offs

[Intel-gfx] [PATCH v5 6/6] drm/i915: Add skl_check_nv12_surface for NV12

2018-04-19 Thread Vidya Srinivas
From: Maarten Lankhorst We skip src trunction/adjustments for NV12 case and handle the sizes directly. Without this, pipe fifo underruns are seen on APL/KBL. v2: For NV12, making the src coordinates multiplier of 4 v3: Moving all the src coords handling code for NV12 to skl_check_nv12_surface

[Intel-gfx] [PATCH v5 2/6] drm/i915: Add NV12 as supported format for primary plane

2018-04-19 Thread Vidya Srinivas
From: Chandra Konduru This patch adds NV12 to list of supported formats for primary plane v2: Rebased (Chandra Konduru) v3: Rebased (me) v4: Review comments by Ville addressed Removed the skl_primary_formats_with_nv12 and added NV12 case in existing skl_primary_formats v5: Rebased (me) v6: M

[Intel-gfx] [PATCH v5 0/6] Enable NV12 support

2018-04-19 Thread Vidya Srinivas
Enabling NV12 support: - Framebuffer creation - Primary and Sprite plane support Patch series depend on Enable display workaround 827 patch mentioned below submitted by Maarten Changes from prev version: Removed BXT support for NV12 due to WA826 Chandra Konduru (3): drm/i915: Add NV12 as suppor

[Intel-gfx] [PATCH v5 3/6] drm/i915: Add NV12 as supported format for sprite plane

2018-04-19 Thread Vidya Srinivas
From: Chandra Konduru This patch adds NV12 to list of supported formats for sprite plane. v2: Rebased (me) v3: Review comments by Ville addressed - Removed skl_plane_formats_with_nv12 and added NV12 case in existing skl_plane_formats - Added the 10bpc RGB formats v4: Addressed review comments

[Intel-gfx] [PATCH v5 5/6] drm/i915: Enable Display WA 0528

2018-04-19 Thread Vidya Srinivas
Possible hang with NV12 plane surface formats. WA: When the plane source pixel format is NV12, the CHICKEN_PIPESL_* register bit 22 must be set to 1 and the render decompression must not be enabled on any of the planes in that pipe. v2: removed unnecessary POSTING_READ v3: Added RB from Maarten

[Intel-gfx] [PATCH v5 6/6] drm/i915: Add skl_check_nv12_surface for NV12

2018-04-19 Thread Vidya Srinivas
From: Maarten Lankhorst We skip src trunction/adjustments for NV12 case and handle the sizes directly. Without this, pipe fifo underruns are seen on APL/KBL. v2: For NV12, making the src coordinates multiplier of 4 v3: Moving all the src coords handling code for NV12 to skl_check_nv12_surface

[Intel-gfx] [PATCH] drm/i915: Add NV12 support to intel_framebuffer_init

2018-04-19 Thread Vidya Srinivas
From: Chandra Konduru This patch adds NV12 as supported format to intel_framebuffer_init and performs various checks. v2: -Fix an issue in checks added (Chandra Konduru) v3: rebased (me) v4: Review comments by Ville addressed Added platform check for NV12 in intel_framebuffer_init Removed offs

[Intel-gfx] [PATCH v5 2/6] drm/i915: Add NV12 as supported format for primary plane

2018-04-19 Thread Vidya Srinivas
From: Chandra Konduru This patch adds NV12 to list of supported formats for primary plane v2: Rebased (Chandra Konduru) v3: Rebased (me) v4: Review comments by Ville addressed Removed the skl_primary_formats_with_nv12 and added NV12 case in existing skl_primary_formats v5: Rebased (me) v6: M

[Intel-gfx] [PATCH v5 1/6] drm/i915: Enable display workaround 827 for all planes, v2.

2018-04-19 Thread Vidya Srinivas
From: Maarten Lankhorst The workaround was applied only to the primary plane, but is required on all planes. Iterate over all planes in the crtc atomic check to see if the workaround is enabled, and only perform the actual toggling in the pre/post plane update functions. Changes since v1: - Trac

[Intel-gfx] [PATCH v5 0/6] Enable NV12 support

2018-04-19 Thread Vidya Srinivas
Enabling NV12 support: - Framebuffer creation - Primary and Sprite plane support Patch series depend on Enable display workaround 827 patch mentioned below submitted by Maarten Changes from prev version: Removed BXT support for NV12 due to WA826 Chandra Konduru (3): drm/i915: Add NV12 as suppor

Re: [Intel-gfx] [PULL] gvt-next for 4.17

2018-04-19 Thread Zhi Wang
Weird. I try to apply the patches one by one on drm-intel-next-2018-04-13. I didn't get any conflicts... Let me dig more.. On 04/19/18 17:50, Zhi Wang wrote: Thanks, Let me discuss with Zhenyu about how to deal with this. It must be the git rebase I've done which causes the commiter change with

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