[Intel-gfx] [CI 1/2] drm/i915/gtt: Subclass gen6_hw_ppgtt

2018-06-12 Thread Chris Wilson
The legacy gen6 ppgtt needs a little more hand holding than gen8+, and so requires a larger structure. As I intend to make this slightly more complicated in the future, separate the gen6 from the core gen8 hw struct by subclassing. This patch moves the gen6 only features out to gen6_hw_ppgtt and

Re: [Intel-gfx] [PULL] drm-intel-next

2018-06-12 Thread Jani Nikula
On Tue, 12 Jun 2018, Dave Airlie wrote: > On 12 June 2018 at 02:27, Rodrigo Vivi wrote: >> Hi Dave, >> >> This is the first round targeting 4.19. >> > Does this tree feed into linux-next already? > > Since we shouldn't have new stuff for linux-next feeding into it until > after rc1. I think

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3)

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3) URL : https://patchwork.freedesktop.org/series/42459/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4304 -> Patchwork_9268 = == Summary - WARNING == Minor unknown

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3)

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3) URL : https://patchwork.freedesktop.org/series/42459/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3)

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled (rev3) URL : https://patchwork.freedesktop.org/series/42459/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7e66d7400ee9 drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio

[Intel-gfx] [PATCH v3] drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled

2018-06-12 Thread Abhay Kumar
From: Ville Syrjälä CDCLK has to be at least twice the BLCK regardless of audio. Audio driver has to probe using this hook and increase the clock even in absence of any display. v2: Use atomic refcount for get_power, put_power so that we can call each once(Abhay). v3: Reset power well 2 to

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/psr: Adds psrwake options for all platforms

2018-06-12 Thread Patchwork
== Series Details == Series: drm/i915/psr: Adds psrwake options for all platforms URL : https://patchwork.freedesktop.org/series/44601/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4304_full -> Patchwork_9267_full = == Summary - WARNING == Minor unknown changes coming

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