> -Original Message-
> From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> Sent: Friday, June 22, 2018 12:42 AM
> To: Kulkarni, Vandita
> Cc: intel-gfx@lists.freedesktop.org; Lankhorst, Maarten
>
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Enable hw workaround to bypass
> alph
Quoting Zhao Yakui (2018-06-22 07:09:10)
> @@ -2728,6 +2729,7 @@ populate_lr_context(struct i915_gem_context *ctx,
> struct intel_engine_cs *engine,
> struct intel_ring *ring)
> {
> + enum i915_map_type map = HAS_LLC(ctx->i915) ? I915_MAP_WB :
> I915_
== Series Details ==
Series: drm/i915: Use I915_MAP_WC for execlists context buffer on the platforms
without LLC (rev2)
URL : https://patchwork.freedesktop.org/series/45213/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4368 -> Patchwork_9393 =
== Summary - FAILURE ==
S
Quoting Patchwork (2018-06-22 05:24:34)
> == Series Details ==
>
> Series: drm/i915: Use I915_MAP_WC for execlists context buffer on the
> platforms without LLC
> URL : https://patchwork.freedesktop.org/series/45213/
> State : failure
>
> == Summary ==
>
> = CI Bug Log - changes from CI_DRM_4
Quoting Zhao Yakui (2018-06-22 07:09:10)
> Under execlists mode the context buffer is allocated in global Gtt region.
> The I915_MAP_WB type is used to map the buffer so that the driver can
> initialize the context buffer.(Ring reg, Context Ctrl reg and so on).
> And then __context_pin is called to
Under execlists mode the context buffer is allocated in global Gtt region.
The I915_MAP_WB type is used to map the buffer so that the driver can
initialize the context buffer.(Ring reg, Context Ctrl reg and so on).
And then __context_pin is called to flush back corresponding contents.
In fact as it
== Series Details ==
Series: drm/i915/psr: Add psr1 live status (rev2)
URL : https://patchwork.freedesktop.org/series/45143/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4368 -> Patchwork_9392 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://pat
== Series Details ==
Series: drm/i915: Use I915_MAP_WC for execlists context buffer on the platforms
without LLC
URL : https://patchwork.freedesktop.org/series/45213/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4368 -> Patchwork_9391 =
== Summary - FAILURE ==
Serious
== Series Details ==
Series: drm/i915/ddi: Get AUX power domain for DP main link too (rev2)
URL : https://patchwork.freedesktop.org/series/45188/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4363_full -> Patchwork_9388_full =
== Summary - WARNING ==
Minor unknown change
== Series Details ==
Series: drm/i915: Use I915_MAP_WC for execlists context buffer on the platforms
without LLC
URL : https://patchwork.freedesktop.org/series/45213/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e5a2098da0c4 drm/i915: Use I915_MAP_WC for execlists context buf
From: Vathsala Nagaraju
Prints live state of psr1.Extending the existing
PSR2 live state function to cover psr1.
Tested on KBL with psr2 and psr1 panel.
v2: rebase
v3: DK
Rename psr2_live_status to psr_source_status.
v4: DK
Move EDP_PSR_STATUS_STATE_SHIFT below EDP_PSR_STATUS_STATE_MASK
Under execlists mode the context buffer is allocated in global Gtt region.
The I915_MAP_WB type is used to map the buffer so that the driver can
initialize the context buffer.(Ring reg, Context Ctrl reg and so on).
And then __context_pin is called to flush back corresponding contents.
In fact as it
Hi Tarun,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.18-rc1 next-20180621]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com
== Series Details ==
Series: drm/i915: Remove pointless if-else from sdvo code
URL : https://patchwork.freedesktop.org/series/45189/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4362_full -> Patchwork_9387_full =
== Summary - WARNING ==
Minor unknown changes coming with
== Series Details ==
Series: drm/i915/psr: Lockless version of psr_wait_for_idle (rev2)
URL : https://patchwork.freedesktop.org/series/45209/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i915/i
On Thu, 2018-06-21 at 18:03 -0700, Tarun Vyas wrote:
> The PIPEDSL freezes on PSR entry and if PSR hasn't fully exited, then
> the pipe_update_start call schedules itself out to check back later.
>
> On ChromeOS-4.4 kernel, which is fairly up-to-date w.r.t drm/i915 but
> lags w.r.t core kernel cod
On Thu, 2018-06-21 at 18:03 -0700, Tarun Vyas wrote:
> This is a lockless version of the exisiting psr_wait_for_idle().
> We want to wait for PSR to idle out inside intel_pipe_update_start.
> At the time of a pipe update, we should never race with any psr
> enable or disable code, which is a part o
== Series Details ==
Series: series starting with [1/2] drm/i915/ddi: Get AUX power domain for DP
main link too
URL : https://patchwork.freedesktop.org/series/45181/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4362_full -> Patchwork_9385_full =
== Summary - WARNING ==
The PIPEDSL freezes on PSR entry and if PSR hasn't fully exited, then
the pipe_update_start call schedules itself out to check back later.
On ChromeOS-4.4 kernel, which is fairly up-to-date w.r.t drm/i915 but
lags w.r.t core kernel code, hot plugging an external display triggers
tons of "potential
This is a lockless version of the exisiting psr_wait_for_idle().
We want to wait for PSR to idle out inside intel_pipe_update_start.
At the time of a pipe update, we should never race with any psr
enable or disable code, which is a part of crtc enable/disable. So,
we can live w/o taking any psr loc
On Fri, 2018-06-15 at 19:49 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Don't advertize non-exisiting crtcs in the encoder possible_crtcs
> bitmask.
>
How do we end up advertising non-existing CRTCs? encoder->crtc_mask
seems to be populated in the encoder init functions based on possib
On Fri, 2018-06-15 at 21:43 +0300, Ville Syrjälä wrote:
> On Fri, Jun 15, 2018 at 11:33:01AM -0700, Dhinakaran Pandiyan wrote:
> >
> > On Fri, 2018-06-15 at 19:49 +0300, Ville Syrjala wrote:
> > >
> > > From: Ville Syrjälä
> > >
> > > Each fake MST encoder is tied to a specific pipe. Fix the
>
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Paulo Zanoni
>Sent: Monday, May 21, 2018 5:26 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: Zanoni, Paulo R
>Subject: [Intel-gfx] [PATCH 22/24] drm/i915/icl: Update FIA supported lane
>coun
On Tue, Jun 19, 2018 at 02:59:54PM -0700, Tarun Vyas wrote:
> On Tue, Jun 19, 2018 at 02:54:07PM -0700, Dhinakaran Pandiyan wrote:
> > On Tue, 2018-06-19 at 14:27 -0700, Dhinakaran Pandiyan wrote:
> > > On Mon, 2018-05-14 at 13:49 -0700, Tarun Vyas wrote:
> > > >
> > > > The PIPEDSL freezes on PSR
== Series Details ==
Series: drm/i915: Enable hw workaround to bypass alpha (rev2)
URL : https://patchwork.freedesktop.org/series/45173/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4359_full -> Patchwork_9384_full =
== Summary - SUCCESS ==
No regressions found.
==
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Paulo Zanoni
>Sent: Monday, May 21, 2018 5:26 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: Zanoni, Paulo R
>Subject: [Intel-gfx] [PATCH 20/24] drm/i915/icl: implement the tc/legacy HPD
>{d
== Series Details ==
Series: series starting with [v6,1/5] drm/i915/psr: Remove intel_crtc_state
parameter from disable()
URL : https://patchwork.freedesktop.org/series/45200/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4365 -> Patchwork_9389 =
== Summary - SUCCESS ==
== Series Details ==
Series: series starting with [v6,1/5] drm/i915/psr: Remove intel_crtc_state
parameter from disable()
URL : https://patchwork.freedesktop.org/series/45200/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/psr: Remove intel_crtc_state parameter fro
Sink can be configured to calculate the CRC over the static frame and
compare with the CRC calculated and transmited in the VSC SDP by
source, if there is a mismatch sink will do a short pulse in HPD
and set DP_PSR_LINK_CRC_ERROR in DP_PSR_ERROR_STATUS.
Spec: 7723
v6:
andling DP_PSR_LINK_CRC_ERRO
It was only used in VLV/CHV so after the removal of the PSR support
for those platforms it is not necessary any more.
Reviewed-by: Dhinakaran Pandiyan
Cc: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_drv.h | 3 +--
drivers/gpu/drm/i915/intel_psr.c | 5 ++---
Sink will interrupt source when it have any PSR error.
DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR is a PSR2 but already
handling it here.
The only missing error to be handled is DP_PSR_LINK_CRC_ERROR that
will be taken in care in a futher patch.
v6:
not handling DP_PSR_LINK_CRC_ERROR here
v5:
handling al
eDP spec states that sink device will do a short pulse in HPD
line when there is a PSR/PSR2 error that needs to be handled by
source, this is handling the first and most simples error:
DP_PSR_SINK_INTERNAL_ERROR.
Here taking the safest approach and disabling PSR(at least until
the next modeset), t
Specification requires that max time should be masked from bdw and
forward but it can be also safely enabled to hsw.
This will make PSR exits more deterministic and only when really
needed. If this was used to fix a issue in some panel than can
only self-refresh for a few seconds, that panel will i
On Thu, Jun 21, 2018 at 08:43:56PM +0530, Vandita Kulkarni wrote:
> Alpha blending with alpha 0 and 0xff passes through
> alpha math and rounding logic causing differences
> compared to fully transparent or opaque plane,resulting
> in CRC mismatch.
> This WA on icl and above enables hardware to byp
On 6/21/2018 11:43 AM, Kumar, Abhay wrote:
+ Wenkai
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
Abhay Kumar
Sent: Tuesday, June 19, 2018 3:01 PM
To: intel-gfx@lists.freedesktop.org; Syrjala, Ville
Cc: Nikula, Jani
Subject: [Intel-
On Thu, Jun 21, 2018 at 01:28:40PM -0700, Dhinakaran Pandiyan wrote:
> On Thu, 2018-06-21 at 22:54 +0300, Imre Deak wrote:
> > On Thu, Jun 21, 2018 at 01:14:30PM -0700, Dhinakaran Pandiyan wrote:
> > >
> > > On Thu, 2018-06-21 at 21:44 +0300, Imre Deak wrote:
> > > >
> > > > So far we got an AUX
On Thu, 2018-06-21 at 22:54 +0300, Imre Deak wrote:
> On Thu, Jun 21, 2018 at 01:14:30PM -0700, Dhinakaran Pandiyan wrote:
> >
> > On Thu, 2018-06-21 at 21:44 +0300, Imre Deak wrote:
> > >
> > > So far we got an AUX power domain reference only for the duration
> > > of
> > > DP
> > > AUX transfer
On Thu, Jun 21, 2018 at 01:14:30PM -0700, Dhinakaran Pandiyan wrote:
> On Thu, 2018-06-21 at 21:44 +0300, Imre Deak wrote:
> > So far we got an AUX power domain reference only for the duration of
> > DP
> > AUX transfers. However, the following suggests that we also need
> > these
> > for main link
Quoting Ville Syrjala (2018-06-21 18:46:58)
> From: Ville Syrjälä
>
> The return value is a bool so we can just return the result of
> the biwise AND. The compiler will take care of the rest.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Chris Wilson
-Chris
On Thu, 2018-06-21 at 21:44 +0300, Imre Deak wrote:
> So far we got an AUX power domain reference only for the duration of
> DP
> AUX transfers. However, the following suggests that we also need
> these
> for main link functionality:
> - The specification doesn't state whether it's needed or not fo
On Thu, Jun 21, 2018 at 07:00:15PM +0530, Vandita Kulkarni wrote:
> Alpha blending with alpha 0 and 0xff passes through
> alpha math and rounding logic causing differences
> compared to fully transparent or opaque plane,resulting
> in CRC mismatch.
> This WA on icl and above enables hardware to byp
On Thu, 2018-06-21 at 10:04 -0700, Lucas De Marchi wrote:
> On Tue, Jun 19, 2018 at 01:17:10PM -0700, Dhinakaran Pandiyan wrote:
> >
> > On Tue, 2018-06-19 at 08:24 -0700, Lucas De Marchi wrote:
> > >
> > > On Tue, Jun 19, 2018 at 7:06 AM Ville Syrjälä
> > > wrote:
> > > >
> > > >
> > > >
> >
== Series Details ==
Series: drm/i915/ddi: Get AUX power domain for DP main link too (rev2)
URL : https://patchwork.freedesktop.org/series/45188/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4363 -> Patchwork_9388 =
== Summary - SUCCESS ==
No regressions found.
Exter
On Thu, Jun 21, 2018 at 11:54:55AM -0700, Manasi Navare wrote:
> On Thu, Jun 21, 2018 at 09:18:55PM +0300, Imre Deak wrote:
> > On Thu, Jun 21, 2018 at 08:37:15PM +0300, Ville Syrjälä wrote:
> > > On Thu, Jun 21, 2018 at 06:58:29PM +0300, Imre Deak wrote:
> > > > So far we got an AUX power domain r
On Thu, Jun 21, 2018 at 09:18:55PM +0300, Imre Deak wrote:
> On Thu, Jun 21, 2018 at 08:37:15PM +0300, Ville Syrjälä wrote:
> > On Thu, Jun 21, 2018 at 06:58:29PM +0300, Imre Deak wrote:
> > > So far we got an AUX power domain reference only for the duration of DP
> > > AUX transfers. However, the
== Series Details ==
Series: drm/i915: Enable hw workaround to bypass alpha
URL : https://patchwork.freedesktop.org/series/45173/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4359_full -> Patchwork_9383_full =
== Summary - SUCCESS ==
No regressions found.
== Known
So far we got an AUX power domain reference only for the duration of DP
AUX transfers. However, the following suggests that we also need these
for main link functionality:
- The specification doesn't state whether it's needed or not for main
link functionality, but suggests that these power wells
+ Wenkai
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
Abhay Kumar
Sent: Tuesday, June 19, 2018 3:01 PM
To: intel-gfx@lists.freedesktop.org; Syrjala, Ville
Cc: Nikula, Jani
Subject: [Intel-gfx] [PATCH v5] drm/i915: Force 2*96 MHz cdclk
tor 2018-06-21 klockan 19:00 +0530 skrev Vandita Kulkarni:
> Alpha blending with alpha 0 and 0xff passes through
> alpha math and rounding logic causing differences
> compared to fully transparent or opaque plane,resulting
> in CRC mismatch.
> This WA on icl and above enables hardware to bypass alp
== Series Details ==
Series: drm/i915: Remove pointless if-else from sdvo code
URL : https://patchwork.freedesktop.org/series/45189/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4362 -> Patchwork_9387 =
== Summary - SUCCESS ==
No regressions found.
External URL:
htt
On Thu, Jun 21, 2018 at 08:40:45PM +0300, Ville Syrjälä wrote:
> On Thu, Jun 21, 2018 at 06:58:29PM +0300, Imre Deak wrote:
> > So far we got an AUX power domain reference only for the duration of DP
> > AUX transfers. However, the followings suggest that we also need these
> > for main link functi
On Thu, Jun 21, 2018 at 08:37:15PM +0300, Ville Syrjälä wrote:
> On Thu, Jun 21, 2018 at 06:58:29PM +0300, Imre Deak wrote:
> > So far we got an AUX power domain reference only for the duration of DP
> > AUX transfers. However, the followings suggest that we also need these
> > for main link functi
From: Ville Syrjälä
The return value is a bool so we can just return the result of
the biwise AND. The compiler will take care of the rest.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_sdvo.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm
On Thu, Jun 21, 2018 at 06:58:29PM +0300, Imre Deak wrote:
> So far we got an AUX power domain reference only for the duration of DP
> AUX transfers. However, the followings suggest that we also need these
> for main link functionality:
> - The specification doesn't state whether it's needed or not
== Series Details ==
Series: drm/i915/ddi: Get AUX power domain for DP main link too
URL : https://patchwork.freedesktop.org/series/45188/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4362 -> Patchwork_9386 =
== Summary - SUCCESS ==
No regressions found.
External URL
On Thu, Jun 21, 2018 at 06:58:29PM +0300, Imre Deak wrote:
> So far we got an AUX power domain reference only for the duration of DP
> AUX transfers. However, the followings suggest that we also need these
> for main link functionality:
> - The specification doesn't state whether it's needed or not
== Series Details ==
Series: drm/i915/ddi: Get AUX power domain for DP main link too
URL : https://patchwork.freedesktop.org/series/45188/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e686fff14a1c drm/i915/ddi: Get AUX power domain for DP main link too
-:35: WARNING:TYPO_SPELL
Den 21.06.2018 09.14, skrev Daniel Vetter:
On Wed, Jun 20, 2018 at 05:28:10PM +0200, Noralf Trønnes wrote:
Den 20.06.2018 15.52, skrev Noralf Trønnes:
Den 20.06.2018 11.34, skrev Daniel Vetter:
On Mon, Jun 18, 2018 at 04:17:27PM +0200, Noralf Trønnes wrote:
This patchset adds generic fbdev e
== Series Details ==
Series: series starting with [1/2] drm/i915/ddi: Get AUX power domain for DP
main link too
URL : https://patchwork.freedesktop.org/series/45181/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4362 -> Patchwork_9385 =
== Summary - SUCCESS ==
No regres
So far we got an AUX power domain reference only for the duration of DP
AUX transfers. However, the following suggests that we also need these
for main link functionality:
- The specification doesn't state whether it's needed or not for main
link functionality, but suggests that these power wells
On Tue, Jun 19, 2018 at 01:17:10PM -0700, Dhinakaran Pandiyan wrote:
> On Tue, 2018-06-19 at 08:24 -0700, Lucas De Marchi wrote:
> > On Tue, Jun 19, 2018 at 7:06 AM Ville Syrjälä
> > wrote:
> > >
> > >
> > > On Fri, Jun 15, 2018 at 02:51:06PM -0700, Lucas De Marchi wrote:
> > > >
> > > > On Fri
== Series Details ==
Series: series starting with [1/2] drm/i915/ddi: Get AUX power domain for DP
main link too
URL : https://patchwork.freedesktop.org/series/45181/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2fcf2866905b drm/i915/ddi: Get AUX power domain for DP main link
== Series Details ==
Series: drm/i915: read EU powergating status from command streamer
URL : https://patchwork.freedesktop.org/series/45161/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4359_full -> Patchwork_9381_full =
== Summary - SUCCESS ==
No regressions found.
On Thu, Jun 21, 2018 at 07:13:51PM +0300, Ville Syrjälä wrote:
> On Thu, Jun 21, 2018 at 06:58:30PM +0300, Imre Deak wrote:
> > After the previous patch we don't need to get an explicit AUX power
> > reference for PSR functionality, since we hold now an AUX reference
> > whenever the main link is a
== Series Details ==
Series: kernel: Show panic string after panic-notifiers
URL : https://patchwork.freedesktop.org/series/45160/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4359_full -> Patchwork_9380_full =
== Summary - SUCCESS ==
No regressions found.
== Known
On Thu, Jun 21, 2018 at 06:58:30PM +0300, Imre Deak wrote:
> After the previous patch we don't need to get an explicit AUX power
> reference for PSR functionality, since we hold now an AUX reference
> whenever the main link is active on any DP ports.
>
> Cc: Ville Syrjälä
> Cc: Dhinakaran Pandiya
On Tue, Jun 19, 2018 at 05:13:26PM +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [1/2] drm/i915/icl: Fix MG PLL setup when refclk
> is 38.4MHz (rev3)
> URL : https://patchwork.freedesktop.org/series/44836/
> State : failure
Thanks for the reviews pushed both p
== Series Details ==
Series: drm/i915: Enable hw workaround to bypass alpha (rev2)
URL : https://patchwork.freedesktop.org/series/45173/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4359 -> Patchwork_9384 =
== Summary - SUCCESS ==
No regressions found.
External URL:
On Tue, Jun 19, 2018 at 08:24:33AM -0700, Lucas De Marchi wrote:
> On Tue, Jun 19, 2018 at 7:06 AM Ville Syrjälä
> wrote:
> >
> > On Fri, Jun 15, 2018 at 02:51:06PM -0700, Lucas De Marchi wrote:
> > > On Fri, Jun 15, 2018 at 08:58:28PM +0300, Ville Syrjälä wrote:
> > > > On Wed, May 23, 2018 at 11
After the previous patch we don't need to get an explicit AUX power
reference for PSR functionality, since we hold now an AUX reference
whenever the main link is active on any DP ports.
Cc: Ville Syrjälä
Cc: Dhinakaran Pandiyan
Cc: Paulo Zanoni
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i91
So far we got an AUX power domain reference only for the duration of DP
AUX transfers. However, the followings suggest that we also need these
for main link functionality:
- The specification doesn't state whether it's needed or not for main
link functionality, but suggests that these power wells
On Thu, Jun 21, 2018 at 01:00:48AM +, Shaikh, Azhar wrote:
>
>
> >-Original Message-
> >From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> >Sent: Tuesday, June 19, 2018 5:00 AM
> >To: Shaikh, Azhar
> >Cc: Jani Nikula ;
> >intel-gfx@lists.freedesktop.org
> >Subject: Re: [In
Alpha blending with alpha 0 and 0xff passes through
alpha math and rounding logic causing differences
compared to fully transparent or opaque plane,resulting
in CRC mismatch.
This WA on icl and above enables hardware to bypass alpha
math and rounding for per pixel alpha values of 00 and 0xff
v2: F
On Thu, Jun 14, 2018 at 10:48:01PM +, Srivatsa, Anusha wrote:
Overall I don't see any biggest issue with this file and I agree with
most of Michal's comments, specially with the nameless bitfields.
Well, maybe the nameless is a big issue if it breaks compilers out there.
But I'm responding h
sysinfo() doesn't include all reclaimable memory. In particular it
excludes the majority of global_node_page_state(NR_FILE_PAGES),
reclaimable pages that are a copy of on-disk files It seems the only way
to obtain this counter is by parsing /proc/meminfo. For comparison,
check vm_enough_memory() wh
sysinfo() doesn't include all reclaimable memory. In particular it
excludes the majority of global_node_page_state(NR_FILE_PAGES),
reclaimable pages that are a copy of on-disk files It seems the only way
to obtain this counter is by parsing /proc/meminfo. For comparison,
check vm_enough_memory() wh
== Series Details ==
Series: drm/i915: Enable hw workaround to bypass alpha
URL : https://patchwork.freedesktop.org/series/45173/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4359 -> Patchwork_9383 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_93
drm-misc-fixes-2018-06-21:
Fixes for v4.18-rc2:
- A reversion of a commit in drm/sun4i to fix a run-time fault.
- Various fixes to the sii8620 bridge.
- Small bugfix to correctly check stride in atmel-hlcdc.
The following changes since commit c32048d9e93a5ab925d745396c63e7b912147f0a:
drm/bridge/
On Thu, Jun 21, 2018 at 04:03:30PM +0300, Jani Nikula wrote:
> Commit 9504a8924759 ("drm/i915/vlv: Reset the ADPA in
> vlv_display_power_well_init()") started calling intel_crt_reset()
> directly, while we could just as well use the hooks and keep the
> function static.
>
> Cc: Lyude
> Cc: Ville
== Series Details ==
Series: drm/i915: Enable hw workaround to bypass alpha
URL : https://patchwork.freedesktop.org/series/45173/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1c10ad664cb9 drm/i915: Enable hw workaround to bypass alpha
-:27: CHECK:SPACING: spaces preferred arou
On 2018-06-21 08:39, Joonas Lahtinen wrote:
Changelog would be much appreciated. And this is not the first version
of the series. It helps to remind the reviewer that original
implementation was changed into IOCTl based on feedback. Please see the
git log in i915 for some examples.
Will add. I
On 2018-06-21 09:05, Chris Wilson wrote:
Quoting Tomasz Lis (2018-06-20 16:03:07)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 33bc914..c69dc26 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -258,6 +258,57 @@ in
== Series Details ==
Series: drm/i915/crt: make intel_crt_reset() static again
URL : https://patchwork.freedesktop.org/series/45167/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4359 -> Patchwork_9382 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwo
Alpha blending with alpha 0 and 0xff passes through
alpha math and rounding logic causing differences
compared to fully transparent or opaque plane,resulting
in CRC mismatch.
This WA on icl and above enables hardware to bypass alpha
math and rounding for per pixel alpha values of 00 and 0xff
Signe
Quoting Lionel Landwerlin (2018-06-21 14:14:52)
> On 21/06/18 12:54, Chris Wilson wrote:
> > Other than questioning your sanity here at doing this rather than just
> > deleting the debugfs, there's nothing inherently broken. I would do it
> > for gen8 as well, no point leaving the odd one out.
>
>
On 21/06/18 12:54, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-06-21 12:27:12)
Powergating of the EU array is configured as part of the context
image. This seems to imply we need a context to have run before we can
read the slice/subslice/EU powergating status.
This change captures the
Commit 9504a8924759 ("drm/i915/vlv: Reset the ADPA in
vlv_display_power_well_init()") started calling intel_crt_reset()
directly, while we could just as well use the hooks and keep the
function static.
Cc: Lyude
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_crt.c
== Series Details ==
Series: drm/i915: read EU powergating status from command streamer
URL : https://patchwork.freedesktop.org/series/45161/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4359 -> Patchwork_9381 =
== Summary - WARNING ==
Minor unknown changes coming with
Hi Dave, i915 fixes, nothing out of the ordinary.
drm-intel-fixes-2018-06-21:
drm/i915 fixes for v4.18-rc2:
- Mostly cc: stable display fixes, including a DBLSCAN regression fix
- GEM fixes for this merge window
BR,
Jani.
The following changes since commit ce397d215ccd07b8ae3f71db689aedb85d56ab
== Series Details ==
Series: drm/i915: read EU powergating status from command streamer
URL : https://patchwork.freedesktop.org/series/45161/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ce6bc683714c drm/i915: read EU powergating status from command streamer
-:53: CHECK:LINE_S
== Series Details ==
Series: drm/i915: read EU powergating status from command streamer
URL : https://patchwork.freedesktop.org/series/45161/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: read EU powergating status from command streamer
-O:drivers/gpu/drm/i915/i91
Quoting Lionel Landwerlin (2018-06-21 12:27:12)
> Powergating of the EU array is configured as part of the context
> image. This seems to imply we need a context to have run before we can
> read the slice/subslice/EU powergating status.
>
> This change captures the values of the powergating status
== Series Details ==
Series: kernel: Show panic string after panic-notifiers
URL : https://patchwork.freedesktop.org/series/45160/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4359 -> Patchwork_9380 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https
== Series Details ==
Series: drm/i915/psr: Add psr1 live status
URL : https://patchwork.freedesktop.org/series/45143/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4356_full -> Patchwork_9379_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9379
== Series Details ==
Series: kernel: Show panic string after panic-notifiers
URL : https://patchwork.freedesktop.org/series/45160/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
390deb98237f kernel: Show panic string after panic-notifiers
-:36: WARNING:EMBEDDED_FUNCTION_NAME: Pr
Powergating of the EU array is configured as part of the context
image. This seems to imply we need a context to have run before we can
read the slice/subslice/EU powergating status.
This change captures the values of the powergating status registers
from the command streamer to ensure a valid we
A problem we encounter with using ftrace-dump-on-oops is that our
tracing overflows the pstore, losing the vital information of what
caused the panic. Let's print that information after the traces instead
of before so it should end up in the pstore for post-mortem.
Signed-off-by: Chris Wilson
Cc:
== Series Details ==
Series: drm/i915: Redefine EINVAL for debugging
URL : https://patchwork.freedesktop.org/series/45142/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4356_full -> Patchwork_9378_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork
drm-misc-next-2018-06-21:
drm-misc-next for 4.19:
Cross-subsystem Changes:
- fix compile breakage on ION due to the dma-buf cleanups (Christian König)
The following changes since commit daf0678c2036c918f01e4aa6035629d2debc2f30:
Merge branch 'drm-next-4.18' of git://people.freedesktop.org/~agd5f
Quoting Patchwork (2018-06-21 08:51:28)
> Possible fixes
>
> igt@gem_exec_gttfill@basic:
> fi-byt-n2820: FAIL (fdo#106744) -> PASS
Flipper be gone, thanks for the kind review,
-Chris
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