First of all don't try to read dpcd if PSR is not even supported.
But also, if read failed return -EIO instead of reporting via a
backchannel.
Fixes: 5b7b30864d1d ("drm/i915/psr: Split sink status into a separate debugfs
node")
Cc: Chris Wilson
Cc: Dhinakaran Pandiyan
Cc: José Roberto de Souza
On Thu, 2018-07-19 at 07:18 +0100, Chris Wilson wrote:
> Quoting Dhinakaran Pandiyan (2018-07-05 01:31:21)
> >
> > This allows to read i915_edp_psr_status from tests without
> > triggering
> > any AUX communication. Take this opportunity to move this under the
> > eDP-1 connector directory as the
Quoting Dhinakaran Pandiyan (2018-07-05 01:31:21)
> This allows to read i915_edp_psr_status from tests without triggering
> any AUX communication. Take this opportunity to move this under the
> eDP-1 connector directory as the status we print is of the sink.
>
> Cc: Rodrigo Vivi
> Cc: José Robert
On Wed, 18 Jul 2018 22:54:35 +0200,
Pierre-Louis Bossart wrote:
>
>
>
> On 07/17/2018 04:26 AM, Takashi Iwai wrote:
> > Hi,
> >
> > this is a preliminiary patch set to convert the existing i915 /
> > HD-audio component binding to be applicable to other drivers like
> > radeon / amdgpu. This pat
On Wed, Jul 18, 2018 at 10:19:43AM -0700, Dhinakaran Pandiyan wrote:
> We are too late in the enabling sequence to back out cleanly, not updating
> state tracking variables, like intel_dp->active_mst_links in this
> instance, results in incorrect behaviour further along.
I agree with you, although
On Wed, Jul 18, 2018 at 03:34:05PM -0700, Rodrigo Vivi wrote:
> On Wed, Jul 18, 2018 at 03:06:45PM -0700, Srivatsa, Anusha wrote:
> >
> >
> > >-Original Message-
> > >From: Vivi, Rodrigo
> > >Sent: Wednesday, July 18, 2018 1:54 PM
> > >To: Navare, Manasi D
> > >Cc: Srivatsa, Anusha ; Nik
On Tue, Jul 17, 2018 at 02:49:38PM -0700, matthew.s.atw...@intel.com wrote:
> From: Matt Atwood
>
> This bit was added to DP Training Aux RD interval sometime between DP
> 1.2 and DP 1.3. Via description of the spec this field indicates the
> panels true capabilities are described in DPCD address
On Wed, Jul 18, 2018 at 03:06:45PM -0700, Srivatsa, Anusha wrote:
>
>
> >-Original Message-
> >From: Vivi, Rodrigo
> >Sent: Wednesday, July 18, 2018 1:54 PM
> >To: Navare, Manasi D
> >Cc: Srivatsa, Anusha ; Nikula, Jani
> >; intel-gfx@lists.freedesktop.org
> >Subject: Re: [Intel-gfx] [PA
== Series Details ==
Series: drm/i915: Cache the error string (rev3)
URL : https://patchwork.freedesktop.org/series/46777/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4505_full -> Patchwork_9710_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork
>-Original Message-
>From: Vivi, Rodrigo
>Sent: Wednesday, July 18, 2018 1:54 PM
>To: Navare, Manasi D
>Cc: Srivatsa, Anusha ; Nikula, Jani
>; intel-gfx@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915/icl: Add VIDEO_DIP regsiters
>
>On Wed, Jul 18, 2018 at 11:53:54AM
On Mon, Jul 16, 2018 at 04:22:15PM -0700, Rodrigo Vivi wrote:
> On Mon, Jul 16, 2018 at 04:05:52PM -0700, Paulo Zanoni wrote:
> > Em Seg, 2018-07-16 às 15:47 -0700, Rodrigo Vivi escreveu:
> > > On Fri, Jul 13, 2018 at 03:57:45PM -0700, Paulo Zanoni wrote:
> > > > Em Sex, 2018-07-13 às 14:08 -0700,
On Wed, Jul 18, 2018 at 02:30:18PM -0700, Dhinakaran Pandiyan wrote:
> On Wed, 2018-07-18 at 13:31 -0700, Manasi Navare wrote:
> > On Wed, Jul 18, 2018 at 01:34:12PM -0700, Dhinakaran Pandiyan wrote:
> > >
> > > On Wed, 2018-07-18 at 10:45 -0700, Manasi Navare wrote:
> > > >
> > > > On Wed, Jul 1
On Wed, 2018-07-18 at 13:31 -0700, Manasi Navare wrote:
> On Wed, Jul 18, 2018 at 01:34:12PM -0700, Dhinakaran Pandiyan wrote:
> >
> > On Wed, 2018-07-18 at 10:45 -0700, Manasi Navare wrote:
> > >
> > > On Wed, Jul 18, 2018 at 10:19:42AM -0700, Dhinakaran Pandiyan
> > > wrote:
> > > >
> > > >
>
On Wed, Jul 18, 2018 at 01:03:59PM +0300, Ville Syrjälä wrote:
> On Tue, Jul 17, 2018 at 01:00:25PM -0700, Rodrigo Vivi wrote:
> > On Tue, Jul 17, 2018 at 08:42:15PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > We never registered any kind of lid notifier for eDP, so looking
On 07/17/2018 04:26 AM, Takashi Iwai wrote:
Hi,
this is a preliminiary patch set to convert the existing i915 /
HD-audio component binding to be applicable to other drivers like
radeon / amdgpu. This patchset itself doesn't change the
functionality but only renames and split to a new drm_audi
On Wed, Jul 18, 2018 at 11:53:54AM -0700, Manasi Navare wrote:
> On Tue, Jul 17, 2018 at 02:10:58PM -0700, Anusha Srivatsa wrote:
> > From: "Srivatsa, Anusha"
> >
> > The Picture Parameter Set metadata for DSC has to be sent
> > to the panel through secondary data packets. Add the error
> > corre
On Wed, Jul 18, 2018 at 10:19:42AM -0700, Dhinakaran Pandiyan wrote:
> The short pulse handler checks if channel equalization is okay and
> goes onto retrain a link if there are active MST links. This retraining
> path is not meant for new MST connections, but due to a bug elsewhere, if
> active_ms
== Series Details ==
Series: drm/i915: Cache the error string (rev3)
URL : https://patchwork.freedesktop.org/series/46777/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4505 -> Patchwork_9710 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9710 need
On Wed, Jul 18, 2018 at 01:34:12PM -0700, Dhinakaran Pandiyan wrote:
> On Wed, 2018-07-18 at 10:45 -0700, Manasi Navare wrote:
> > On Wed, Jul 18, 2018 at 10:19:42AM -0700, Dhinakaran Pandiyan wrote:
> > >
> > > The short pulse handler checks if channel equalization is okay and
> > > goes onto ret
== Series Details ==
Series: drm/i915: Cache the error string (rev3)
URL : https://patchwork.freedesktop.org/series/46777/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Cache the error string
+drivers/gpu/drm/i915/i915_gpu_error.c:842:25: warning: Using plain inte
Currently, we convert the error state into a string every time we read
from sysfs (and sysfs reads in page size (4KiB) chunks). We do try to
window the string and only capture the portion that is being read, but
that means that we must always convert up to the window to find the
start. For a very l
On 7/18/2018 2:45 AM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Just forget about earlier request_in events.
Signed-off-by: Tvrtko Ursulin
---
scripts/trace.pl | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/scripts/trace.pl b/scripts/trace.pl
index 60d42865acbd..41
On Wed, 2018-07-18 at 10:45 -0700, Manasi Navare wrote:
> On Wed, Jul 18, 2018 at 10:19:42AM -0700, Dhinakaran Pandiyan wrote:
> >
> > The short pulse handler checks if channel equalization is okay and
> > goes onto retrain a link if there are active MST links. This
> > retraining
> > path is not
Hi Dave,
Another round for 4.19. Fixes the build issue for sun4i. Many fixes and
improvements, most interesting thing is probably the DisplayPort
CEC-Tunneling-over-AUX support. Please pull, thanks.
drm-misc-next-2018-07-18:
drm-misc-next for 4.19:
Core Changes:
- add support for DisplayPort CEC
On 7/18/2018 2:45 AM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
It is possible to customize the axis display so change it to display
timestamps in seconds on the major axis (with six decimal spaces) and
millisecond offsets on the minor axis.
v2:
* Give up on broken relative timestamps.
v3:
On Wed, Jul 18, 2018 at 12:21:13PM -0700, Dhinakaran Pandiyan wrote:
> On Thu, 2018-07-05 at 14:25 -0700, Rodrigo Vivi wrote:
> > On Thu, Jul 05, 2018 at 02:11:45PM -0700, Dhinakaran Pandiyan wrote:
> > >
> > > On Thursday, July 5, 2018 12:25:28 PM PDT Rodrigo Vivi wrote:
> > > >
> > > > It was o
On Thu, 2018-07-05 at 14:25 -0700, Rodrigo Vivi wrote:
> On Thu, Jul 05, 2018 at 02:11:45PM -0700, Dhinakaran Pandiyan wrote:
> >
> > On Thursday, July 5, 2018 12:25:28 PM PDT Rodrigo Vivi wrote:
> > >
> > > It was originally introduced following the VESA spec in order to
> > > validate
> > > PSR
On Tue, Jul 17, 2018 at 02:11:01PM -0700, Anusha Srivatsa wrote:
> From: "Srivatsa, Anusha"
>
> RC model has these parameters that correspond with each of
> 15 ranges of RC buffer threshold value in the RC model.
> The three elements are range_min_qp, range_max_qp and
> range_bpg_offset.
>
> Add
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/mst: Do not retrain new links
URL : https://patchwork.freedesktop.org/series/46797/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4504_full -> Patchwork_9709_full =
== Summary - FAILURE ==
Serious unknow
On Tue, Jul 17, 2018 at 02:10:59PM -0700, Anusha Srivatsa wrote:
> From: "Srivatsa, Anusha"
>
> Display Stream Compression(DSC) has a set of Picture
> Parameter Set(PPS) components that the encoder must
> communicate to the decoder.
>
> This patch adds register definitions to
> the PPS parameter
On Tue, Jul 17, 2018 at 02:10:58PM -0700, Anusha Srivatsa wrote:
> From: "Srivatsa, Anusha"
>
> The Picture Parameter Set metadata for DSC has to be sent
> to the panel through secondary data packets. Add the error
> correction registers, data registers and control registers
> for the same.
>
>
On Wed, Jul 18, 2018 at 10:19:43AM -0700, Dhinakaran Pandiyan wrote:
> We are too late in the enabling sequence to back out cleanly, not updating
> state tracking variables, like intel_dp->active_mst_links in this
> instance, results in incorrect behaviour further along.
>
> v2: Fixed int v/s bool
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/mst: Do not retrain new links
URL : https://patchwork.freedesktop.org/series/46797/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4504 -> Patchwork_9709 =
== Summary - WARNING ==
Minor unknown changes co
On Wed, Jul 18, 2018 at 10:19:42AM -0700, Dhinakaran Pandiyan wrote:
> The short pulse handler checks if channel equalization is okay and
> goes onto retrain a link if there are active MST links. This retraining
> path is not meant for new MST connections, but due to a bug elsewhere, if
> active_ms
The short pulse handler checks if channel equalization is okay and
goes onto retrain a link if there are active MST links. This retraining
path is not meant for new MST connections, but due to a bug elsewhere, if
active_mst_links is < 0 the boolean check for active_mst_links passes and
we proceed t
We are too late in the enabling sequence to back out cleanly, not updating
state tracking variables, like intel_dp->active_mst_links in this
instance, results in incorrect behaviour further along.
v2: Fixed int v/s bool comparison
Cc: Ville Syrjälä
Cc: Rodrigo Vivi
Cc: Nathan Ciobanu
Signed-of
== Series Details ==
Series: drm/i915: Kill sink_crc for good
URL : https://patchwork.freedesktop.org/series/46039/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4504_full -> Patchwork_9708_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9708_f
On Tue, Jul 17, 2018 at 3:59 AM, Dmitry Safonov wrote:
> I would be glad if someone helps/bothers to review the change :C
>
Perhaps Petr and / or Steven can help you.
> Thanks,
> Dmitry
>
> On Tue, 2018-07-03 at 23:56 +0100, Dmitry Safonov wrote:
>> Currently ratelimit_state is protected with sp
> -Original Message-
> From: Intel-gfx On Behalf Of
> Tvrtko Ursulin
> Sent: Thursday, June 14, 2018 1:29 AM
> To: Joonas Lahtinen ; Chris Wilson
> ; Landwerlin, Lionel G
> ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v9 7/7] drm/i915: add a sysfs entry to let
> use
== Series Details ==
Series: drm/i915: Kill sink_crc for good
URL : https://patchwork.freedesktop.org/series/46039/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4504 -> Patchwork_9708 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.fr
On 2018-07-18 16:42, Tvrtko Ursulin wrote:
On 18/07/2018 14:24, Joonas Lahtinen wrote:
Quoting Tomasz Lis (2018-07-16 16:07:16)
+static int emit_set_data_port_coherency(struct i915_request *rq,
bool enable)
+{
+ u32 *cs;
+ i915_reg_t reg;
+
+ GEM_BUG_ON(rq->engine->class !
On 18/07/2018 14:25, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-07-18 13:53:16)
On 17/07/2018 09:41, Chris Wilson wrote:
If the driver is wedged, we skip idling the GPU. However, we may still
have a few requests still not retired following the wedging (since they
will be waiting for a b
== Series Details ==
Series: drm/i915/execlists: Check active for idleness before running tasklet
URL : https://patchwork.freedesktop.org/series/46787/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4504 -> Patchwork_9707 =
== Summary - FAILURE ==
Serious unknown changes
On 18/07/2018 14:24, Joonas Lahtinen wrote:
Quoting Tomasz Lis (2018-07-16 16:07:16)
+static int emit_set_data_port_coherency(struct i915_request *rq, bool enable)
+{
+ u32 *cs;
+ i915_reg_t reg;
+
+ GEM_BUG_ON(rq->engine->class != RENDER_CLASS);
+ GEM_BUG_ON(INTEL_GEN(r
On Wed, Jul 18, 2018 at 01:15:40PM +0300, Ville Syrj?l? wrote:
Hi Ville,
> On Tue, Jul 17, 2018 at 06:13:46PM +0100, Ayan Kumar Halder wrote:
> > drm_format_info table has a field 'is_yuv' to denote if the format
> > is yuv or not. The driver is expected to use this instead of
> > having a functio
== Series Details ==
Series: drm/i915: Cache the error string (rev2)
URL : https://patchwork.freedesktop.org/series/46777/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4503_full -> Patchwork_9704_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107274
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_lrc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index db5351e6a3a5..6921406a7250 1
You are right about the AUR. This is just a step into opensource community
direction.
According to my previous answer about ClearLinux (and others), which is more
important here. We are still coordinating this, but I think we are on the right
path. And NEO can be considered as opensource client
Quoting Tvrtko Ursulin (2018-07-18 13:53:16)
>
> On 17/07/2018 09:41, Chris Wilson wrote:
> > If the driver is wedged, we skip idling the GPU. However, we may still
> > have a few requests still not retired following the wedging (since they
> > will be waiting for a background worker trying to acq
Quoting Tomasz Lis (2018-07-16 16:07:16)
> +static int emit_set_data_port_coherency(struct i915_request *rq, bool enable)
> +{
> + u32 *cs;
> + i915_reg_t reg;
> +
> + GEM_BUG_ON(rq->engine->class != RENDER_CLASS);
> + GEM_BUG_ON(INTEL_GEN(rq->i915) < 9);
> +
> + cs =
Hi Daniel,
Am 18.07.2018 um 14:07 schrieb Patchwork:
== Series Details ==
Series: series starting with [1/4] dma-buf: add caching of sg_table
URL : https://patchwork.freedesktop.org/series/46778/
State : failure
[SNIP]
it looks like I'm a step further understanding the problems which come
Quoting Dunajski, Bartosz (2018-06-22 19:40:58)
> Additionally, we are already on Arch:
> https://aur.archlinux.org/packages/compute-runtime
I'm not an Arch user myself, but my impression is that AUR [1] is equivalent
of Ubuntu's PPA where anybody can very much upload anything outside of
the supp
Quoting Lis, Tomasz (2018-06-21 16:47:45)
> On 2018-06-21 08:39, Joonas Lahtinen wrote:
> > Quoting Tomasz Lis (2018-06-20 18:03:07)
> >> int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
> >> struct drm_file *file)
> >> {
> >> +
On 17/07/2018 09:41, Chris Wilson wrote:
If the driver is wedged, we skip idling the GPU. However, we may still
have a few requests still not retired following the wedging (since they
will be waiting for a background worker trying to acquire struct_mutex).
As we hold the struct_mutex, always do
Hi,
On 7/18/2018 5:34 PM, Ville Syrjälä wrote:
On Sat, Jul 14, 2018 at 07:40:43PM +0530, Kumar, Mahesh wrote:
Hi,
Thanks for review.
On 7/13/2018 8:27 PM, Ville Syrjälä wrote:
On Fri, Jul 13, 2018 at 07:41:24PM +0530, Mahesh Kumar wrote:
Memory with 16GB dimms require an increase of 1us i
== Series Details ==
Series: series starting with [v2,1/5] drm/i915/guc: Fix GuC pin bias and WOPCM
initialization order
URL : https://patchwork.freedesktop.org/series/46783/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4503 -> Patchwork_9706 =
== Summary - FAILURE ==
Quoting Jakub Bartmiński (2018-07-18 12:54:10)
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c
> b/drivers/gpu/drm/i915/intel_lrc.c
> index 35d37af0cb9a..7a3c8921f688 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1363,8 +1363,8 @@ static int __conte
Hi,
On 7/18/2018 5:33 PM, Ville Syrjälä wrote:
On Sat, Jul 14, 2018 at 07:42:17PM +0530, Kumar, Mahesh wrote:
On 7/13/2018 8:21 PM, Ville Syrjälä wrote:
On Fri, Jul 13, 2018 at 07:41:21PM +0530, Mahesh Kumar wrote:
This series adds support to calculate system memdev parameters and calculate
== Series Details ==
Series: series starting with [v2,1/5] drm/i915/guc: Fix GuC pin bias and WOPCM
initialization order
URL : https://patchwork.freedesktop.org/series/46783/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/guc: Fix GuC pin bias and WOPCM initializat
Quoting Jakub Bartmiński (2018-07-18 12:54:09)
> +u32 intel_guc_ggtt_offset(struct intel_guc *guc, struct i915_vma *vma)
> +{
> + struct drm_i915_private *i915 = guc_to_i915(guc);
Unused i915 if you disable debug.
> +
> + u32 offset = i915_ggtt_offset(vma);
> +
> + GEM_BUG_ON(of
== Series Details ==
Series: series starting with [1/4] dma-buf: add caching of sg_table
URL : https://patchwork.freedesktop.org/series/46778/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4503 -> Patchwork_9705 =
== Summary - FAILURE ==
Serious unknown changes coming wi
On Sat, Jul 14, 2018 at 07:40:43PM +0530, Kumar, Mahesh wrote:
> Hi,
>
> Thanks for review.
>
>
> On 7/13/2018 8:27 PM, Ville Syrjälä wrote:
> > On Fri, Jul 13, 2018 at 07:41:24PM +0530, Mahesh Kumar wrote:
> >> Memory with 16GB dimms require an increase of 1us in level-0 latency.
> >> This patc
On Sat, Jul 14, 2018 at 07:42:17PM +0530, Kumar, Mahesh wrote:
>
>
> On 7/13/2018 8:21 PM, Ville Syrjälä wrote:
> > On Fri, Jul 13, 2018 at 07:41:21PM +0530, Mahesh Kumar wrote:
> >> This series adds support to calculate system memdev parameters and
> >> calculate
> > What's "memdev"?
> memory d
From: Michal Wajdeczko
Signed-off-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index aebe0469ddaa..3e4e128237ac 100644
--- a/drivers/gpu/dr
It would seem that we are using uninitialized WOPCM variables when
setting the GuC pin bias. The pin bias has to be set after the WOPCM,
but before the call to i915_gem_contexts_init where the first contexts
are pinned so the safest place to set it seems to be right after
initializing the relevant
Removing the pin bias from GuC allows us to not check for GuC every time
we pin a context, which fixes the assertion error on unresolved GuC
platform default in mock contexts selftest.
With this change the intel_guc_ggtt_offset function has to know the full
declaration of the drm_i915_private stru
Since ggtt_offset_bias is now stored in ggtt.pin_bias, it is duplicated
inside i915_gem_context, and can instead be accessed directly from ggtt.
Signed-off-by: Jakub Bartmiński
Cc: Chris Wilson
Cc: Michał Winiarski
Cc: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_gem_context.c | 2 --
drive
Signed-off-by: Jakub Bartmiński
Cc: Chris Wilson
Cc: Michał Winiarski
Cc: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_gem.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ed2be33ec58a..dd170a293d05 100644
---
== Series Details ==
Series: series starting with [1/4] dma-buf: add caching of sg_table
URL : https://patchwork.freedesktop.org/series/46778/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6172482908fe dma-buf: add caching of sg_table
5d400e5a92be drm: remove prime sg_table cac
== Series Details ==
Series: drm/i915: Cache the error string (rev2)
URL : https://patchwork.freedesktop.org/series/46777/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4503 -> Patchwork_9704 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9704 need
== Series Details ==
Series: drm/i915: Cache the error string (rev2)
URL : https://patchwork.freedesktop.org/series/46777/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Cache the error string
+drivers/gpu/drm/i915/i915_sysfs.c:529:15: warning: expression using
si
== Series Details ==
Series: drm/i915: Cache the error string
URL : https://patchwork.freedesktop.org/series/46777/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4503 -> Patchwork_9703 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9703 need to be
Only pm_rpm still uses the igt_trash_aperture() and so we can remove it
from the lib and in the process convert it over from the legacy
libdrm_intel.
Signed-off-by: Chris Wilson
Cc: Michał Winiarski
---
lib/igt_aux.c | 57 --
lib/igt_aux.h | 10
On Fri, Jul 13, 2018 at 10:54:40AM +0100, Chris Wilson wrote:
> Currently we indirectly try to evict the test buffers by mmaping enough
> bo that should fill the aperture. However, this assumes that the kernel
> is trying to fill the aperture and does not use random replacement
> (which it does) or
That is now done by the DMA-buf helpers instead.
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_prime.c | 78 +++--
1 file changed, 18 insertions(+), 60 deletions(-)
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index 186d
Add function variants which can be called with the reservation lock
already held.
v2: reordered, add lockdep asserts, fix kerneldoc
v3: rebased on sgt caching
Signed-off-by: Christian König
---
drivers/dma-buf/dma-buf.c | 63 +++
include/linux/dma-buf
First step towards unpinned DMA buf operation.
I've checked the DRM drivers to potential locking of the reservation
object, but essentially we need to audit all implementations of the
dma_buf _ops for this to work.
v2: reordered
v3: rebased on sgt caching
Signed-off-by: Christian König
---
dri
To allow a smooth transition from pinning buffer objects to dynamic
invalidation we first start to cache the sg_table for an attachment
unless the driver explicitly says to not do so.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-buf.c | 24
include/linux/dma-bu
== Series Details ==
Series: drm/i915: Cache the error string
URL : https://patchwork.freedesktop.org/series/46777/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Cache the error string
+drivers/gpu/drm/i915/i915_sysfs.c:529:15: warning: expression using
sizeof(vo
Currently, we convert the error state into a string every time we read
from sysfs (and sysfs reads in page size (4KiB) chunks). We do try to
window the string and only capture the portion that is being read, but
that means that we must always convert up to the window to find the
start. For a very l
Currently, we convert the error state into a string every time we read
from sysfs (and sysfs reads in page size (4KiB) chunks). We do try to
window the string and only capture the portion that is being read, but
that means that we must always convert up to the window to find the
start. For a very l
On Wed, Jul 18, 2018 at 10:12:02AM +0100, Brian Starkey wrote:
> Hi Ayan,
>
> On Tue, Jul 17, 2018 at 06:13:42PM +0100, Ayan Kumar Halder wrote:
> >A lot of drivers duplicate the function to check if a format is yuv or not.
> >If we add a field (to denote whether the format is yuv or not) in the
>
On Tue, Jul 17, 2018 at 06:13:45PM +0100, Ayan Kumar Halder wrote:
> drm_format_info table has a field 'is_yuv' to denote if the format
> is yuv or not. The driver is expected to use this instead of
> having a function for the same purpose.
>
> Signed-off-by: Ayan Kumar halder
> ---
> drivers/gp
On Tue, Jul 17, 2018 at 06:13:46PM +0100, Ayan Kumar Halder wrote:
> drm_format_info table has a field 'is_yuv' to denote if the format
> is yuv or not. The driver is expected to use this instead of
> having a function for the same purpose.
>
> Signed-off-by: Ayan Kumar halder
> ---
> drivers/gp
On Tue, Jul 17, 2018 at 01:00:25PM -0700, Rodrigo Vivi wrote:
> On Tue, Jul 17, 2018 at 08:42:15PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > We never registered any kind of lid notifier for eDP, so looking at the
> > lid status is pretty much bonkers. Let's just consider eDP alw
On Tue, Jul 17, 2018 at 03:16:53PM -0700, Lucas De Marchi wrote:
> On Fri, Jul 13, 2018 at 9:10 AM Ville Syrjälä
> wrote:
> >
> > On Fri, Jul 13, 2018 at 08:42:11AM -0700, Lucas De Marchi wrote:
> > > Instead of defining all registers twice, define just a PCH_GPIO_BASE
> > > that has the same addr
From: Tvrtko Ursulin
Incomplete requests (no notify, no context complete) have to be corrected
by looking at the engine timeline, and not the sorted-by-start-time view
as was previously used.
Per-engine timelines are generated on demand and cached for later use.
v2: Find end of current context
From: Tvrtko Ursulin
Just forget about earlier request_in events.
Signed-off-by: Tvrtko Ursulin
---
scripts/trace.pl | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/scripts/trace.pl b/scripts/trace.pl
index 60d42865acbd..41bedeefb776 100755
--- a/scripts/trace.pl
+++ b/s
From: Tvrtko Ursulin
Request split mode had several bugs, both in the original version and also
after the recent refactorings.
One big one was that it wasn't considering different submit ports as a
reason to split execution, and also that it was too time based instead of
looking at relevant time
From: Tvrtko Ursulin
We add stripes for different stages of request execution so it is easier
to follow one context in the multi-colour mode.
Vertical stripe pattern indicates pipeline "blockages" - requests waiting
for dependencies before they are runnable.
Diagonal stripes indicate runnable r
From: Tvrtko Ursulin
John reports that on a long runnning systems the huge disparity between
kernel context and user context id's causes all interesting colours to be
clustered too close together.
Fix this by assigning colours to seen contexts instead of basing purely
on context id's.
Signed-of
From: John Harrison
Improve the timeline legend to show actual context colours.
v2: (Tvrtko Ursulin)
* Commit msg.
* Tweak layout for more compactness and more readability.
v3:
* Limit number of shown contexts in the legend. (John Harrison)
v4:
* Unbreak legend display with small context c
From: Tvrtko Ursulin
It is possible to customize the axis display so change it to display
timestamps in seconds on the major axis (with six decimal spaces) and
millisecond offsets on the minor axis.
v2:
* Give up on broken relative timestamps.
v3:
* Drop all date complications and just use mi
From: Tvrtko Ursulin
Dropped the scaling patch since it is possible to build timeline objects
directly with micro-seconds (conversion to dates is not needed)! This also makes
the time axis look correct in Firefox.
Only three and a half unreviewed patches remain. :)
John Harrison (1):
trace.pl
From: Tvrtko Ursulin
Skip accounting the context save time for anything but the last request of
the coalesced bunch, and also skip drawing those boxes on the timeline.
Signed-off-by: Tvrtko Ursulin
---
scripts/trace.pl | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --gi
Exercise O(N^2) behaviour in reading the error state, and push it to the
extreme.
Reported-by: Jason Ekstrand
Signed-off-by: Chris Wilson
---
tests/gem_exec_capture.c | 155 ++-
1 file changed, 152 insertions(+), 3 deletions(-)
diff --git a/tests/gem_exec_ca
Hi Ayan,
On Tue, Jul 17, 2018 at 06:13:42PM +0100, Ayan Kumar Halder wrote:
A lot of drivers duplicate the function to check if a format is yuv or not.
If we add a field (to denote whether the format is yuv or not) in the
drm_format_info table, all the drivers can use this field and it will
prev
Exercise O(N^2) behaviour in reading the error state, and push it to the
extreme.
Reported-by: Jason Ekstrand
Signed-off-by: Chris Wilson
---
tests/gem_exec_capture.c | 156 ++-
1 file changed, 153 insertions(+), 3 deletions(-)
diff --git a/tests/gem_exec_ca
== Series Details ==
Series: drm/i915/mst: Continue state updates even if AUX writes fail.
URL : https://patchwork.freedesktop.org/series/46751/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4503_full -> Patchwork_9702_full =
== Summary - WARNING ==
Minor unknown changes
== Series Details ==
Series: drm/i915/mst: Do not retrain new links
URL : https://patchwork.freedesktop.org/series/46749/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4503_full -> Patchwork_9701_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_
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