[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [01/23] drm/i915: Reduce context HW ID lifetime

2018-09-04 Thread Patchwork
== Series Details == Series: series starting with [01/23] drm/i915: Reduce context HW ID lifetime URL : https://patchwork.freedesktop.org/series/49157/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4769_full -> Patchwork_10086_full = == Summary - SUCCESS == No

[Intel-gfx] ✓ Fi.CI.IGT: success for drm: Reject unknown legacy bpp and dpeth for drm_mode_addfb ioctl

2018-09-04 Thread Patchwork
== Series Details == Series: drm: Reject unknown legacy bpp and dpeth for drm_mode_addfb ioctl URL : https://patchwork.freedesktop.org/series/49150/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4769_full -> Patchwork_10085_full = == Summary - SUCCESS == No regressions

Re: [Intel-gfx] [PATCH] drm/i915/dp_mst: Fix enabling pipe clock for all streams

2018-09-04 Thread Dhinakaran Pandiyan
On Tue, 2018-09-04 at 16:19 -0700, Rodrigo Vivi wrote: > On Tue, Sep 04, 2018 at 03:53:51PM -0700, Dhinakaran Pandiyan wrote: > > On Tuesday, September 4, 2018 5:54:16 AM PDT Imre Deak wrote: > > > On Tue, Sep 04, 2018 at 03:08:16PM +0300, Jani Nikula wrote: > > > > On Fri, 31 Aug 2018, Imre Deak

[Intel-gfx] [PATCH xf86-video-intel] sna/io: Align the linear source buffer to cache line for 2d blt of SKL+

2018-09-04 Thread Guang Bai
On SKL+ the linear source buffer has to start from cache line boundary to meet the 2d engine source copy requirements. Apply this cache line alignment policy for SKL+ only. v2: Apply these changes only to SKL+ for not breaking old platforms based on Chris Wilson's reviews. Cc: Chris Wilson

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Be defensive and don't assume PSR has any commit to sync against

2018-09-04 Thread Patchwork
== Series Details == Series: drm/i915: Be defensive and don't assume PSR has any commit to sync against URL : https://patchwork.freedesktop.org/series/49141/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4767_full -> Patchwork_10084_full = == Summary - SUCCESS == No

Re: [Intel-gfx] [PATCH] drm/i915/dp_mst: Fix enabling pipe clock for all streams

2018-09-04 Thread Rodrigo Vivi
On Tue, Sep 04, 2018 at 03:53:51PM -0700, Dhinakaran Pandiyan wrote: > On Tuesday, September 4, 2018 5:54:16 AM PDT Imre Deak wrote: > > On Tue, Sep 04, 2018 at 03:08:16PM +0300, Jani Nikula wrote: > > > On Fri, 31 Aug 2018, Imre Deak wrote: > > > > commit afb2c4437dae ("drm/i915/ddi: Push pipe

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/pm_rpm: Reload the module with full mmio debugging

2018-09-04 Thread Patchwork
== Series Details == Series: igt/pm_rpm: Reload the module with full mmio debugging URL : https://patchwork.freedesktop.org/series/49138/ State : success == Summary == = CI Bug Log - changes from IGT_4625_full -> IGTPW_1785_full = == Summary - SUCCESS == No regressions found. External

Re: [Intel-gfx] [PATCH] drm/i915/dp_mst: Fix enabling pipe clock for all streams

2018-09-04 Thread Dhinakaran Pandiyan
On Tuesday, September 4, 2018 5:54:16 AM PDT Imre Deak wrote: > On Tue, Sep 04, 2018 at 03:08:16PM +0300, Jani Nikula wrote: > > On Fri, 31 Aug 2018, Imre Deak wrote: > > > commit afb2c4437dae ("drm/i915/ddi: Push pipe clock enabling to > > > encoders") > > > inadvertently stopped enabling the

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/23] drm/i915: Reduce context HW ID lifetime

2018-09-04 Thread Patchwork
== Series Details == Series: series starting with [01/23] drm/i915: Reduce context HW ID lifetime URL : https://patchwork.freedesktop.org/series/49157/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4769 -> Patchwork_10086 = == Summary - SUCCESS == No regressions found.

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Reduce context HW ID lifetime (rev3)

2018-09-04 Thread Patchwork
== Series Details == Series: drm/i915: Reduce context HW ID lifetime (rev3) URL : https://patchwork.freedesktop.org/series/44134/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4767_full -> Patchwork_10083_full = == Summary - WARNING == Minor unknown changes coming with

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/23] drm/i915: Reduce context HW ID lifetime

2018-09-04 Thread Patchwork
== Series Details == Series: series starting with [01/23] drm/i915: Reduce context HW ID lifetime URL : https://patchwork.freedesktop.org/series/49157/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Reduce context HW ID lifetime

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/23] drm/i915: Reduce context HW ID lifetime

2018-09-04 Thread Patchwork
== Series Details == Series: series starting with [01/23] drm/i915: Reduce context HW ID lifetime URL : https://patchwork.freedesktop.org/series/49157/ State : warning == Summary == $ dim checkpatch origin/drm-tip d7ddd5a81ce5 drm/i915: Reduce context HW ID lifetime -:61:

[Intel-gfx] [PATCH 11/23] drm/i915: Handle incomplete Z_FINISH for compressed error states

2018-09-04 Thread Chris Wilson
The final call to zlib_deflate(Z_FINISH) may require more output space to be allocated and so needs to re-invoked. Failure to do so in the current code leads to incomplete zlib streams (albeit intact due to the use of Z_SYNC_FLUSH) resulting in the occasional short object capture. Testcase:

[Intel-gfx] [PATCH 02/23] drm/i915/execlists: Avoid kicking priority on the current context

2018-09-04 Thread Chris Wilson
If the request is currently on the HW (in port 0), then we do not need to kick the submission tasklet to evaluate whether we should be preempting itself in order to execute it again. In the case that was annoying me: execlists_schedule: rq(18:211173).prio=0 -> 2 need_preempt:

[Intel-gfx] [PATCH 08/23] drm/i915: Report the number of closed vma held by each context in debugfs

2018-09-04 Thread Chris Wilson
Include the total size of closed vma when reporting the per_ctx_stats of debugfs/i915_gem_objects. Whilst adjusting the context tracking, note that we can simply use our list of contexts in i915->contexts rather than circumlocute via dev->filelist and the per-file context idr. Signed-off-by:

[Intel-gfx] [PATCH 07/23] drm/i915/execlists: Onion unwind for logical_ring_init() failure

2018-09-04 Thread Chris Wilson
Fix up the error unwind for logical_ring_init() failing by moving the cleanup into the callers who own the various bits of state during initialisation. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_lrc.c | 18 +++--- 1 file changed, 11 insertions(+), 7 deletions(-)

[Intel-gfx] [PATCH 04/23] drm/i915/selftests: Basic stress test for rapid context switching

2018-09-04 Thread Chris Wilson
We need to exercise the HW and submission paths for switching contexts rapidly to check that features such as execlists' wa_tail are adequate. Plus it's an interesting baseline latency metric. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/selftests/i915_gem_context.c | 185 ++

[Intel-gfx] [PATCH 18/23] drm/i915: Markup paired operations on display power domains

2018-09-04 Thread Chris Wilson
The majority of runtime-pm operations are bounded and scoped within a function; these are easy to verify that the wakeref are handled correctly. We can employ the compiler to help us, and reduce the number of wakerefs tracked when debugging, by passing around cookies provided by the various

[Intel-gfx] [PATCH 12/23] drm/i915: Clear the error PTE just once on finish

2018-09-04 Thread Chris Wilson
We do not need to continually clear our dedicated PTE for error capture as it will be updated and invalidated to the next object. Only at the end do we wish to be sure that the PTE doesn't point back to any buffer. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gpu_error.c | 10

[Intel-gfx] [PATCH 21/23] drm/i915: Complain if hsw_get_pipe_config acquires the same power well twice

2018-09-04 Thread Chris Wilson
As we only release each power well once, we assume that each transcoder maps to a different domain. Complain if this is not so. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_display.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c

[Intel-gfx] [PATCH 03/23] drm/i915: Missed interrupt simulation is no more, tell the world

2018-09-04 Thread Chris Wilson
Using the guc, we cannot disable the user interrupt generation as we use it for driving submission. And from Icelake, we no longer have the ability to individually mask interrupt generation from each engine, disabling our ability to fake missed interrupts. In both cases, report back to userspace

[Intel-gfx] [PATCH 17/23] drm/i915: Syntatic sugar for using intel_runtime_pm

2018-09-04 Thread Chris Wilson
Frequently, we use intel_runtime_pm_get/_put around a small block. Formalise that usage by providing a macro to define such a block with an automatic closure to scope the intel_runtime_pm wakeref to that block, i.e. macro abuse smelling of python. Signed-off-by: Chris Wilson ---

[Intel-gfx] [PATCH 14/23] drm/i915: Attach the pci match data to the device upon creation

2018-09-04 Thread Chris Wilson
Attach our device_info to the our i915 private on creation so that it is always available for inspection. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.c | 66 +++-- 1 file changed, 38 insertions(+), 28 deletions(-) diff --git

[Intel-gfx] [PATCH 06/23] drm/i915/execlists: Use coherent writes into the context image

2018-09-04 Thread Chris Wilson
That we use a WB mapping for updating the RING_TAIL register inside the context image even on !llc machines has been a source of consternation for every reader. It appears to work on bsw+, but it may just have been that we have been incredibly bad at detecting the errors. v2: With extra

[Intel-gfx] [PATCH 16/23] drm/i915: Markup paired operations on wakerefs

2018-09-04 Thread Chris Wilson
The majority of runtime-pm operations are bounded and scoped within a function; these are easy to verify that the wakeref are handled correctly. We can employ the compiler to help us, and reduce the number of wakerefs tracked when debugging, by passing around cookies provided by the various

[Intel-gfx] [PATCH 20/23] drm/i915/dp: Markup pps lock power well

2018-09-04 Thread Chris Wilson
Track where and when we acquire and release the power well for pps access along the dp aux link, with a view to detecting if we leak any wakerefs. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_dp.c | 223 +--- 1 file changed, 116 insertions(+), 107

[Intel-gfx] [PATCH 15/23] drm/i915: Track all held rpm wakerefs

2018-09-04 Thread Chris Wilson
Everytime we take a wakeref, record the stack trace of where it was taken; clearing the set if we ever drop back to no owners. For debugging a rpm leak, we can look at all the current wakerefs and check if they have a matching rpm_put. Signed-off-by: Chris Wilson ---

[Intel-gfx] [PATCH 10/23] drm/i915/execlists: Assert the queue is non-empty on unsubmitting

2018-09-04 Thread Chris Wilson
In the sequence <0>[ 531.960431] drv_self-48067 527402570us : intel_gpu_reset: engine_mask=1, ret=0, retry=0 <0>[ 531.960431] drv_self-48067 527402571us : execlists_reset: rcs0 request global=115de, current=71133 <0>[ 531.960431] drv_self-48067d..1 527402571us :

[Intel-gfx] [PATCH 19/23] drm/i915: Track the wakeref used to initialise display power domains

2018-09-04 Thread Chris Wilson
On module load and unload, we grab the POWER_DOMAIN_INIT powerwells and transfer them to the runtime-pm code. We can use our wakeref tracking to verify that the wakeref is indeed passed from init to enable, and disable to fini; and across suspend. Signed-off-by: Chris Wilson ---

[Intel-gfx] [PATCH 09/23] drm/i915: Remove debugfs/i915_ppgtt_info

2018-09-04 Thread Chris Wilson
The information presented here is not relevant to current development. We can either use the context information, but more often we want to inspect the active gpu state. The ulterior motive is to eradicate dev->filelist. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_debugfs.c | 119

[Intel-gfx] [PATCH 23/23] drm/i915: Serialise concurrent calls to i915_gem_set_wedged()

2018-09-04 Thread Chris Wilson
Make i915_gem_set_wedged() and i915_gem_unset_wedged() behaviour more consistently if called concurrently. Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915/i915_gem.c | 32 ++- drivers/gpu/drm/i915/i915_gpu_error.h | 4 ++-

[Intel-gfx] [PATCH 05/23] drm/i915/execlists: Delay updating ring register state after resume

2018-09-04 Thread Chris Wilson
Now that we reload both RING_HEAD and RING_TAIL when rebinding the context, we do not need to scrub those registers immediately on resume. v2: Handle the perma-pinned contexts. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Mika Kuoppala --- drivers/gpu/drm/i915/intel_lrc.c | 29

[Intel-gfx] [PATCH 01/23] drm/i915: Reduce context HW ID lifetime

2018-09-04 Thread Chris Wilson
Future gen reduce the number of bits we will have available to differentiate between contexts, so reduce the lifetime of the ID assignment from that of the context to its current active cycle (i.e. only while it is pinned for use by the HW, will it have a constant ID). This means that instead of a

[Intel-gfx] [PATCH 13/23] drm/i915: Cache the error string

2018-09-04 Thread Chris Wilson
Currently, we convert the error state into a string every time we read from sysfs (and sysfs reads in page size (4KiB) chunks). We do try to window the string and only capture the portion that is being read, but that means that we must always convert up to the window to find the start. For a very

[Intel-gfx] [PATCH 22/23] drm/i915: Mark up Ironlake ips with rpm wakerefs

2018-09-04 Thread Chris Wilson
Currently Ironlake operates under the assumption that rpm awake (and its error checking is disabled). As such, we have missed a few places where we access registers without taking the rpm wakeref and thus trigger warnings. intel_ips being one culprit. As this involved adding a potentially

Re: [Intel-gfx] [PATCH] drm: Reject unknown legacy bpp and dpeth for drm_mode_addfb ioctl

2018-09-04 Thread Daniel Vetter
On Tue, Sep 04, 2018 at 09:53:19PM +0100, Chris Wilson wrote: > Since this is handling user provided bpp and depth, we need to sanity > check and propagate the EINVAL back rather than assume what the insane > client intended and fill the logs with DRM_ERROR. > > Signed-off-by: Chris Wilson > Cc:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Reject unknown legacy bpp and dpeth for drm_mode_addfb ioctl

2018-09-04 Thread Patchwork
== Series Details == Series: drm: Reject unknown legacy bpp and dpeth for drm_mode_addfb ioctl URL : https://patchwork.freedesktop.org/series/49150/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4769 -> Patchwork_10085 = == Summary - SUCCESS == No regressions found.

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: optimzie eDP 1.4 config

2018-09-04 Thread Patchwork
== Series Details == Series: drm/i915: optimzie eDP 1.4 config URL : https://patchwork.freedesktop.org/series/49131/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4766_full -> Patchwork_10082_full = == Summary - WARNING == Minor unknown changes coming with

Re: [Intel-gfx] [PATCH] drm/i915: Be defensive and don't assume PSR has any commit to sync against

2018-09-04 Thread Pandiyan, Dhinakaran
On Tue, 2018-09-04 at 19:12 +0100, Chris Wilson wrote: > Quoting Ville Syrjälä (2018-09-04 19:06:29) > > On Tue, Sep 04, 2018 at 08:59:32PM +0300, Ville Syrjälä wrote: > > > On Tue, Sep 04, 2018 at 06:44:14PM +0100, Chris Wilson wrote: > > > > Quoting Ville Syrjälä (2018-09-04 18:39:53) > > > > >

[Intel-gfx] [PATCH] drm: Reject unknown legacy bpp and dpeth for drm_mode_addfb ioctl

2018-09-04 Thread Chris Wilson
Since this is handling user provided bpp and depth, we need to sanity check and propagate the EINVAL back rather than assume what the insane client intended and fill the logs with DRM_ERROR. Signed-off-by: Chris Wilson Cc: Daniel Vetter Cc: Ville Syrjälä --- So I am presuming that

Re: [Intel-gfx] [PATCH 09/14] drm: Update todo.rst

2018-09-04 Thread Emil Velikov
On 4 September 2018 at 13:19, Daniel Vetter wrote: > On Mon, Sep 03, 2018 at 06:38:44PM +0100, Emil Velikov wrote: >> On 3 September 2018 at 17:54, Daniel Vetter wrote: >> >> > -Hide legacy cruft better >> > - >> > - >> > -Way back DRM supported only drivers which

Re: [Intel-gfx] [PATCH 06/14] drm: extract drm_atomic_uapi.c

2018-09-04 Thread Rodrigo Vivi
On Mon, Sep 03, 2018 at 06:54:31PM +0200, Daniel Vetter wrote: > This leaves all the commit/check and state handling in drm_atomic.c, > while pulling all the uapi glue and the huge ioctl itself into a > seprate file. > > This seems to almost perfectly split the rather big drm_atomic.c file > into

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Pull intel_uncore_arm_unclaimed_mmio_detection() under the spinlock

2018-09-04 Thread Patchwork
== Series Details == Series: drm/i915: Pull intel_uncore_arm_unclaimed_mmio_detection() under the spinlock URL : https://patchwork.freedesktop.org/series/49128/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4766_full -> Patchwork_10081_full = == Summary - SUCCESS == No

[Intel-gfx] [PATCH xf86-video-intel] sna/io: Align the linear source buffer to cache line for 2d blt of SKL+

2018-09-04 Thread Guang Bai
On SKL+ the linear source buffer has to start from cache line boundary to meet the 2d engine source copy requirements. Apply this cache line alignment policy for SKL+ only. Signed-off-by: Guang Bai --- src/sna/sna_io.c | 47 +++ 1 file changed, 35

Re: [Intel-gfx] [PATCH] drm/i915: Be defensive and don't assume PSR has any commit to sync against

2018-09-04 Thread Chris Wilson
Quoting Ville Syrjälä (2018-09-04 19:06:29) > On Tue, Sep 04, 2018 at 08:59:32PM +0300, Ville Syrjälä wrote: > > On Tue, Sep 04, 2018 at 06:44:14PM +0100, Chris Wilson wrote: > > > Quoting Ville Syrjälä (2018-09-04 18:39:53) > > > > On Tue, Sep 04, 2018 at 05:29:02PM +0100, Chris Wilson wrote: > >

Re: [Intel-gfx] [PATCH] drm/i915: Be defensive and don't assume PSR has any commit to sync against

2018-09-04 Thread Ville Syrjälä
On Tue, Sep 04, 2018 at 08:59:32PM +0300, Ville Syrjälä wrote: > On Tue, Sep 04, 2018 at 06:44:14PM +0100, Chris Wilson wrote: > > Quoting Ville Syrjälä (2018-09-04 18:39:53) > > > On Tue, Sep 04, 2018 at 05:29:02PM +0100, Chris Wilson wrote: > > > > If the previous modeset commit has completed

Re: [Intel-gfx] [PATCH] drm/i915: Be defensive and don't assume PSR has any commit to sync against

2018-09-04 Thread Ville Syrjälä
On Tue, Sep 04, 2018 at 06:44:14PM +0100, Chris Wilson wrote: > Quoting Ville Syrjälä (2018-09-04 18:39:53) > > On Tue, Sep 04, 2018 at 05:29:02PM +0100, Chris Wilson wrote: > > > If the previous modeset commit has completed and is no longer part of > > > the crtc state, skip waiting for it. > > >

Re: [Intel-gfx] [PATCH] drm/i915: Be defensive and don't assume PSR has any commit to sync against

2018-09-04 Thread Chris Wilson
Quoting Ville Syrjälä (2018-09-04 18:39:53) > On Tue, Sep 04, 2018 at 05:29:02PM +0100, Chris Wilson wrote: > > If the previous modeset commit has completed and is no longer part of > > the crtc state, skip waiting for it. > > > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107792 > >

Re: [Intel-gfx] [PATCH] drm/i915: Rename full ppgtt configuration to be more generic

2018-09-04 Thread Bob Paauwe
On Fri, 31 Aug 2018 13:21:40 -0700 Rodrigo Vivi wrote: > On Fri, Aug 31, 2018 at 04:51:29PM +0100, Chris Wilson wrote: > > Quoting Bob Paauwe (2018-08-31 16:47:04) > > > For ppgtt, what we're really interested in is the number of page > > > walk levels for each platform. Rename the device info

Re: [Intel-gfx] [PATCH] drm/i915: Be defensive and don't assume PSR has any commit to sync against

2018-09-04 Thread Ville Syrjälä
On Tue, Sep 04, 2018 at 05:29:02PM +0100, Chris Wilson wrote: > If the previous modeset commit has completed and is no longer part of > the crtc state, skip waiting for it. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107792 > Fixes: c44301fce614 ("drm/i915: Allow control of PSR at

Re: [Intel-gfx] [PATCH v1] drm/i915: Skip modeset for cdclk changes if possible

2018-09-04 Thread Kumar, Abhay
+Susanta From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of Kumar, Abhay Sent: Tuesday, August 28, 2018 5:55 PM To: Ville Syrjälä Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH v1] drm/i915: Skip modeset for cdclk changes if possible On

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Be defensive and don't assume PSR has any commit to sync against

2018-09-04 Thread Patchwork
== Series Details == Series: drm/i915: Be defensive and don't assume PSR has any commit to sync against URL : https://patchwork.freedesktop.org/series/49141/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4767 -> Patchwork_10084 = == Summary - SUCCESS == No regressions

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/pm_rpm: Reload the module with full mmio debugging

2018-09-04 Thread Patchwork
== Series Details == Series: igt/pm_rpm: Reload the module with full mmio debugging URL : https://patchwork.freedesktop.org/series/49138/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4766 -> IGTPW_1785 = == Summary - SUCCESS == No regressions found. External URL:

[Intel-gfx] [PATCH] drm/i915: Be defensive and don't assume PSR has any commit to sync against

2018-09-04 Thread Chris Wilson
If the previous modeset commit has completed and is no longer part of the crtc state, skip waiting for it. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107792 Fixes: c44301fce614 ("drm/i915: Allow control of PSR at runtime through debugfs, v6") Signed-off-by: Chris Wilson Cc: Maarten

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Reduce context HW ID lifetime (rev3)

2018-09-04 Thread Patchwork
== Series Details == Series: drm/i915: Reduce context HW ID lifetime (rev3) URL : https://patchwork.freedesktop.org/series/44134/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4767 -> Patchwork_10083 = == Summary - SUCCESS == No regressions found. External URL:

[Intel-gfx] [PATCH i-g-t] igt/pm_rpm: Reload the module with full mmio debugging

2018-09-04 Thread Chris Wilson
Our unclaimed mmio access debugging is lazy, doing cheap checks periodically and only if they fail do a full check around every mmio access. When testing for runtime pm, enable the full mmio debugging from the initial load. Signed-off-by: Chris Wilson Cc: Imre Deak Reviewed-by: Imre Deak ---

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Reduce context HW ID lifetime (rev3)

2018-09-04 Thread Patchwork
== Series Details == Series: drm/i915: Reduce context HW ID lifetime (rev3) URL : https://patchwork.freedesktop.org/series/44134/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Reduce context HW ID lifetime -drivers/gpu/drm/i915/selftests/../i915_drv.h:3686:16:

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reduce context HW ID lifetime (rev3)

2018-09-04 Thread Patchwork
== Series Details == Series: drm/i915: Reduce context HW ID lifetime (rev3) URL : https://patchwork.freedesktop.org/series/44134/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9a6f6d0994b2 drm/i915: Reduce context HW ID lifetime -:61: CHECK:UNCOMMENTED_DEFINITION: struct mutex

[Intel-gfx] [PATCH v2] drm/i915: Reduce context HW ID lifetime

2018-09-04 Thread Chris Wilson
Future gen reduce the number of bits we will have available to differentiate between contexts, so reduce the lifetime of the ID assignment from that of the context to its current active cycle (i.e. only while it is pinned for use by the HW, will it have a constant ID). This means that instead of a

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: optimzie eDP 1.4 config

2018-09-04 Thread Patchwork
== Series Details == Series: drm/i915: optimzie eDP 1.4 config URL : https://patchwork.freedesktop.org/series/49131/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4766 -> Patchwork_10082 = == Summary - SUCCESS == No regressions found. External URL:

[Intel-gfx] [drm-tip:drm-tip 144/320] debug.c:undefined reference to `save_stack_trace'

2018-09-04 Thread kbuild test robot
Hi Daniel, FYI, the error/warning still remains. tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip head: 1b18cb66428cffa748719cf900b2decac3690029 commit: 7928ca5cc786fdc0269342f1b9e22c2af939b989 [144/320] RFC: debugobjects: capture stack traces at _init() time config:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Pull intel_uncore_arm_unclaimed_mmio_detection() under the spinlock

2018-09-04 Thread Patchwork
== Series Details == Series: drm/i915: Pull intel_uncore_arm_unclaimed_mmio_detection() under the spinlock URL : https://patchwork.freedesktop.org/series/49128/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4766 -> Patchwork_10081 = == Summary - SUCCESS == No

Re: [Intel-gfx] [PATCH i-g-t] lib/pm_rpm: Reload the module with full mmio debugging

2018-09-04 Thread Imre Deak
On Tue, Sep 04, 2018 at 03:21:09PM +0100, Chris Wilson wrote: > Quoting Imre Deak (2018-09-04 15:14:06) > > On Tue, Sep 04, 2018 at 11:20:04AM +0100, Chris Wilson wrote: > > > Our unclaimed mmio access debugging is lazy, doing cheap checks > > > periodically and only if they fail do a full check

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Double check we didn't miss an unclaimed register access

2018-09-04 Thread Patchwork
== Series Details == Series: drm/i915: Double check we didn't miss an unclaimed register access URL : https://patchwork.freedesktop.org/series/49121/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4763_full -> Patchwork_10079_full = == Summary - WARNING == Minor unknown

Re: [Intel-gfx] [PATCH] drm/i915: optimzie eDP 1.4 config

2018-09-04 Thread Chris Wilson
Quoting Lee, Shawn C (2018-09-04 15:55:41) > eDP 1.4 introduce a new link rates flexibility and selection. > It provided system specific link rate optimization and power > efficiency. We should keep eDP 1.3 and older version to use > max link rate approach to avoid any side effect. And eDP 1.4 >

[Intel-gfx] [PATCH] drm/i915: optimzie eDP 1.4 config

2018-09-04 Thread Lee, Shawn C
eDP 1.4 introduce a new link rates flexibility and selection. It provided system specific link rate optimization and power efficiency. We should keep eDP 1.3 and older version to use max link rate approach to avoid any side effect. And eDP 1.4 used the optimization link rate and lane count

Re: [Intel-gfx] [PATCH i-g-t] lib/pm_rpm: Reload the module with full mmio debugging

2018-09-04 Thread Chris Wilson
Quoting Imre Deak (2018-09-04 15:14:06) > On Tue, Sep 04, 2018 at 11:20:04AM +0100, Chris Wilson wrote: > > Our unclaimed mmio access debugging is lazy, doing cheap checks > > periodically and only if they fail do a full check around every mmio > > access. When testing for runtime pm, enable the

Re: [Intel-gfx] [PATCH 14/14] drm/vmwgfx: Add FIXME comments for customer page_flip handlers

2018-09-04 Thread Daniel Vetter
On Tue, Sep 4, 2018 at 3:45 PM, Thomas Hellstrom wrote: > On 09/03/2018 06:54 PM, Daniel Vetter wrote: >> >> The idea behind allowing drivers to override legacy ioctls (instead of >> using the generic implementations unconditionally) is to handle bugs >> in old driver-specific userspace. Like

Re: [Intel-gfx] [PATCH i-g-t] lib/pm_rpm: Reload the module with full mmio debugging

2018-09-04 Thread Imre Deak
On Tue, Sep 04, 2018 at 11:20:04AM +0100, Chris Wilson wrote: > Our unclaimed mmio access debugging is lazy, doing cheap checks > periodically and only if they fail do a full check around every mmio > access. When testing for runtime pm, enable the full mmio debugging from > the initial load. > >

Re: [Intel-gfx] [PATCH v9 2/2] drm/i915: Adding YUV444 packed format support for skl+

2018-09-04 Thread Ville Syrjälä
On Tue, Sep 04, 2018 at 03:52:51PM +0200, Maarten Lankhorst wrote: > Op 04-09-18 om 15:50 schreef Ville Syrjälä: > > On Tue, Sep 04, 2018 at 02:47:51PM +0200, Maarten Lankhorst wrote: > >> Op 30-08-18 om 16:24 schreef Stanislav Lisovskiy: > >>> PLANE_CTL_FORMAT_AYUV is already supported, according

[Intel-gfx] ✗ Fi.CI.IGT: failure for Add XYUV format support (rev5)

2018-09-04 Thread Patchwork
== Series Details == Series: Add XYUV format support (rev5) URL : https://patchwork.freedesktop.org/series/48007/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4763_full -> Patchwork_10078_full = == Summary - FAILURE == Serious unknown changes coming with

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] lib/pm: Increase snd module probe timeout to 10s

2018-09-04 Thread Imre Deak
On Tue, Sep 04, 2018 at 11:19:38AM +0100, Chris Wilson wrote: > 5s is often not enough for the sound module to finish loading, so bump > the timeout to 10s. For fun, poll quicker over the 1s! > > Signed-off-by: Chris Wilson > Cc: Imre Deak Reviewed-by: Imre Deak > --- > lib/igt_pm.c | 7

Re: [Intel-gfx] [PATCH v9 2/2] drm/i915: Adding YUV444 packed format support for skl+

2018-09-04 Thread Maarten Lankhorst
Op 04-09-18 om 15:50 schreef Ville Syrjälä: > On Tue, Sep 04, 2018 at 02:47:51PM +0200, Maarten Lankhorst wrote: >> Op 30-08-18 om 16:24 schreef Stanislav Lisovskiy: >>> PLANE_CTL_FORMAT_AYUV is already supported, according to hardware >>> specification. >>> >>> v2: Edited commit message, removed

Re: [Intel-gfx] [PATCH v9 2/2] drm/i915: Adding YUV444 packed format support for skl+

2018-09-04 Thread Ville Syrjälä
On Tue, Sep 04, 2018 at 02:47:51PM +0200, Maarten Lankhorst wrote: > Op 30-08-18 om 16:24 schreef Stanislav Lisovskiy: > > PLANE_CTL_FORMAT_AYUV is already supported, according to hardware > > specification. > > > > v2: Edited commit message, removed redundant whitespaces. > > > > v3: Fixed

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: Fix context RPCS programming (rev2)

2018-09-04 Thread Tvrtko Ursulin
On 03/09/2018 13:53, Patchwork wrote: == Series Details == Series: drm/i915/icl: Fix context RPCS programming (rev2) URL : https://patchwork.freedesktop.org/series/49005/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4757 -> Patchwork_10070 = == Summary - SUCCESS ==

Re: [Intel-gfx] [PATCH i-g-t] igt/pm_rps: Clear previous high load on high->low transition

2018-09-04 Thread Katarzyna Dec
On Tue, Sep 04, 2018 at 01:49:56PM +0100, Chris Wilson wrote: > Make sure we do flush out the previous spinner and delay signaling > transition completion until we do. > > References: https://bugs.freedesktop.org/show_bug.cgi?id=102250 > Signed-off-by: Chris Wilson > Cc: Katarzyna Dec > --- >

Re: [Intel-gfx] [PATCH] drm/i915: Reduce context HW ID lifetime

2018-09-04 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-09-03 10:59:01) > > On 31/08/2018 13:36, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-08-30 17:23:43) > >> > >> On 30/08/2018 11:24, Chris Wilson wrote: > >>> +static int assign_hw_id(struct drm_i915_private *i915, unsigned int *out) > >>> +{ > >>> + int

Re: [Intel-gfx] [PATCH 14/14] drm/vmwgfx: Add FIXME comments for customer page_flip handlers

2018-09-04 Thread Thomas Hellstrom
On 09/03/2018 06:54 PM, Daniel Vetter wrote: The idea behind allowing drivers to override legacy ioctls (instead of using the generic implementations unconditionally) is to handle bugs in old driver-specific userspace. Like e.g. vmw_kms_set_config does, to work around some vmwgfx userspace not

Re: [Intel-gfx] [PATCH] drm/i915: Double check we didn't miss an unclaimed register access

2018-09-04 Thread Chris Wilson
Quoting Mika Kuoppala (2018-09-04 13:56:07) > Chris Wilson writes: > > > Quoting Chris Wilson (2018-09-04 13:38:27) > >> Quoting Mika Kuoppala (2018-09-04 13:34:12) > >> > Chris Wilson writes: > >> > > >> > > Currently, if the user has enabled mmio-debug around each register > >> > > access,

Re: [Intel-gfx] [PATCH] drm/i915: Pull intel_uncore_arm_unclaimed_mmio_detection() under the spinlock

2018-09-04 Thread Mika Kuoppala
Chris Wilson writes: > Elsewhere we manipulate uncore.unclaimed_mmio_check and > i915_param.mmio_debug under the irq lock (e.g. preserving the current > value across a user forcewake grab), but do not protect the manipulation > inside intel_uncore_arm_unclaimed_mmio_detection() from concurrent >

Re: [Intel-gfx] [PATCH] drm/i915/ringbuffer: Move double invalidate to after pd flush

2018-09-04 Thread Chris Wilson
Quoting Mika Kuoppala (2018-09-04 14:22:17) > Chris Wilson writes: > > > Continuing the fun of trying to find exactly the delay that is > > sufficient to ensure that the page directory is fully loaded between > > context switches, move the extra flush added in commit 70b73f9ac113 > >

Re: [Intel-gfx] [PATCH v2] drm/i915: Fix ICL+ HDMI clock readout

2018-09-04 Thread Ville Syrjälä
On Mon, Sep 03, 2018 at 10:21:30PM -0700, Rodrigo Vivi wrote: > On Mon, Sep 03, 2018 at 05:28:41PM +0300, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Copy the 38.4 vs. 19.2 MHz ref clock exception from the dpll > > mgr into the clock readout function as well. > > > > v2: Refactor the

Re: [Intel-gfx] [PATCH 2/2] drm/i915: reword documentation of possible pci_device_id struct

2018-09-04 Thread Jani Nikula
On Tue, 28 Aug 2018, Lucas De Marchi wrote: > On Tue, Aug 28, 2018 at 07:05:46PM +0100, Chris Wilson wrote: >> Quoting Lucas De Marchi (2018-08-28 18:41:46) >> > Document it like a real struct for ease of copy and paste, remove >> > comment of C99 compatibility and document that in some cases the

Re: [Intel-gfx] [PATCH] drm/i915/ringbuffer: Move double invalidate to after pd flush

2018-09-04 Thread Mika Kuoppala
Chris Wilson writes: > Continuing the fun of trying to find exactly the delay that is > sufficient to ensure that the page directory is fully loaded between > context switches, move the extra flush added in commit 70b73f9ac113 > ("drm/i915/ringbuffer: Delay after invalidating gen6+ xcs") to just

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Pull intel_uncore_arm_unclaimed_mmio_detection() under the spinlock

2018-09-04 Thread Patchwork
== Series Details == Series: drm/i915: Pull intel_uncore_arm_unclaimed_mmio_detection() under the spinlock URL : https://patchwork.freedesktop.org/series/49128/ State : failure == Summary == Applying: drm/i915: Pull intel_uncore_arm_unclaimed_mmio_detection() under the spinlock Using index

[Intel-gfx] [PATCH] drm/i915: Pull intel_uncore_arm_unclaimed_mmio_detection() under the spinlock

2018-09-04 Thread Chris Wilson
Elsewhere we manipulate uncore.unclaimed_mmio_check and i915_param.mmio_debug under the irq lock (e.g. preserving the current value across a user forcewake grab), but do not protect the manipulation inside intel_uncore_arm_unclaimed_mmio_detection() from concurrent access, even from itself. This

Re: [Intel-gfx] [PATCH] drm/i915: Double check we didn't miss an unclaimed register access

2018-09-04 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Chris Wilson (2018-09-04 13:38:27) >> Quoting Mika Kuoppala (2018-09-04 13:34:12) >> > Chris Wilson writes: >> > >> > > Currently, if the user has enabled mmio-debug around each register >> > > access, we presume that we have then checked them all. However, it is

Re: [Intel-gfx] [PATCH] drm/i915/dp_mst: Fix enabling pipe clock for all streams

2018-09-04 Thread Imre Deak
On Tue, Sep 04, 2018 at 03:08:16PM +0300, Jani Nikula wrote: > On Fri, 31 Aug 2018, Imre Deak wrote: > > commit afb2c4437dae ("drm/i915/ddi: Push pipe clock enabling to encoders") > > inadvertently stopped enabling the pipe clock for any DP-MST stream > > after the first one. It also rearranged

[Intel-gfx] [PATCH i-g-t] igt/pm_rps: Clear previous high load on high->low transition

2018-09-04 Thread Chris Wilson
Make sure we do flush out the previous spinner and delay signaling transition completion until we do. References: https://bugs.freedesktop.org/show_bug.cgi?id=102250 Signed-off-by: Chris Wilson Cc: Katarzyna Dec --- tests/pm_rps.c | 26 +- 1 file changed, 21

Re: [Intel-gfx] [PATCH v9 2/2] drm/i915: Adding YUV444 packed format support for skl+

2018-09-04 Thread Maarten Lankhorst
Op 30-08-18 om 16:24 schreef Stanislav Lisovskiy: > PLANE_CTL_FORMAT_AYUV is already supported, according to hardware > specification. > > v2: Edited commit message, removed redundant whitespaces. > > v3: Fixed fallthrough logic for the format switch cases. > > v4: Yet again fixed fallthrough

Re: [Intel-gfx] [Mesa-dev] [PATCH libdrm] Add basic CONTRIBUTING file

2018-09-04 Thread Daniel Vetter
On Tue, Sep 04, 2018 at 10:02:40AM +0100, Eric Engestrom wrote: > On Tuesday, 2018-09-04 16:24:44 +1000, Dave Airlie wrote: > > On Mon, 3 Sep 2018 at 18:47, Daniel Vetter wrote: > > > > > > I picked up a bunch of the pieces from wayland's version: > > > > > >

Re: [Intel-gfx] [PATCH] drm/i915: Double check we didn't miss an unclaimed register access

2018-09-04 Thread Chris Wilson
Quoting Chris Wilson (2018-09-04 13:38:27) > Quoting Mika Kuoppala (2018-09-04 13:34:12) > > Chris Wilson writes: > > > > > Currently, if the user has enabled mmio-debug around each register > > > access, we presume that we have then checked them all. However, it is > > > still possible through

Re: [Intel-gfx] [PATCH] drm/i915: Double check we didn't miss an unclaimed register access

2018-09-04 Thread Chris Wilson
Quoting Mika Kuoppala (2018-09-04 13:34:12) > Chris Wilson writes: > > > Currently, if the user has enabled mmio-debug around each register > > access, we presume that we have then checked them all. However, it is > > still possible through omission (raw register access) or external > >

Re: [Intel-gfx] [PATCH] drm/i915: Double check we didn't miss an unclaimed register access

2018-09-04 Thread Mika Kuoppala
Chris Wilson writes: > Currently, if the user has enabled mmio-debug around each register > access, we presume that we have then checked them all. However, it is > still possible through omission (raw register access) or external > interaction that the unclaimed access was not highlighted. > >

Re: [Intel-gfx] [PATCH 4/4] drm/i915: enable P010, P012, P016 formats for primary and sprite planes

2018-09-04 Thread Maarten Lankhorst
Hey, I like the new series. Looks good to me. Reviewed-by: Maarten Lankhorst Unfortunately, we probably shouldn't merge this until we've fixed IGT to support the new floating point formats. :( This requires a new pixman release and a new cairo release, but without it we can't actually test.

Re: [Intel-gfx] [PATCH 09/14] drm: Update todo.rst

2018-09-04 Thread Daniel Vetter
On Mon, Sep 03, 2018 at 06:38:44PM +0100, Emil Velikov wrote: > On 3 September 2018 at 17:54, Daniel Vetter wrote: > > > -Hide legacy cruft better > > - > > - > > -Way back DRM supported only drivers which shadow-attached to PCI devices > > with > > -userspace or fbdev

Re: [Intel-gfx] [PATCH] drm/i915/dp_mst: Fix enabling pipe clock for all streams

2018-09-04 Thread Jani Nikula
On Fri, 31 Aug 2018, Imre Deak wrote: > commit afb2c4437dae ("drm/i915/ddi: Push pipe clock enabling to encoders") > inadvertently stopped enabling the pipe clock for any DP-MST stream > after the first one. It also rearranged the pipe clock enabling wrt. > initial MST payload allocation step

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Double check we didn't miss an unclaimed register access

2018-09-04 Thread Patchwork
== Series Details == Series: drm/i915: Double check we didn't miss an unclaimed register access URL : https://patchwork.freedesktop.org/series/49121/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4763 -> Patchwork_10079 = == Summary - WARNING == Minor unknown changes

[Intel-gfx] ✓ Fi.CI.BAT: success for Add XYUV format support (rev5)

2018-09-04 Thread Patchwork
== Series Details == Series: Add XYUV format support (rev5) URL : https://patchwork.freedesktop.org/series/48007/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4763 -> Patchwork_10078 = == Summary - WARNING == Minor unknown changes coming with Patchwork_10078 need to be

[Intel-gfx] [PATCH] drm/i915: Double check we didn't miss an unclaimed register access

2018-09-04 Thread Chris Wilson
Currently, if the user has enabled mmio-debug around each register access, we presume that we have then checked them all. However, it is still possible through omission (raw register access) or external interaction that the unclaimed access was not highlighted. Signed-off-by: Chris Wilson Cc:

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