== Series Details ==
Series: drm/i915: split GVT as separated module
URL : https://patchwork.freedesktop.org/series/49605/
State : failure
== Summary ==
Applying: drm/i915: split GVT as separated module
.git/rebase-apply/patch:102: trailing whitespace.
.git/rebase-apply/patch:
Joonas requested if we could move GVT into separated module.
Then obvious requirement is to export i915 functions that GVT
currently use. So this one blindly trys to export all of them
for people to review. Some of them are already only for GVT now.
But more others might need more thinking on what
== Series Details ==
Series: series starting with [v2,1/4] drm/i915/dp: Link train Fallback on eDP
only if fallback link BW can fit panel's native mode
URL : https://patchwork.freedesktop.org/series/49596/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4813_full -> Patchwork
== Series Details ==
Series: series starting with [1/2] drm/i915: Balance prepare_fb/cleanup_fb
URL : https://patchwork.freedesktop.org/series/49579/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4813_full -> Patchwork_10162_full =
== Summary - SUCCESS ==
No regressions
>-Original Message-
>From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>Sent: Thursday, September 13, 2018 1:47 AM
>To: Bruno Prémont
>Cc: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org; Takashi
>Iwai ; alsa-de...@alsa-project.org; Yang, Libin
>
>Subject: Re: i9
== Series Details ==
Series: drm/i915: Fix a potential integer overflow with framebuffers extending
past 4 GiB (rev2)
URL : https://patchwork.freedesktop.org/series/49495/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4813_full -> Patchwork_10161_full =
== Summary - SUCCES
== Series Details ==
Series: series starting with [1/3] drm/i915: Limit the backpressure for
i915_request allocation
URL : https://patchwork.freedesktop.org/series/49572/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4813_full -> Patchwork_10160_full =
== Summary - WARNING
On Wed, Sep 12, 2018 at 3:55 PM Manasi Navare wrote:
>
> This patch fixes the original commit c0cfb10d9e1de49 ("drm/i915/edp:
> Do not do link training fallback or prune modes on EDP") that causes
> a blank screen in case of certain eDP panels (Eg: seen on Dell XPS13 9350)
> where first link train
== Series Details ==
Series: drm/i915: Rename full ppgtt configuration to be more generic (rev4)
URL : https://patchwork.freedesktop.org/series/49021/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4813_full -> Patchwork_10159_full =
== Summary - SUCCESS ==
No regressions
== Series Details ==
Series: series starting with [v2,1/4] drm/i915/dp: Link train Fallback on eDP
only if fallback link BW can fit panel's native mode
URL : https://patchwork.freedesktop.org/series/49596/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4813 -> Patchwork_1016
== Series Details ==
Series: i915/oa: Simplify updating contexts
URL : https://patchwork.freedesktop.org/series/49569/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4813_full -> Patchwork_10158_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues ==
With downclock mode and DRRS now operating independently user can
request a modeset on downclock mode. In that case intel_dp_mode_valid()
should validate the downclock mode as well if that is requested.
Cc: Jani Nikula
Cc: Ville Syrjala
Signed-off-by: Manasi Navare
---
drivers/gpu/drm/i915/int
Downclock mode of the panel needs to be set independently
of DRRS so that the user can set the downclock mode on the panel
without enabling DRRS.
This patch sets the downclock mode in edp_init as opposed to
drrs_init to achieve this.
Suggested-by: Jani Nikula
Cc: Jani Nikula
Cc: Ville Syrjala
S
This patch fixes the original commit c0cfb10d9e1de49 ("drm/i915/edp:
Do not do link training fallback or prune modes on EDP") that causes
a blank screen in case of certain eDP panels (Eg: seen on Dell XPS13 9350)
where first link training fails and a retraining is required by falling
back to lower
If link training fails on eDP then we fallback to lower link rate
and lane count. If the fallback link BW cannot fit the panel's native
mode and if the downclock mode exists then we should check if the fallback
BW can fit this downclock mode.
Suggested-by: Jani Nikula
Cc: Jani Nikula
Cc: Ville S
== Series Details ==
Series: series starting with [1/2] drm/i915: Limit the backpressure for
i915_request allocation (rev2)
URL : https://patchwork.freedesktop.org/series/49564/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4813_full -> Patchwork_10157_full =
== Summary -
Em Qua, 2018-09-12 às 09:31 -0500, Gustavo A. R. Silva escreveu:
> Function intel_port_to_tc() returns PORT_TC_NONE on error, which is
> a negative value -1. In case PORT_TC_NONE is returned, there is an
> undefined behavior when shifting by a negative number of bits in
> both DP_PHY_MODE_STATUS_NO
== Series Details ==
Series: drm/i915/dp: fix shifting by a negative number of bits
URL : https://patchwork.freedesktop.org/series/49565/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4812_full -> Patchwork_10156_full =
== Summary - SUCCESS ==
No regressions found.
On Wed, Sep 12, 2018 at 3:05 AM Bruno Prémont wrote:
>
> Hi,
>
> I have a system with multiple monitors and would like to send
> notification sounds to the monitor on which corresponding
> window is visible.
>
> For a workstation and a tiny computer things look different:
> - workstation (Intel(R)
On Wed, 2018-09-12 at 13:55 +0100, Chris Wilson wrote:
> Quoting Ville Syrjälä (2018-09-12 13:48:42)
> > On Tue, Sep 11, 2018 at 06:19:56PM -0700, José Roberto de Souza
> > wrote:
> > > Without this gem will not be able to turn off DC states to
> > > redunce
> > > interruption latency when no sink
== Series Details ==
Series: series starting with [1/2] drm/i915: Balance prepare_fb/cleanup_fb
URL : https://patchwork.freedesktop.org/series/49579/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4813 -> Patchwork_10162 =
== Summary - SUCCESS ==
No regressions found.
On Tue, Sep 11, 2018 at 05:56:01PM -0700, Manasi Navare wrote:
> On Icelake, a separate power well PG2 is created for
> VDSC engine used for eDP/MIPI DSI.
bikeshed: To be more precise the PG2 wasn't *created*
here, but it was reserved only for VDSC on eDP/MIPI use
and everything else that was prev
== Series Details ==
Series: Add XYUV format support (rev6)
URL : https://patchwork.freedesktop.org/series/48007/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4810_full -> Patchwork_10154_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues ==
He
From: Ville Syrjälä
intel_prepare_plane_fb() bails early if there is no fb (or rather
no obj, which is the same thing). intel_cleanup_plane_fb() does not.
This means the steps performed by intel_cleanup_plane_fb() aren't
balanced with with what was done intel_prepare_plane_fb() if there
is no fb
From: Ville Syrjälä
We've already pinned the vma and fence by the time we try to
deal with implicit fencing. Properly unpin the vma and fence
if the fence wait fails instead of just bailing straight out
from .prepare_fb(). As can be expected
drm_atomic_helper_prepare_planes() will not call .clean
Swati Sharma kirjoitti 12.9.2018 klo 13.32:
From: Vidya Srinivas
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/intel_display.c | 15 +++
drivers/gpu/drm/i915/intel_sprite.c | 3 +++
2 files changed, 18 insertions(+)
diff --git a/driver
On Wed, Sep 12, 2018 at 04:59:10PM +0300, Jani Nikula wrote:
> commit 6209c285e7a5e68dbcdf8fd2456c6dd68433806b upstream.
Thanks for the backport, now queued up.
greg k-h
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedeskt
== Series Details ==
Series: drm/i915: Fix a potential integer overflow with framebuffers extending
past 4 GiB (rev2)
URL : https://patchwork.freedesktop.org/series/49495/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4813 -> Patchwork_10161 =
== Summary - SUCCESS ==
No
On Wed, 12 Sep 2018 15:18:47 +0200,
Imre Deak wrote:
>
> +Takashi
>
> On Wed, Sep 12, 2018 at 04:18:12PM +0300, Imre Deak wrote:
> > Hi Kumar, Takashi,
> >
> > On Tue, Jun 19, 2018 at 03:01:11PM -0700, Abhay Kumar wrote:
> > > From: Ville Syrjälä
> > >
> > > CDCLK has to be at least twice the
== Series Details ==
Series: drm/i915: Fix a potential integer overflow with framebuffers extending
past 4 GiB (rev2)
URL : https://patchwork.freedesktop.org/series/49495/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Fix a potential integer overflow with framebu
On Wed, 12 Sep 2018 19:46:58 +0200,
Ville Syrjälä wrote:
>
> On Tue, Sep 11, 2018 at 03:50:13PM +0200, Bruno Prémont wrote:
> > Hi,
> >
> > I have a system with multiple monitors and would like to send
> > notification sounds to the monitor on which corresponding
> > window is visible.
> >
> > F
From: Ville Syrjälä
If we have framebuffers that are >= 4GiB in size we will overflow
the fb size check in intel_fill_fb_info().
Currently that is only possible with NV12 and CCS as offsets[1]
may be anything between 0 and 0x. offsets[0] is currently
required to be 0 so we can't hit the
On Wed, Sep 12, 2018 at 03:06:41PM +0530, Madhav Chauhan wrote:
> On 7/19/2018 9:52 PM, Ville Syrjälä wrote:
> > On Tue, Jul 10, 2018 at 03:10:12PM +0530, Madhav Chauhan wrote:
> >> This patch adds _MMIO_DSI and _DSI_TRANS macros for accessing
> >> DSI transcoder registers.
> >>
> >> Credits-to: Ja
On Tue, Sep 11, 2018 at 03:50:13PM +0200, Bruno Prémont wrote:
> Hi,
>
> I have a system with multiple monitors and would like to send
> notification sounds to the monitor on which corresponding
> window is visible.
>
> For a workstation and a tiny computer things look different:
> - workstation
== Series Details ==
Series: series starting with [1/3] drm/i915: Limit the backpressure for
i915_request allocation
URL : https://patchwork.freedesktop.org/series/49572/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4813 -> Patchwork_10160 =
== Summary - SUCCESS ==
No
== Series Details ==
Series: drm/i915: Rename full ppgtt configuration to be more generic (rev4)
URL : https://patchwork.freedesktop.org/series/49021/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4813 -> Patchwork_10159 =
== Summary - SUCCESS ==
No regressions found.
On Tue, Sep 11, 2018 at 12:17:05PM +0200, Martin Steigerwald wrote:
> Cc´d Intel Gfx mailing list, in case somebody there knows something:
>
> Cc´d Thorsten for regression tracking… forgot initially. Can also open
> bug report at a later time but so far I cannot provide many details
> about the
== Series Details ==
Series: i915/oa: Simplify updating contexts
URL : https://patchwork.freedesktop.org/series/49569/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4813 -> Patchwork_10158 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwor
Under mempressure, our goal is to allow ourselves sufficient time to
reclaim the RCU protected slabs without overly penalizing our clients.
Currently, we use a 1 jiffie wait if the client is still active as a
means of throttling the allocations, but we can instead wait for the end
of the RCU grace
If we try and fail to allocate a i915_request, we apply some
backpressure on the clients to throttle the memory allocations coming
from i915.ko. Currently, we wait until completely idle, but this is far
too heavy and leads to some situations where the only escape is to
declare a client hung and res
Let's try not to overly penalize the unlucky client by making them wait
for others to complete their work, and only apply the ratelimit if they
themselves have outstanding work. Still, we apply global reclaim to the
client (we need to scavenge some memory for it) so it doesn't got away
completely s
== Series Details ==
Series: series starting with [1/2] drm/i915: Limit the backpressure for
i915_request allocation (rev2)
URL : https://patchwork.freedesktop.org/series/49564/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4813 -> Patchwork_10157 =
== Summary - SUCCESS ==
Am 12.09.2018 um 11:12 schrieb Chris Wilson:
Quoting Daniel Vetter (2018-09-12 10:02:47)
On Wed, Sep 12, 2018 at 10:50 AM, Chris Wilson wrote:
Quoting Daniel Vetter (2018-09-12 09:39:30)
On Wed, Sep 12, 2018 at 10:27 AM, Chris Wilson wrote:
If the ioctl is not supported on a particular piec
Cc´d Intel Gfx mailing list, in case somebody there knows something:
Cc´d Thorsten for regression tracking… forgot initially. Can also open
bug report at a later time but so far I cannot provide many details
about the issue.
Rafael J. Wysocki - 11.09.18, 10:17:
> On Tue, Sep 11, 2018 at 10:01 A
Hi,
I have a system with multiple monitors and would like to send
notification sounds to the monitor on which corresponding
window is visible.
For a workstation and a tiny computer things look different:
- workstation (Intel(R) Core(TM) i7-4770 CPU @ 3.40GHz):
00:02.0 VGA compatible controller [
Quoting Bob Paauwe (2018-09-12 17:04:30)
> diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> index 43ed8b28aeaa..33d7225edbbb 100644
> --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> +++ b/drivers/gpu/drm/i915/selftests/mo
On Wed, Sep 12, 2018 at 09:13:07AM +0100, Chris Wilson wrote:
> Quoting Ville Syrjala (2018-09-11 17:54:57)
> > From: Ville Syrjälä
> >
> > If we have framebuffers that are >= 4GiB in size we will overflow
> > the fb size check in intel_fill_fb_info().
> >
> > Currently that is only possible wit
48 bit ppgtt device configuration is really just extended address
range full ppgtt and may actually be something other than 48 bits.
Change USES_FULL_48BIT_PPGTT() to USES_4LVL_PPGTT() to better
describe that a 4 level walk table extended range PPGTT is being
used. Add a new device info field that
== Series Details ==
Series: drm/i915: Limit the backpressure for i915_request allocation
URL : https://patchwork.freedesktop.org/series/49555/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4809_full -> Patchwork_10153_full =
== Summary - SUCCESS ==
No regressions found.
Quoting Tvrtko Ursulin (2018-09-12 16:29:30)
> /*
> * The OA register config is setup through the context image. This
> image
> * might be written to by the GPU on context switch (in particular on
> @@ -1833,7 +1727,7 @@ static int gen8_configure_all_contexts(struct
> dr
On 12/09/2018 16:29, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
We can remove the update-via-batch-buffer code path, which is basically an
effective duplicate of update-via-context-image path, if we notice that
after we have idled the GPU, we can update the context image even of the
kernel cont
From: Tvrtko Ursulin
We can remove the update-via-batch-buffer code path, which is basically an
effective duplicate of update-via-context-image path, if we notice that
after we have idled the GPU, we can update the context image even of the
kernel context directly. (Update-via-batch-buffer path e
== Series Details ==
Series: drm/i915/dp: fix shifting by a negative number of bits
URL : https://patchwork.freedesktop.org/series/49565/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4812 -> Patchwork_10156 =
== Summary - SUCCESS ==
No regressions found.
External URL
== Series Details ==
Series: add LG panel to dpcd quirk database (rev2)
URL : https://patchwork.freedesktop.org/series/49413/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4809_full -> Patchwork_10152_full =
== Summary - SUCCESS ==
No regressions found.
== Known iss
On Fri, Sep 07, 2018 at 06:24:00PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> A reposting of all the reviewed prep stuff for the gtt remapping.
>
> Changes since the first posting:
> - fix the ilk+ x-tiled stride to be 32k
> - split out some unrelated changes (those were already pushe
Let's try not to overly penalize the unlucky client by making them wait
for others to complete their work, and only apply the ratelimit if they
themselves have outstanding work. Still, we apply global reclaim to the
client (we need to scavenge some memory for it) so it doesn't got away
completely s
Function intel_port_to_tc() returns PORT_TC_NONE on error, which is
a negative value -1. In case PORT_TC_NONE is returned, there is an
undefined behavior when shifting by a negative number of bits in
both DP_PHY_MODE_STATUS_NOT_SAFE and P_PHY_MODE_STATUS_COMPLETED
macros.
Fix this by adding sanity
Quoting Daniel Vetter (2018-09-12 15:47:21)
> On Wed, Sep 12, 2018 at 3:42 PM, Chris Wilson
> wrote:
> > Quoting Tvrtko Ursulin (2018-09-12 14:34:16)
> >>
> >> On 12/09/2018 12:11, Chris Wilson wrote:
> >> > If we try and fail to allocate a i915_request, we apply some
> >> > backpressure on the c
On Wed, Sep 12, 2018 at 3:42 PM, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2018-09-12 14:34:16)
>>
>> On 12/09/2018 12:11, Chris Wilson wrote:
>> > If we try and fail to allocate a i915_request, we apply some
>> > backpressure on the clients to throttle the memory allocations coming
>> > from
If we try and fail to allocate a i915_request, we apply some
backpressure on the clients to throttle the memory allocations coming
from i915.ko. Currently, we wait until completely idle, but this is far
too heavy and leads to some situations where the only escape is to
declare a client hung and res
Let's try not to overly penalize the unlucky client by making them wait
for others to complete their work, and only apply the ratelimit if they
themselves have outstanding work. Still, we apply global reclaim to the
client (we need to scavenge some memory for it) so it doesn't got away
completely s
== Series Details ==
Series: drm/i915: Reorder execobject[] to insert non-48b objects into the low 4G
URL : https://patchwork.freedesktop.org/series/49548/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4809_full -> Patchwork_10150_full =
== Summary - WARNING ==
Minor unk
On 9/12/2018 6:25 AM, Manasi Navare wrote:
This patch adds inline functions and helpers for obtaining
DP sink's supported DSC parameters like DSC sink support,
eDP compressed BPP supported, maximum slice count supported
by the sink devices, DSC line buffer bit depth supported on DP sink,
DSC si
== Series Details ==
Series: drm/i915: set DP Main Stream Attribute for color range on DDI platforms
(rev2)
URL : https://patchwork.freedesktop.org/series/48145/
State : failure
== Summary ==
Applying: drm/i915: set DP Main Stream Attribute for color range on DDI
platforms
Using index info t
commit 6209c285e7a5e68dbcdf8fd2456c6dd68433806b upstream.
Since Haswell we have no color range indication either in the pipe or
port registers for DP. Instead, there's a separate register for setting
the DP Main Stream Attributes (MSA) directly. The MSA register
definition makes no references to c
On 12/09/2018 14:38, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-09-12 14:34:16)
On 12/09/2018 12:11, Chris Wilson wrote:
If we try and fail to allocate a i915_request, we apply some
backpressure on the clients to throttle the memory allocations coming
from i915.ko. Currently, we wait un
On Wed, Sep 12, 2018 at 04:18:12PM +0300, Imre Deak wrote:
> Hi Kumar, Takashi,
>
> On Tue, Jun 19, 2018 at 03:01:11PM -0700, Abhay Kumar wrote:
> > From: Ville Syrjälä
> >
> > CDCLK has to be at least twice the BLCK regardless of audio. Audio
> > driver has to probe using this hook and increase
On 12/09/2018 10:07, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-09-12 09:48:00)
On 07/09/2018 12:43, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-09-07 12:14:20)
From: Tvrtko Ursulin
Proposal to add test tags as a replacement for separate test
list which can be difficult to maint
On 9/12/2018 6:25 AM, Manasi Navare wrote:
This patch defines the DP DSC receiver capability size that gives
total number of DP DSC DPCD registers.
This also adds a missing #defines for DP DSC support missed in the
commit id (ab6a46ea6842ce "Add DPCD definitions for DP 1.4 DSC feature")
v3:
*
Quoting Tvrtko Ursulin (2018-09-12 14:34:16)
>
> On 12/09/2018 12:11, Chris Wilson wrote:
> > If we try and fail to allocate a i915_request, we apply some
> > backpressure on the clients to throttle the memory allocations coming
> > from i915.ko. Currently, we wait until completely idle, but this
Quoting Tvrtko Ursulin (2018-09-12 14:34:16)
>
> On 12/09/2018 12:11, Chris Wilson wrote:
> > If we try and fail to allocate a i915_request, we apply some
> > backpressure on the clients to throttle the memory allocations coming
> > from i915.ko. Currently, we wait until completely idle, but this
On 12/09/2018 12:11, Chris Wilson wrote:
If we try and fail to allocate a i915_request, we apply some
backpressure on the clients to throttle the memory allocations coming
from i915.ko. Currently, we wait until completely idle, but this is far
too heavy and leads to some situations where the onl
== Series Details ==
Series: Add XYUV format support (rev6)
URL : https://patchwork.freedesktop.org/series/48007/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4810 -> Patchwork_10154 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10154 need to be
On 12.09.2018 13:32, Swati Sharma wrote:
From: Vidya Srinivas
In this patch, a list for icl specific pixel formats is created
in which Y210, Y212 and Y216 pixel formats are added along with
legacy pixel formats for primary and sprite plane.
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Sri
+Takashi
On Wed, Sep 12, 2018 at 04:18:12PM +0300, Imre Deak wrote:
> Hi Kumar, Takashi,
>
> On Tue, Jun 19, 2018 at 03:01:11PM -0700, Abhay Kumar wrote:
> > From: Ville Syrjälä
> >
> > CDCLK has to be at least twice the BLCK regardless of audio. Audio
> > driver has to probe using this hook an
Hi Kumar, Takashi,
On Tue, Jun 19, 2018 at 03:01:11PM -0700, Abhay Kumar wrote:
> From: Ville Syrjälä
>
> CDCLK has to be at least twice the BLCK regardless of audio. Audio
> driver has to probe using this hook and increase the clock even in
> absence of any display.
>
> v2: Use atomic refcount
Quoting Ville Syrjälä (2018-09-12 13:48:42)
> On Tue, Sep 11, 2018 at 06:19:56PM -0700, José Roberto de Souza wrote:
> > Without this gem will not be able to turn off DC states to redunce
> > interruption latency when no sink is being driven by driver.
>
> Do we know that for sure this is still re
On Tue, Sep 11, 2018 at 06:19:56PM -0700, José Roberto de Souza wrote:
> Without this gem will not be able to turn off DC states to redunce
> interruption latency when no sink is being driven by driver.
Do we know that for sure this is still required? Some kind of test
results to confirm would be
== Series Details ==
Series: drm: Differentiate the lack of an interface from invalid parameter
(rev3)
URL : https://patchwork.freedesktop.org/series/49536/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4808_full -> Patchwork_10149_full =
== Summary - SUCCESS ==
No regr
On 12.09.2018 13:32, Swati Sharma wrote:
From: Vidya Srinivas
The following pixel formats are packed format that follows 4:2:2
chroma sampling. For memory represenation each component is
allocated 16 bits each. Thus each pixel occupies a DWORD.
Just to be clear I wouldn't use 'DWORD' here but
On 12.09.2018 13:32, Swati Sharma wrote:
From: Vidya Srinivas
Added needed plane control flag definitions for Y210, Y212 and
Y216 formats.
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/d
== Series Details ==
Series: drm/i915: Limit the backpressure for i915_request allocation
URL : https://patchwork.freedesktop.org/series/49555/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4809 -> Patchwork_10153 =
== Summary - SUCCESS ==
No regressions found.
Extern
Quoting Tvrtko Ursulin (2018-09-12 10:33:05)
> From: Tvrtko Ursulin
>
> Tests which call intel_require_memory currently always skip on simulation,
> unless they fail first due insufficient memory. This can create different
> outcomes depending on the simulation environment so move the simulation
Quoting Tvrtko Ursulin (2018-09-11 15:42:10)
> + last_with_engines = -1;
> + for (class = 0; class < ~0; class++) {
> + for (instance = 0; instance < ~0; instance++) {
> + int ret;
> +
> + sseu.class = class;
> +
== Series Details ==
Series: add LG panel to dpcd quirk database (rev2)
URL : https://patchwork.freedesktop.org/series/49413/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4809 -> Patchwork_10152 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://p
== Series Details ==
Series: Enable Y210, Y212, Y216 formats for ICL (rev2)
URL : https://patchwork.freedesktop.org/series/48729/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4809 -> Patchwork_10151 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork
On allocating a request, we apply some backpressure if we fail to
allocate a request. The backpressure we apply involves waiting for the
device to idle, causing a stall on the clients (trying to throttle heavy
allocators) and as we may be inside a plugged critical section, the only
way to idle the
If we try and fail to allocate a i915_request, we apply some
backpressure on the clients to throttle the memory allocations coming
from i915.ko. Currently, we wait until completely idle, but this is far
too heavy and leads to some situations where the only escape is to
declare a client hung and res
== Series Details ==
Series: Enable Y210, Y212, Y216 formats for ICL (rev2)
URL : https://patchwork.freedesktop.org/series/48729/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7d34116618f8 drm: Add Y210, Y212, Y216 format definitions and fourcc
-:38: WARNING:LONG_LINE: line ove
== Series Details ==
Series: drm/i915: Reorder execobject[] to insert non-48b objects into the low 4G
URL : https://patchwork.freedesktop.org/series/49548/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4809 -> Patchwork_10150 =
== Summary - SUCCESS ==
No regressions foun
From: Vidya Srinivas
In this patch, a list for icl specific pixel formats is created
in which Y210, Y212 and Y216 pixel formats are added along with
legacy pixel formats for primary and sprite plane.
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/intel_disp
These patches enable packed format YUV422-Y210, Y212 and Y216
for 10, 12 and 16 bit respectively for ICL.
For user space component IGT:WIP
v2: addressed review comments of mahesh and alexandru
hdr handling of these 64 bit pixel format not inscope
of this series
Vidya Srinivas (4):
drm
From: Vidya Srinivas
Added needed plane control flag definitions for Y210, Y212 and
Y216 formats.
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/
From: Vidya Srinivas
The following pixel formats are packed format that follows 4:2:2
chroma sampling. For memory represenation each component is
allocated 16 bits each. Thus each pixel occupies a DWORD.
Y210:Valid data occupies MSB 10 bits.
LSB 6 bits are filled with zeroes.
Y212:Valid data occ
From: Vidya Srinivas
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/intel_display.c | 15 +++
drivers/gpu/drm/i915/intel_sprite.c | 3 +++
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i
If the caller supplies more than 4G of objects and than one that has to
be in the low 4G, it is possible for the low 4G to be full before we
attempt to find room for the last object that must be there. As we don't
reorder the two types, every pass hits the same problem and we fail with
ENOSPC. Howe
== Series Details ==
Series: drm: Differentiate the lack of an interface from invalid parameter
(rev3)
URL : https://patchwork.freedesktop.org/series/49536/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4808 -> Patchwork_10149 =
== Summary - SUCCESS ==
No regressions fo
Quoting Chris Wilson (2018-09-11 14:57:46)
> If the caller supplies more than 4G of objects and than one that has to
> be in the low 4G, it is possible for the low 4G to be full before we
> attempt to find room for the last object that must be there. As we don't
> reorder the two types, every pass
Quoting Chris Wilson (2018-09-10 14:08:08)
> Baytrail takes a little more convincing that it needs to actually reload
> its Page Directoy (ppGTT) before the context switch, so repeat it until
> it gets the message. Once again the arbitrary values here are
> empirically derived.
>
> Bugzilla: https
On Wed, 12 Sep 2018, Madhav Chauhan wrote:
> On 9/12/2018 1:00 AM, Jani Nikula wrote:
>> On Tue, 10 Jul 2018, Madhav Chauhan wrote:
>> The convention is to define macros for field values that you can OR
>> directly in place instead of requiring a shift. Please stick to the
>> conventions. Use _SH
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