On Fri, 2018-09-14 at 20:05 +0300, Juha-Pekka Heikkilä wrote:
>
> Lisovskiy, Stanislav kirjoitti 14.9.2018 klo 17.30:
> > On Fri, 2018-09-14 at 16:47 +0300, Ville Syrjälä wrote:
> > > On Fri, Sep 14, 2018 at 01:36:32PM +, Lisovskiy, Stanislav
> > > wrote:
> > > > On Fri, 2018-09-07 at 11:45 +0
On Fri, 2018-09-14 at 14:59 +, Alexandru-Cosmin Gheorghe wrote:
> On Fri, Sep 14, 2018 at 02:49:09PM +, Lisovskiy, Stanislav wrote:
> > On Fri, 2018-09-14 at 15:34 +0100, Saarinen, Jani wrote:
> > > Hi,
> > >
> > > > -Original Message-
> > > > From: Intel-gfx [mailto:intel-gfx-bou
Hi,
On Mon, Sep 17, 2018 at 08:27:18AM +, Lisovskiy, Stanislav wrote:
> On Fri, 2018-09-14 at 14:59 +, Alexandru-Cosmin Gheorghe wrote:
> > On Fri, Sep 14, 2018 at 02:49:09PM +, Lisovskiy, Stanislav wrote:
> > > On Fri, 2018-09-14 at 15:34 +0100, Saarinen, Jani wrote:
> > > > Hi,
> >
On 17.09.2018 11:25, Lisovskiy, Stanislav wrote:
On Fri, 2018-09-14 at 20:05 +0300, Juha-Pekka Heikkilä wrote:
Lisovskiy, Stanislav kirjoitti 14.9.2018 klo 17.30:
On Fri, 2018-09-14 at 16:47 +0300, Ville Syrjälä wrote:
On Fri, Sep 14, 2018 at 01:36:32PM +, Lisovskiy, Stanislav
wrote:
On
On 14/09/2018 17:28, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-09-14 17:09:31)
+static int
+gen8_modify_rpcs_gpu(struct intel_context *ce,
+struct intel_engine_cs *engine,
+struct intel_sseu sseu)
+{
+ struct drm_i915_private *i915 = engine->
On 14/09/2018 17:17, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-09-14 17:04:38)
+static igt_spin_t *
+__post_set(int fd, unsigned int flags, uint32_t ctx, igt_spin_t *spin,
+ unsigned int expected)
+{
+ bool busy_reset = (flags & TEST_BUSY) &&
+ (fla
== Series Details ==
Series: ICELAKE DSI DRIVER (rev6)
URL : https://patchwork.freedesktop.org/series/44823/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4833 -> Patchwork_10202 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesk
Quoting Tvrtko Ursulin (2018-09-17 10:33:47)
>
> On 14/09/2018 17:17, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-09-14 17:04:38)
> >> +static igt_spin_t *
> >> +__post_set(int fd, unsigned int flags, uint32_t ctx, igt_spin_t *spin,
> >> + unsigned int expected)
> >> +{
> >> +
From: Lionel Landwerlin
Verify that the per-context dynamic SSEU uAPI works as expected.
To achieve that, in the absence of a better mechamism, we read the value
of PWR_CLK_STATE register, or use MI_SET_PREDICATE on platforms before
Cannonlake.
This register is written to by the GPU on context
On Fri, Sep 14, 2018 at 04:39:42PM +0300, Jani Nikula wrote:
> commit 6209c285e7a5e68dbcdf8fd2456c6dd68433806b upstream.
Now applied, thanks.
greg k-h
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listi
From: Lionel Landwerlin
We want to expose the ability to reconfigure the slices, subslice and
eu per context and per engine. To facilitate that, store the current
configuration on the context for each engine, which is initially set
to the device default upon creation.
v2: record sseu configurati
From: Tvrtko Ursulin
Timeline barrier allows serialization between different timelines.
After calling i915_timeline_set_barrier with a request, all following
submissions on this timeline will be set up as depending on this request,
or barrier. Once the barrier has been completed it automatically
From: Tvrtko Ursulin
Fix for Icelake input validation logic and more review feedback.
Lionel Landwerlin (2):
drm/i915: Record the sseu configuration per-context & engine
drm/i915/perf: lock powergating configuration to default when active
Tvrtko Ursulin (4):
drm/i915/execlists: Move RPCS
From: Tvrtko Ursulin
Configuring RPCS in context image just before pin is sufficient and will
come extra handy in one of the following patches.
v2:
* Split image setup a bit differently. (Chris Wilson)
v3:
* Update context image after reset as well - otherwise the application
of pinned def
From: Lionel Landwerlin
If some of the contexts submitting workloads to the GPU have been
configured to shutdown slices/subslices, we might loose the NOA
configurations written in the NOA muxes.
One possible solution to this problem is to reprogram the NOA muxes
when we switch to a new context.
From: Tvrtko Ursulin
We want to allow userspace to reconfigure the subslice configuration for
its own use case. To do so, we expose a context parameter to allow
adjustment of the RPCS register stored within the context image (and
currently not accessible via LRI). If the context is adjusted befor
From: Tvrtko Ursulin
When OA is active we want to lock the powergating configuration, but on
Icelake, users like the media stack will have issues if we lock to the
full device configuration.
Instead lock to a subset of (sub)slices which are currently a known
working configuration for all users.
== Series Details ==
Series: ICELAKE DSI DRIVER (rev6)
URL : https://patchwork.freedesktop.org/series/44823/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4833_full -> Patchwork_10202_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues ==
Here ar
Quoting Tvrtko Ursulin (2018-09-17 12:30:53)
> From: Tvrtko Ursulin
>
> Configuring RPCS in context image just before pin is sufficient and will
> come extra handy in one of the following patches.
>
> v2:
> * Split image setup a bit differently. (Chris Wilson)
>
> v3:
> * Update context image
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev4)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d32c1a36efbb drm/i915/execlists: Move RPCS setup to context pin
275b17e9ba45 drm/i915: Record the
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev4)
URL : https://patchwork.freedesktop.org/series/48194/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/execlists: Move RPCS setup to context pin
Okay!
Commit: drm/i915: Record the sseu co
Quoting Tvrtko Ursulin (2018-09-17 12:30:57)
> From: Tvrtko Ursulin
>
> We want to allow userspace to reconfigure the subslice configuration for
> its own use case. To do so, we expose a context parameter to allow
> adjustment of the RPCS register stored within the context image (and
> currently
Quoting Tvrtko Ursulin (2018-09-17 12:30:55)
> From: Lionel Landwerlin
>
> If some of the contexts submitting workloads to the GPU have been
> configured to shutdown slices/subslices, we might loose the NOA
> configurations written in the NOA muxes.
>
> One possible solution to this problem is t
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev4)
URL : https://patchwork.freedesktop.org/series/48194/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4833 -> Patchwork_10203 =
== Summary - SUCCESS ==
No regressions found.
External URL:
h
Quoting Tvrtko Ursulin (2018-09-17 12:28:12)
> From: Lionel Landwerlin
>
> Verify that the per-context dynamic SSEU uAPI works as expected.
>
> To achieve that, in the absence of a better mechamism, we read the value
> of PWR_CLK_STATE register, or use MI_SET_PREDICATE on platforms before
> Cann
== Series Details ==
Series: Per context dynamic (sub)slice power-gating (rev4)
URL : https://patchwork.freedesktop.org/series/48194/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4833_full -> Patchwork_10203_full =
== Summary - FAILURE ==
Serious unknown changes coming
From: Ville Syrjälä
Remove the local lvds fixed mode pointer from the sdvo encoder
structure and instead utilize intel_panel like everyone else.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_sdvo.c | 40 ---
1 file changed, 21 insertions(+), 19
From: Ville Syrjälä
SDVO encoders can have multiple different types of outputs hanging off
them. Currently the code tries to muck around with various is_foo
flags in the encoder to figure out which type its driving. That doesn't
work with atomic and other stuff, so let's nuke those flags and just
== Series Details ==
Series: series starting with [1/2] drm/i915/sdvo: Fix multi function encoder
stuff
URL : https://patchwork.freedesktop.org/series/49795/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
61a7c71555be drm/i915/sdvo: Fix multi function encoder stuff
-:86: CHECK:
== Series Details ==
Series: series starting with [1/2] drm/i915/sdvo: Fix multi function encoder
stuff
URL : https://patchwork.freedesktop.org/series/49795/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4833 -> Patchwork_10204 =
== Summary - SUCCESS ==
No regressions f
From: Tvrtko Ursulin
Move a really small test that invalid context is rejected under the
gem_ctx_exec umbrella.
v2:
* And actually fix the test so it does what it claims. And add more
variety in the invalid context id's it tests with. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin
---
tests
From: Tvrtko Ursulin
Lite restore is sufficiently covered in gem_exec_nop.
At the same time tidy code in the test a bit to bring it closer to today's
coding style.
Signed-off-by: Tvrtko Ursulin
Suggested-by: Chris Wilson
---
tests/gem_ctx_exec.c | 116 +++-
Quoting Tvrtko Ursulin (2018-09-17 16:46:18)
> From: Tvrtko Ursulin
>
> Move a really small test that invalid context is rejected under the
> gem_ctx_exec umbrella.
>
> v2:
> * And actually fix the test so it does what it claims. And add more
>variety in the invalid context id's it tests wi
Quoting Tvrtko Ursulin (2018-09-17 16:46:19)
> From: Tvrtko Ursulin
>
> Lite restore is sufficiently covered in gem_exec_nop.
>
> At the same time tidy code in the test a bit to bring it closer to today's
> coding style.
>
> Signed-off-by: Tvrtko Ursulin
> Suggested-by: Chris Wilson
Reviewed-
== Series Details ==
Series: series starting with [1/2] drm/i915/sdvo: Fix multi function encoder
stuff
URL : https://patchwork.freedesktop.org/series/49795/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4833_full -> Patchwork_10204_full =
== Summary - SUCCESS ==
No reg
DC5 and DC6 counter register tells about residency of DC5 and DC6.
These registers are same for SKL and ICL.
Signed-off-by: Jyoti Yadav
---
drivers/gpu/drm/i915/i915_debugfs.c | 3 ++-
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/driver
On Mon, Sep 17, 2018 at 12:49:35PM -0400, Jyoti Yadav wrote:
> DC5 and DC6 counter register tells about residency of DC5 and DC6.
> These registers are same for SKL and ICL.
>
> Signed-off-by: Jyoti Yadav
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 3 ++-
> drivers/gpu/drm/i915/i915_reg.h
From: Ville Syrjälä
Clean up some cases where we're dealing with GTT pages instead of
system pages to use I915_GTT_PAGE_SIZE instead of PAGE_SHIT. So
just replace the the shifts with mul/div as appropriate. These
are the easy ones, the rest probably need some actual thought.
No real changes in t
On Mon, Sep 17, 2018 at 06:15:03PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> SDVO encoders can have multiple different types of outputs hanging off
> them. Currently the code tries to muck around with various is_foo
> flags in the encoder to figure out which type its driving. That doe
== Series Details ==
Series: drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs
entry.
URL : https://patchwork.freedesktop.org/series/49800/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] driver
== Series Details ==
Series: drm/i915: Replace some PAGE_SHIFTs with I915_GTT_PAGE_SIZE
URL : https://patchwork.freedesktop.org/series/49801/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3ef2392b50ed drm/i915: Replace some PAGE_SHIFTs with I915_GTT_PAGE_SIZE
-:68: WARNING:UNSP
On Fri, 2018-09-14 at 10:11 +0200, Daniel Vetter wrote:
> On Thu, Sep 13, 2018 at 11:02 PM, Lyude Paul wrote:
> > Hm, one nitpick here. Since /sys/kernel/debug/dri/*/state creation depends
> > on
> > the driver supporting atomic, maybe it would be good to make it so that we
> > set
> > DRIVER_ATOM
On Mon, Sep 17, 2018 at 10:16:05AM -0700, Rodrigo Vivi wrote:
> On Mon, Sep 17, 2018 at 06:15:03PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > SDVO encoders can have multiple different types of outputs hanging off
> > them. Currently the code tries to muck around with various is_f
== Series Details ==
Series: drm/i915: Replace some PAGE_SHIFTs with I915_GTT_PAGE_SIZE
URL : https://patchwork.freedesktop.org/series/49801/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4834 -> Patchwork_10206 =
== Summary - WARNING ==
Minor unknown changes coming with
Hi Jyoti,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.19-rc4 next-20180913]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day
Hi Jyoti,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on v4.19-rc4 next-20180913]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.
>-Original Message-
>From: Vivi, Rodrigo
>Sent: Thursday, September 13, 2018 1:14 PM
>To: Srivatsa, Anusha
>Cc: intel-gfx@lists.freedesktop.org; Manna, Animesh
>; Deak, Imre ; Ausmus,
>James
>Subject: Re: [PATCH] drm/i915/icl: Enable DC9 as lowest possible state during
>screen-off
>
>On
== Series Details ==
Series: drm/i915: Replace some PAGE_SHIFTs with I915_GTT_PAGE_SIZE
URL : https://patchwork.freedesktop.org/series/49801/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4834_full -> Patchwork_10206_full =
== Summary - SUCCESS ==
No regressions found.
Ping -
Can we have this blob merged to linux-firmware.git please?
Anusha
From: Srivatsa, Anusha
Sent: Friday, September 7, 2018 10:02 AM
To: intel-gfx@lists.freedesktop.org
Subject: FW: linux-firmware pull request(ICL:DMC)
Adding ML.
Anusha
From: Srivatsa, Anusha
Sent: Wednesday, September 5,
All DRM_CLIENT capabilities are tied to KMS support, so returning
-EOPNOTSUPP when KMS is not supported.
v2: returning -EOPNOTSUPP(same value as posix ENOTSUP and available
in uapi) instead of -ENOTSUPP
Cc: Chris Wilson
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/drm_ioctl.c
On Fri, 2018-09-14 at 08:37 -0700, Rodrigo Vivi wrote:
> On Fri, Sep 14, 2018 at 05:52:39PM +0300, Ville Syrjälä wrote:
> > On Fri, Sep 14, 2018 at 07:18:44AM -0700, José Roberto de Souza
> > wrote:
> > > Instead of have the same code spread into 4 platforms lets share
> > > it.
> > > BXT do not ha
== Series Details ==
Series: drm: Return -EOPNOTSUPP in drm_setclientcap() when driver do not
support KMS
URL : https://patchwork.freedesktop.org/series/49816/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4834 -> Patchwork_10207 =
== Summary - WARNING ==
Minor unknown
== Series Details ==
Series: drm: Return -EOPNOTSUPP in drm_setclientcap() when driver do not
support KMS
URL : https://patchwork.freedesktop.org/series/49816/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4834_full -> Patchwork_10207_full =
== Summary - WARNING ==
Mino
On BDW+ the linear source buffer of 2d source copy needs to start from
cache line boundary based on hardware design. Apply this alignment policy
to all platforms accordingly.
v2: Apply these changes only to SKL+ for not breaking old platforms
based on code review (Chris).
v3: Apply these chan
On Tue, 2018-09-11 at 17:04 +0300, Ville Syrjälä wrote:
> On Thu, Sep 06, 2018 at 10:06:09PM -0700, Rodrigo Vivi wrote:
> > On Thu, Sep 06, 2018 at 04:52:02PM -0700, Dhinakaran Pandiyan
> > wrote:
> > > We have new tests and fixes in place since the feature was last
> > > disabled.
> > >
> > > Try
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/i915/i915_drv.c
between commit:
55ac5a1614f9 ("drm/i915: Attach the pci match data to the device upon
creation")
from the drm tree and commit:
1feb64c49d7f ("drm/i915: Clear DRIVER_ATOMIC on a per-
On Mon, Sep 17, 2018 at 5:10 PM Srivatsa, Anusha
wrote:
>
> Ping -
>
> Can we have this blob merged to linux-firmware.git please?
>
>
>
> Anusha
>
>
>
> From: Srivatsa, Anusha
> Sent: Friday, September 7, 2018 10:02 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: FW: linux-firmware pull reques
Use the newly added "max bpc" connector property to limit pipe bpp.
V3: Use drm_connector_state to access the "max bpc" property
V4: Initialize the drm property, add suuport to DP(Ville)
V5: Use the property in the connector and fix CI failure(Ville)
V6: Use the core function to attach max_bpc pro
At times 12bpc HDMI cannot be driven due to faulty cables, dongles
level shifters etc. To workaround them we may need to drive the output
at a lower bpc. Currently the user space does not have a way to limit
the bpc. The default bpc to be programmed is decided by the driver and
is run against conne
== Series Details ==
Series: series starting with [v6,1/2] drm: Add connector property to limit max
bpc
URL : https://patchwork.freedesktop.org/series/49825/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
46b90fc53a4c drm: Add connector property to limit max bpc
-:56: WARNING:M
== Series Details ==
Series: series starting with [v6,1/2] drm: Add connector property to limit max
bpc
URL : https://patchwork.freedesktop.org/series/49825/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm: Add connector property to limit max bpc
+
== Series Details ==
Series: series starting with [v6,1/2] drm: Add connector property to limit max
bpc
URL : https://patchwork.freedesktop.org/series/49825/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4835 -> Patchwork_10208 =
== Summary - SUCCESS ==
No regressions f
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