On Thu, Feb 07, 2019 at 07:22:37AM +, C, Ramalingam wrote:
> Sure. Intention was enabling the HDCP2.2 testing on CI for ICL. I will
> drop this patch, instead I will cherry-pick the one you have published
> for other branch.
We still need this for merging in some form, otherwise CI on our end
Hi Dave and Daniel, i915 display fixes for v5.0-rc6.
BR,
Jani.
The following changes since commit 8834f5600cf3c8db365e18a3d5cac2c2780c81e5:
Linux 5.0-rc5 (2019-02-03 13:48:04 -0800)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-fixes-20
If we haven't even begun executing the payload of the stalled request,
then we should not claim that its userspace context was guilty of
submitting a hanging batch.
v2: Check for context corruption before trying to restart.
v3: Preserve semaphores on skipping requests (need to keep the timelines
i
Sure. Intention was enabling the HDCP2.2 testing on CI for ICL. I will drop
this patch, instead I will cherry-pick the one you have published for other
branch.
Best Regards,
Ramalingam C
> -Original Message-
> From: Winkler, Tomas
> Sent: Thursday, February 7, 2019 12:47 PM
> To: C, R
Previously, we were able to rely on the recursive properties of
struct_mutex to allow us to serialise revoking mmaps and reacquiring the
FENCE registers with them being clobbered over a global device reset.
I then proceeded to throw out the baby with the bath water in order to
pursue a struct_mutex
On wedging, we mark all executing requests as complete and all pending
requests completed as soon as they are ready. Before unwedging though we
wish to flush those pending requests prior to restoring default
execution, and so we must wait. Do so interruptibly as we do not provide
the EINTR graceful
When declaring the GPU wedged, we do need to hit the GPU with the reset
hammer so that its state matches our presumed state during cleanup. If
the reset fails, it fails, and we may be unhappy but wedged. However, if
we are testing our wedge/unwedged handling, the desync carries over into
the next t
Currently, we may simultaneously release the fence register from both
fence_update() and i915_gem_restore_fences(). This is dangerous, so
defer the bookkeeping entirely to i915_gem_restore_fences() when the
device is asleep.
Reported-by: Mika Kuoppala
Signed-off-by: Chris Wilson
Cc: Mika Kuoppal
If we haven't even begun executing the payload of the stalled request,
then we should not claim that its userspace context was guilty of
submitting a hanging batch.
v2: Check for context corruption before trying to restart.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_lrc.c
Prevent concurrent set-wedge with ongoing resets (and vice versa) by
taking the same wedge_mutex around both operations.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_reset.c | 68 ++-
1 file changed, 40 insertions(+), 28 deletions(-)
diff --git a/drivers
Since we use the debugfs to recover the device after modifying the
i915.reset parameter, we need to be sure that we apply the reset and not
piggy-back onto a concurrent one in order for the parameter to take
effect.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_debugfs.c | 10 +++
Apply backpressure to hogs that emit requests faster than the GPU can
process them by waiting for their ring to be less than half-full before
proceeding with taking the struct_mutex.
This is a gross hack to apply throttling backpressure, the long term
goal is to remove the struct_mutex contention
>
> From: Tomas Winkler
>
> Add icelake device ids: ICP LP, N and H
>
> Signed-off-by: Tomas Winkler
NACK, this goes via mei driver submission process.
Please drop it from the series.
> ---
> drivers/misc/mei/hw-me-regs.h | 4
> drivers/misc/mei/pci-me.c | 4
> 2 files change
On Mon, Feb 04, 2019 at 09:14:40PM +0530, Ramalingam C wrote:
> The downgrade of the fullmodeset into fastset
> intel_encoder->update_pipe, in possible scenario, skips the En/Dis-able
> DDI. Hence breaks the HDCP state change handling.
>
> We also don't have any hdcp tests in CI, because the shard
Hi Ville,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on next-20190206]
[cannot apply to v5.0-rc4]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url
Hi Ville,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20190206]
[cannot apply to v5.0-rc4]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
== Series Details ==
Series: drm/i915: Implement HDCP2.2 (rev17)
URL : https://patchwork.freedesktop.org/series/38254/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM__full -> Patchwork_12164_full
Summary
---
**SUC
== Series Details ==
Series: drm/dsc: Add kernel documentation for DRM DP DSC helpers (rev3)
URL : https://patchwork.freedesktop.org/series/56206/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM__full -> Patchwork_12163_full
==
On Wed, 2019-02-06 at 13:18 -0800, José Roberto de Souza wrote:
> Changing the i915_edp_psr_debug was enabling, disabling or switching
> PSR version by directly calling intel_psr_disable_locked() and
> intel_psr_enable_locked(), what is not the default PSR path that will
> be executed by real users
== Series Details ==
Series: drm/i915/psr: Execute the default PSR code path when setting
i915_edp_psr_debug (rev4)
URL : https://patchwork.freedesktop.org/series/56013/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM__full -> Patchwork_12162_full
==
== Series Details ==
Series: series starting with [1/4] drm/i915: Add pipe crc tracepoint
URL : https://patchwork.freedesktop.org/series/56309/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM__full -> Patchwork_12161_full
On Wed, 2019-02-06 at 15:18 +0200, Ville Syrjälä wrote:
> On Wed, Feb 06, 2019 at 01:04:19AM +, Souza, Jose wrote:
> > On Tue, 2019-02-05 at 22:50 +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > The unused bits on PLANE_WM & co. are hardwired to zero. So no
> > > need to wor
== Series Details ==
Series: drm/i915: Implement HDCP2.2 (rev17)
URL : https://patchwork.freedesktop.org/series/38254/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_ -> Patchwork_12164
Summary
---
**SUCCESS**
== Series Details ==
Series: drm/i915: Implement HDCP2.2 (rev17)
URL : https://patchwork.freedesktop.org/series/38254/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: component: Add documentation
Okay!
Commit: components: multiple components for a devi
) On Wed, Feb 6, 2019 at 5:46 PM Daniel Vetter wrote:
>
> Component framework is extended to support multiple components for
> a struct device. These will be matched with different masters based on
> its sub component value.
>
> We are introducing this, as I915 needs two different components
> wit
== Series Details ==
Series: drm/i915: Implement HDCP2.2 (rev17)
URL : https://patchwork.freedesktop.org/series/38254/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
516981139a84 component: Add documentation
-:38: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
== Series Details ==
Series: drm/dsc: Add kernel documentation for DRM DP DSC helpers (rev3)
URL : https://patchwork.freedesktop.org/series/56206/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_ -> Patchwork_12163
Summar
== Series Details ==
Series: drm/i915: Don't set update_wm_post on g4x+
URL : https://patchwork.freedesktop.org/series/56303/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5553_full -> Patchwork_12160_full
Summary
---
== Series Details ==
Series: drm/i915/psr: Execute the default PSR code path when setting
i915_edp_psr_debug (rev4)
URL : https://patchwork.freedesktop.org/series/56013/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_ -> Patchwork_12162
== Series Details ==
Series: series starting with [1/4] drm/i915: Add pipe crc tracepoint
URL : https://patchwork.freedesktop.org/series/56309/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_ -> Patchwork_12161
Summary
-
== Series Details ==
Series: drm: Nuke drm_calc_{h,v}scale_relaxed()
URL : https://patchwork.freedesktop.org/series/56300/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5553_full -> Patchwork_12159_full
Summary
---
*
Pruning 4k60 modes.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdmi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index c2c91e6645a5..d60713cd658c 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++
Daniel,
Due to significant changes @unbind and cleanup, i have dropped your r-b.
Please review it again.
--Ram
On 2/7/2019 2:33 AM, Ramalingam C wrote:
Defining the mei-i915 interface functions and initialization of
the interface.
v2:
Adjust to the new interface changes. [Tomas]
Added
This patch adds appropriate kernel documentation for DRM DP helpers
used for enabling Display Stream compression functionality in
drm_dp_helper.h and drm_dp_helper.c as well as for the DSC spec
related structure definitions and helpers in drm_dsc.c and drm_dsc.h
Also add links between the functions
Daniel,
Could we process this for merger? Or anything is pending from myside?
--Ram
On 2/4/2019 9:14 PM, Ramalingam C wrote:
The downgrade of the fullmodeset into fastset
intel_encoder->update_pipe, in possible scenario, skips the En/Dis-able
DDI. Hence breaks the HDCP state change handling.
On 2/6/2019 3:57 PM, Winkler, Tomas wrote:
Request ME FW to start the HDCP2.2 session for an intel port.
Prepares payloads for command WIRED_INITIATE_HDCP2_SESSION and
sends
to
ME FW.
On Success, ME FW will start a HDCP2.2 session for the port and
provides the content for HDCP2.2 AKE_Init m
== Series Details ==
Series: series starting with [1/4] drm/i915: Add pipe crc tracepoint
URL : https://patchwork.freedesktop.org/series/56309/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f8b2e309e24f drm/i915: Add pipe crc tracepoint
-:56: CHECK:OPEN_ENDED_LINE: Lines should
Changing the i915_edp_psr_debug was enabling, disabling or switching
PSR version by directly calling intel_psr_disable_locked() and
intel_psr_enable_locked(), what is not the default PSR path that will
be executed by real users.
So lets force a fastset in the PSR CRTC to trigger a pipe update and
FOR TESTING PURPOSE ONLY.
By default INTEL_MEI_HDCP is set to y. This patch is created to
test the interface between I915 and MEI_HDCP.
Signed-off-by: Ramalingam C
---
drivers/misc/mei/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfi
Request the ME to terminate the HDCP2.2 session for a port.
On Success, ME FW will mark the intel port as Deauthenticated and
terminate the wired HDCP2.2 Tx session started due to the cmd
WIRED_INITIATE_HDCP2_SESSION.
v2: Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comme
Request to ME to configure a port as authenticated.
On Success, ME FW will mark the port as authenticated and provides
HDCP cipher with the encryption keys.
Enabling the Authentication can be requested once all stages of
HDCP2.2 authentication is completed by interacting with ME FW.
Only after t
Just excluding the LSPCon HDMI ports from the HDCP1.4 testing.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/i915_debugfs.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 0bd89
Mei hdcp driver is designed as component slave for the I915 component
master.
v2: Rebased.
v3:
Notifier chain is adopted for cldev state update [Tomas]
v4:
Made static dummy functions as inline in mei_hdcp.h
API for polling client device status
IS_ENABLED used in header, for config status
Request to ME to verify the LPrime received from HDCP sink.
On Success, ME FW will verify the received Lprime by calculating and
comparing with L.
This represents the completion of Locality Check.
v2: Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and cast are rem
Request to ME to verify the M_Prime received from the HDCP sink.
ME FW will calculate the M and compare with M_prime received
as part of RepeaterAuth_Stream_Ready, which is HDCP2.2 protocol msg.
On successful completion of this stage, downstream propagation of
the stream management info is comple
Request to ME to prepare the encrypted session key.
On Success, ME provides Encrypted session key. Function populates
the HDCP2.2 authentication msg SKE_Send_Eks.
v2: Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and cast are removed [Tomas]
v4:
%zd for ssize_t
Requests for the verification of AKE_Send_H_prime.
ME will calculate the H and comparing it with received H_Prime.
The result will be returned as status.
Here AKE_Send_H_prime is a HDCP2.2 Authentication msg.
v2: Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and
The downgrade of the fullmodeset into fastset
intel_encoder->update_pipe, in possible scenario, skips the En/Dis-able
DDI. Hence breaks the HDCP state change handling.
We also don't have any hdcp tests in CI, because the shard runs don't
have hdcp capable outputs :-/
So this change fixs it by han
HDCP transmitter is supposed to indicate the HDCP encryption status of
the link through enc_en signals in a window of time called "window of
opportunity" defined by HDCP HDMI spec.
But on KBL this timing of signalling has an issue. To fix the issue this
WA of resetting the signalling is required.
Requests for verification for receiver certification and also the
preparation for next AKE auth message with km.
On Success ME FW validate the HDCP2.2 receivers certificate and do the
revocation check on the receiver ID. AKE_Stored_Km will be prepared if
the receiver is already paired, else AKE_No
Defines the HDCP specific ME FW interfaces such as Request CMDs,
payload structure for CMDs and their response status codes.
This patch defines payload size(Excluding the Header)for each WIRED
HDCP2.2 CMDs.
v2: Rebased.
v3:
Extra comments are removed.
v4:
%s/\/\*\*/\/\*
v5:
Extra lines are
Considering that HDCP2.2 is more secure than HDCP1.4, When a setup
supports HDCP2.2 and HDCP1.4, HDCP2.2 will be enabled.
When HDCP2.2 enabling fails and HDCP1.4 is supported, HDCP1.4 is
enabled.
This change implements a sequence of enabling and disabling of
HDCP2.2 authentication and HDCP2.2 por
Library functions for endianness are aligned for 16/32/64 bits.
But hdcp sequence numbers are 24bits(big endian).
So for their conversion to and from u32 helper functions are developed.
v2:
Comment is updated. [Daniel]
Reviewed-by Uma.
Signed-off-by: Ramalingam C
Reviewed-by: Daniel Vetter
Implements the HDCP2.2 repeaters authentication steps such as verifying
the downstream topology and sending stream management information.
v2: Rebased.
v3:
-EINVAL is returned for topology error and rollover scenario.
Endianness conversion func from drm_hdcp.h is used [Uma]
v4:
Rebased as pa
Requests ME to start the second stage of HDCP2.2 authentication,
called Locality Check.
On Success, ME FW will provide LC_Init message to send to hdcp sink.
v2: Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and cast are removed [Tomas]
v4:
%zd used for ssize_t [
Provides Pairing info to ME to store.
Pairing is a process to fast track the subsequent authentication
with the same HDCP sink.
On Success, received HDCP pairing info is stored in non-volatile
memory of ME.
v2: Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and ca
Request ME to verify the downstream topology information received.
ME FW will validate the Repeaters receiver id list and
downstream topology.
On Success ME FW will provide the Least Significant
128bits of VPrime, which forms the repeater ack.
v2: Rebased.
v3:
cldev is passed as first paramete
Request ME FW to start the HDCP2.2 session for an intel port.
Prepares payloads for command WIRED_INITIATE_HDCP2_SESSION and sends
to ME FW.
On Success, ME FW will start a HDCP2.2 session for the port and
provides the content for HDCP2.2 AKE_Init message.
v2: Rebased.
v3:
cldev is add as a sepa
From: Tomas Winkler
Whitelist HDCP client for in kernel drm use
v2:
Rebased.
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/bus-fixup.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/misc/mei/bus-fixup.c b/drivers/misc/mei/bus-fixup.c
index 80215c312f0e..5f
From: Tomas Winkler
Export to_mei_cl_device macro, it is needed also in mei client drivers.
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/bus.c | 1 -
include/linux/mei_cl_bus.h | 2 ++
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/misc/mei/bus.c b/drivers/misc/
From: Tomas Winkler
Add icelake device ids: ICP LP, N and H
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/hw-me-regs.h | 4
drivers/misc/mei/pci-me.c | 4
2 files changed, 8 insertions(+)
diff --git a/drivers/misc/mei/hw-me-regs.h b/drivers/misc/mei/hw-me-regs.h
index 23739a
ME FW contributes a vital role in HDCP2.2 authentication.
HDCP2.2 driver needs to communicate to ME FW for each step of the
HDCP2.2 authentication.
ME FW prepare and HDCP2.2 authentication parameters and encrypt them
as per spec. With such parameter Driver prepares HDCP2.2 auth messages
and commu
Time period for HDCP2.2 link check.
Signed-off-by: Ramalingam C
Reviewed-by: Daniel Vetter
Reviewed-by: Uma Shankar
---
include/drm/drm_hdcp.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index 7260b31af276..d4e98b11b4aa 100644
--- a/inclu
Implements the link integrity check once in 500mSec.
Once encryption is enabled, an ongoing Link Integrity Check is
performed by the HDCP Receiver to check that cipher synchronization
is maintained between the HDCP Transmitter and the HDCP Receiver.
On the detection of synchronization lost, the H
All HDCP1.4 routines are gathered together, followed by the generic
functions those can be extended for HDCP2.2 too.
Signed-off-by: Ramalingam C
Acked-by: Daniel Vetter
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_hdcp.c | 118 +++---
1 file changed,
Since DP ERRATA message is not defined at spec, those structure
definition is removed from drm_hdcp.h
Signed-off-by: Ramalingam C
Suggested-by: Daniel Vetter
Reviewed-by: Daniel Vetter
Reviewed-by: Uma Shankar
---
include/drm/drm_hdcp.h | 6 --
1 file changed, 6 deletions(-)
diff --git a
Implements the DP adaptation specific HDCP2.2 functions.
These functions perform the DPCD read and write for communicating the
HDCP2.2 auth message back and forth.
v2:
wait for cp_irq is merged with this patch. Rebased.
v3:
wait_queue is used for wait for cp_irq [Chris Wilson]
v4:
Style fix
Implements the
Waitqueue is created to wait for CP_IRQ
Signaling the CP_IRQ arrival through atomic variable.
For applicable DP HDCP2.2 msgs read wait for CP_IRQ.
As per HDCP2.2 spec "HDCP Transmitters must process CP_IRQ interrupts
when they are received from HDCP Receivers
Implements the HDMI adaptation specific HDCP2.2 operations.
Basically these are DDC read and write for authenticating through
HDCP2.2 messages.
v2: Rebased.
v3:
No more special handling of Gmbus burst read for AKE_SEND_CERT.
Style fixed with few naming. [Uma]
%s/PARING/PAIRING
v4:
msg_sz
When repeater notifies a downstream topology change, this patch
reauthenticate the repeater alone without disabling the hdcp
encryption. If that fails then complete reauthentication is executed.
v2:
Rebased.
v3:
Typo in commit msg is fixed [Uma]
v4:
Rebased as part of patch reordering.
Min
Add the HDCP2.2 initialization to the existing HDCP1.4 stack.
v2:
mei interface handle is protected with mutex. [Chris Wilson]
v3:
Notifiers are used for the mei interface state.
v4:
Poll for mei client device state
Error msg for out of mem [Uma]
Inline req for init function removed [Uma
"hdcp_encrypted" flag is defined to denote the HDCP1.4 encryption status.
This SW tracking is used to determine the need for real hdcp1.4 disable
and hdcp_check_link upon CP_IRQ.
On CP_IRQ we filter the CP_IRQ related to the states like Link failure
and reauthentication req etc and handle them in
Implements HDCP2.2 authentication for hdcp2.2 receivers, with
following steps:
Authentication and Key exchange (AKE).
Locality Check (LC).
Session Key Exchange(SKE).
DP Errata for stream type configuration for receivers.
At AKE, the HDCP Receiver’s public key certif
Header defines the interface for the I915 and MEI_HDCP drivers.
This interface is specific to the usage of mei_hdcp from gen9+
platforms for ME FW based HDCP2.2 services.
And Generic HDCP2.2 protocol specific definitions
are added at drm/drm_hdcp.h.
v2:
Commit msg is enhanced [Daniel]
v3:
i91
This series enables the HDCP2.2 Type 0 for I915. The sequence for
HDCP2.2 authentication and encryption is implemented as a generic flow
between HDMI and DP. Encoder specific implementations are moved
into hdcp_shim.
Intel HWs supports HDCP2.2 through ME FW. Hence this series
introduces a client d
From: Daniel Vetter
While typing these I think doing an s/component_master/aggregate/
would be useful:
- it's shorter :-)
- I think component/aggregate is much more meaningful naming than
component/puppetmaster or something like that. At least to my
English ear "aggregate" emphasizes much mor
Defining the mei-i915 interface functions and initialization of
the interface.
v2:
Adjust to the new interface changes. [Tomas]
Added further debug logs for the failures at MEI i/f.
port in hdcp_port data is equipped to handle -ve values.
v3:
mei comp is matched for global i915 comp master
From: Daniel Vetter
Since we need multiple components for I915 for different purposes
(Audio & Mei_hdcp), we adopt the subcomponents methodology introduced
by the previous patch (mentioned below).
Author: Daniel Vetter
Date: Mon Jan 28 17:08:20 2019 +0530
componen
From: Daniel Vetter
Now that component has docs it's worth spending a few words and
hyperlinks on recommended best practices in drm.
Cc: Russell King - ARM Linux admin
Signed-off-by: Daniel Vetter
---
Documentation/driver-api/component.rst | 2 ++
Documentation/gpu/drm-internals.rst| 5
From: Daniel Vetter
Component framework is extended to support multiple components for
a struct device. These will be matched with different masters based on
its sub component value.
We are introducing this, as I915 needs two different components
with different subcomponent value, which will be
From: Ville Syrjälä
Add tracepoints for pipe enable/disable. We'll include the
frame/scanline counters for all pipes in these tracepoints to
help in diagnosing underruns and whatnot when enabling/disabling
pipes in parallel with plane updates/flips on another pipe.
Signed-off-by: Ville Syrjälä
From: Ville Syrjälä
Add a tracepoint for pipe crc. Makes life much simpler when staring at
traces when hunting for fifo underruns and other issues which cause
corrupted frames. We'll add the tracepoint before filtering out any
potentially bogus crcs during modeset (should actually verify if that
From: Ville Syrjälä
intel_crtc_disable_planes() disables the planes so it should
trigger the appropriate tracepoint.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm
From: Ville Syrjälä
Wrap the .update_plane()/.update_slave()/.disable_plane() vfunc
calls into helpers which also take care to emit the appropriate
tracepoint.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 49 +--
drivers/gpu/drm/i915/intel_di
On Wed, Feb 06, 2019 at 05:46:51PM +0100, Noralf Trønnes wrote:
>
>
> Den 06.02.2019 16.26, skrev Daniel Vetter:
> > On Tue, Feb 05, 2019 at 06:57:50PM +0100, Noralf Trønnes wrote:
> >>
> >>
> >> Den 05.02.2019 17.31, skrev Daniel Vetter:
> >>> On Tue, Feb 05, 2019 at 11:20:55AM +0100, Noralf Trø
== Series Details ==
Series: Support 64 bpp half float formats (rev5)
URL : https://patchwork.freedesktop.org/series/53212/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5552_full -> Patchwork_12158_full
Summary
---
== Series Details ==
Series: drm/i915: Don't set update_wm_post on g4x+
URL : https://patchwork.freedesktop.org/series/56303/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5553 -> Patchwork_12160
Summary
---
**SUCCES
On Wed, 2019-01-30 at 14:46 +, Sasha Levin wrote:
> Hi,
>
> [This is an automated email]
>
> This commit has been processed because it contains a "Fixes:" tag,
> fixing commit: 0e32b39ceed6 drm/i915: add DP 1.2 MST support (v0.7).
>
> The bot has tested the following trees: v4.20.5, v4.19.18
On Tue, Jan 29, 2019 at 02:10:01PM -0500, Lyude Paul wrote:
> This hotplug also isn't needed: drm_dp_mst_topology_mgr_set_mst()
> already sends a hotplug on its own from drm_dp_destroy_connector_work()
> after destroying connectors in the MST topology.
>
> Signed-off-by: Lyude Paul
> Cc: Imre Dea
On Tue, Jan 29, 2019 at 02:10:00PM -0500, Lyude Paul wrote:
> We have a bad habit of calling drm_fb_helper_hotplug_event() far more
> then we actually need to. MST appears to be one of these cases, where we
> call drm_fb_helper_hotplug_event() if we fail to resume a connected MST
> topology in inte
== Series Details ==
Series: drm: Nuke drm_calc_{h,v}scale_relaxed()
URL : https://patchwork.freedesktop.org/series/56300/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5553 -> Patchwork_12159
Summary
---
**SUCCESS**
On Wed, Feb 06, 2019 at 08:54:33PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> update_wm_post is meant for pre-g4x only. Don't ever set
> it on g4x+.
>
> The only effect of a bogus update_wm_post on g4x+ could
> be that we clear the legacy_cursor_update flag in
> intel_atomic_commit().
From: Ville Syrjälä
update_wm_post is meant for pre-g4x only. Don't ever set
it on g4x+.
The only effect of a bogus update_wm_post on g4x+ could
be that we clear the legacy_cursor_update flag in
intel_atomic_commit(). Since legacy_cursor_update is
only set for legacy cursor updates (as the name
== Series Details ==
Series: drm/i915: Defer removing fence register tracking to rpm wakeup
URL : https://patchwork.freedesktop.org/series/56291/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5552_full -> Patchwork_12156_full
===
== Series Details ==
Series: Support 64 bpp half float formats (rev5)
URL : https://patchwork.freedesktop.org/series/53212/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5552 -> Patchwork_12158
Summary
---
**SUCCESS*
On Wed, Feb 6, 2019 at 1:32 PM Ville Syrjala
wrote:
>
> From: Ville Syrjälä
>
> The fuzzy drm_calc_{h,v}scale_relaxed() helpers are no longer used.
> Throw them in the bin.
>
> Signed-off-by: Ville Syrjälä
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/drm_rect.c | 108 --
From: Ville Syrjälä
The fuzzy drm_calc_{h,v}scale_relaxed() helpers are no longer used.
Throw them in the bin.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_rect.c | 108 -
include/drm/drm_rect.h | 6 ---
2 files changed, 114 deletions(-)
diff
== Series Details ==
Series: Support 64 bpp half float formats (rev5)
URL : https://patchwork.freedesktop.org/series/53212/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e6ee4ac0d854 drm/fourcc: Add 64 bpp half float formats
-:40: WARNING:LONG_LINE: line over 100 characters
#40
Daniel Vetter writes:
>
> Zooming out more looking at the big picture I'd say all your work in the
> past few years has enormously simplified drm for simple drivers already.
> If we can't resolve this one here right now that just means you "only"
> made drm 98% simpler instead of maybe 99%. It's s
Quoting Patchwork (2019-02-06 18:01:31)
> == Series Details ==
>
> Series: series starting with [1/8] drm/i915: Hack and slash, throttle
> execbuffer hogs
> URL : https://patchwork.freedesktop.org/series/56294/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_5552 -> P
1 - 100 of 201 matches
Mail list logo
