On Thu, Feb 14, 2019 at 11:29:08PM +0200, Ville Syrjälä wrote:
> On Thu, Feb 14, 2019 at 12:47:23PM -0800, Rodrigo Vivi wrote:
> > On Thu, Feb 14, 2019 at 09:22:19PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > On skl the crc registers were extended to provide plane crcs
> >
This aim of this patch is to call guc_disable_communication in all
suspend paths. The reason to introduce this is to resolve a bug that
occured due to suspend late not being called in the hibernate devices
path.
Cc: Daniele Ceraolo Spurio
Cc: Michal Wajdeczko
Signed-off-by: Sujaritha Sundaresan
The aim of this patch is to allow enabling and disabling
of CTB without requiring the mutex lock.
Cc: Daniele Ceraolo Spurio
Cc: Michal Wajdeczko
Signed-off-by: Sujaritha Sundaresan
---
drivers/gpu/drm/i915/intel_guc.c| 12
drivers/gpu/drm/i915/intel_guc_ct.c | 85
The work was started to fix bugs that were seen on the
suspend and hibernate devices path.The initial issue to be seen
was a warning with the CTB. In parallel there were issues seen on the
suspend paths. This series works to resolve the errors in the GuC
cleanup paths and be compatible with lockl
== Series Details ==
Series: drm/i915/selftests: Always use an active engine while resetting
URL : https://patchwork.freedesktop.org/series/56633/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5601_full -> Patchwork_12218_full
==
The kms_flip test relies on VBlank support, and this situation may
exclude some virtual drivers to take advantage of this set of tests.
This commit adds a mechanism that checks if a module has VBlank. If the
target module has VBlank support, kms_flip will run all the VBlank
tests; otherwise, the VB
On Thu, Feb 14, 2019 at 12:47:23PM -0800, Rodrigo Vivi wrote:
> On Thu, Feb 14, 2019 at 09:22:19PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > On skl the crc registers were extended to provide plane crcs
> > for up to 7 planes. Add the new crc sources.
> >
> > The current code us
Quoting Chris Wilson (2019-02-14 21:15:17)
> Quoting Matthew Auld (2019-02-14 14:57:32)
> > From: Abdiel Janulgue
> >
> > Returns the available memory region areas supported by the HW.
>
> This should include references to the Vulkan spec to show how it can be
> used to convey the information re
Quoting Matthew Auld (2019-02-14 14:57:32)
> From: Abdiel Janulgue
>
> Returns the available memory region areas supported by the HW.
This should include references to the Vulkan spec to show how it can be
used to convey the information required by anv (and what must be
inferred by userspace). T
Quoting Chris Wilson (2019-02-14 16:33:55)
> Quoting Chris Wilson (2019-02-14 16:31:13)
> > Quoting Matthew Auld (2019-02-14 14:57:32)
> > > int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file
> > > *file)
> > > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915
On Thu, Feb 14, 2019 at 09:22:19PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> On skl the crc registers were extended to provide plane crcs
> for up to 7 planes. Add the new crc sources.
>
> The current code uses the ivb+ register definitions for skl+
> which does happen to work as the
On Thu, Feb 14, 2019 at 12:38:22PM -0800, Rodrigo Vivi wrote:
> On Thu, Feb 14, 2019 at 09:22:18PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > DP CRCs don't really work on g4x. If you want any CRCs on DP you must
> > select the CRC source before the port is enabled, otherwise the
Swati Sharma kirjoitti 13.2.2019 klo 15.25:
The following pixel formats are packed format that follows 4:2:2
chroma sampling. For memory represenation each component is
allocated 16 bits each. Thus each pixel occupies 32bit.
Y210: For each component, valid data occupies MSB 10 bits.
On Thu, Feb 14, 2019 at 09:22:18PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> DP CRCs don't really work on g4x. If you want any CRCs on DP you must
> select the CRC source before the port is enabled, otherwise the CRC
> source select bits simply ignore any writes to them. And once the
On Thu, Feb 14, 2019 at 09:22:17PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We assume that the index of the string in the crc source names
> array matches the enum value for the crc source. Let's use named
> initializers to make sure that is indeed the case even if someone
> rearrang
On Thu, Feb 14, 2019 at 09:22:16PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The "pipe" and "pf" crc sources are in fact the same thing.
> Remove the "pf" one.
>
> Signed-off-by: Ville Syrjälä
I wonder where this came from
Anyway, just by looking the current code:
Reviewed-by
== Series Details ==
Series: series starting with [1/4] drm/i915: Remove the "pf" crc source
URL : https://patchwork.freedesktop.org/series/56692/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5602 -> Patchwork_12224
Summar
== Series Details ==
Series: series starting with [1/4] drm/i915: Remove the "pf" crc source
URL : https://patchwork.freedesktop.org/series/56692/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Remove the "pf" crc source
-drivers/gpu/drm/i915
== Series Details ==
Series: series starting with [1/4] drm/i915: Remove the "pf" crc source
URL : https://patchwork.freedesktop.org/series/56692/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1d7270fc22b4 drm/i915: Remove the "pf" crc source
4c9ccf4ebd34 drm/i915: Use named in
From: Ville Syrjälä
DP CRCs don't really work on g4x. If you want any CRCs on DP you must
select the CRC source before the port is enabled, otherwise the CRC
source select bits simply ignore any writes to them. And once the port
is enabled we mustn't change the CRC source select until the port is
From: Ville Syrjälä
The "pipe" and "pf" crc sources are in fact the same thing.
Remove the "pf" one.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.h | 1 -
drivers/gpu/drm/i915/intel_pipe_crc.c | 6 ++
2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/dr
From: Ville Syrjälä
We assume that the index of the string in the crc source names
array matches the enum value for the crc source. Let's use named
initializers to make sure that is indeed the case even if someone
rearranges either the enum or the array.
Signed-off-by: Ville Syrjälä
---
driver
From: Ville Syrjälä
On skl the crc registers were extended to provide plane crcs
for up to 7 planes. Add the new crc sources.
The current code uses the ivb+ register definitions for skl+
which does happen to work as the plane1, plane2, and dmux/pf
bits happen the match what ivb+ had. So no bug i
On Wed, 2019-02-13 at 18:02 -0800, José Roberto de Souza wrote:
> As stated in CRC_CTL spec, after PSR entry state CRC will not be
> calculated anymore what is not a problem as IGT tests do some screen
> change and then request the pipe CRC right after the change so PSR
> will go to idle state and
The kernel must not return stale information back to userspace when they
create a new object. For that purpose, we always clear objects on
creation, so verify that this is so.
Signed-off-by: Chris Wilson
Cc: Matthew Auld
---
tests/i915/gem_create.c | 71 +
== Series Details ==
Series: Introduce memory region concept (including device local memory)
URL : https://patchwork.freedesktop.org/series/56683/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: support 1G pages for the 48b PPGTT
Okay!
Commit
== Series Details ==
Series: Introduce memory region concept (including device local memory)
URL : https://patchwork.freedesktop.org/series/56683/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3a398101dfda drm/i915: support 1G pages for the 48b PPGTT
e99e4b7bc632 drm/i915: enab
== Series Details ==
Series: drm/i915: Replace the fixed vblank evasion with a ewma of past update
times
URL : https://patchwork.freedesktop.org/series/56680/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5601 -> Patchwork_1
===
== Series Details ==
Series: drm/i915: Defer application of request banning to submission (rev2)
URL : https://patchwork.freedesktop.org/series/56626/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5599_full -> Patchwork_12217_full
==
== Series Details ==
Series: drm/i915: Replace the fixed vblank evasion with a ewma of past update
times
URL : https://patchwork.freedesktop.org/series/56680/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Replace the fixed vblank evasion wi
== Series Details ==
Series: Gen8+ GPU Watchdog Reset Support (rev2)
URL : https://patchwork.freedesktop.org/series/56587/
State : failure
== Summary ==
Applying: drm/i915: Add engine reset count in get-reset-stats ioctl
Applying: drm/i915: Watchdog timeout: IRQ handler for gen8+
Using index i
== Series Details ==
Series: series starting with [1/4] drm/i915/psr: Only lookup for enabled CRTCs
when forcing a fastset
URL : https://patchwork.freedesktop.org/series/56647/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5601 -> Patchwork_12220
=
The kernel must not return stale information back to userspace when they
create a new object. For that purpose, we always clear objects on
creation, so verify that this is so.
Signed-off-by: Chris Wilson
Cc: Matthew Auld
---
tests/i915/gem_create.c | 29 +
1 file cha
== Series Details ==
Series: series starting with [1/3] Revert "drm/i915: W/A for underruns with
WM1+ disabled on icl"
URL : https://patchwork.freedesktop.org/series/56621/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5599_full -> Patchwork_12216_full
===
== Series Details ==
Series: series starting with [1/4] drm/i915/psr: Only lookup for enabled CRTCs
when forcing a fastset
URL : https://patchwork.freedesktop.org/series/56647/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/psr: Only lookup f
== Series Details ==
Series: series starting with [1/4] drm/i915/psr: Only lookup for enabled CRTCs
when forcing a fastset
URL : https://patchwork.freedesktop.org/series/56647/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e53ec9ed5dc6 drm/i915/psr: Only lookup for enabled CRT
== Series Details ==
Series: drm/i915: Only try to stop engines after a failed reset
URL : https://patchwork.freedesktop.org/series/56636/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5601 -> Patchwork_12219
Summary
--
Quoting Chris Wilson (2019-02-14 16:31:13)
> Quoting Matthew Auld (2019-02-14 14:57:32)
> > int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file
> > *file)
> > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> > index 26d2274b5d2b..5a102a5cb415 100644
>
Quoting Matthew Auld (2019-02-14 14:57:32)
> int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file
> *file)
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 26d2274b5d2b..5a102a5cb415 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uap
Quoting Matthew Auld (2019-02-14 14:57:40)
> Hack patch to default all userspace allocations to LMEM. Useful for
> testing purposes.
One caveat to note is that userspace assumes objects start idle in
.write=CPU. That assumption may very well be put to the test, and go
unnoticed for quite a while..
Quoting Matthew Auld (2019-02-14 14:57:33)
> From: Abdiel Janulgue
>
> This call will specify which memory region an object should be placed.
>
> Note that changing the object's backing storage should be immediately
> done after an object is created or if it's not yet in use, otherwise
> this wi
Quoting Matthew Auld (2019-02-14 14:57:40)
> Hack patch to default all userspace allocations to LMEM. Useful for
> testing purposes.
>
> Signed-off-by: Matthew Auld
> Cc: Joonas Lahtinen
> Cc: Abdiel Janulgue
> ---
> drivers/gpu/drm/i915/i915_gem.c | 45 +++--
> 1 f
Quoting Matthew Auld (2019-02-14 14:57:27)
> +int i915_gem_vmf_fill_pages_cpu(struct drm_i915_gem_object *obj,
> +struct vm_fault *vmf,
> +pgoff_t page_offset)
> +{
> + struct vm_area_struct *area = vmf->vma;
> +
Quoting Matthew Auld (2019-02-14 14:57:29)
> From: Abdiel Janulgue
>
> If there is no aperture we can't use map_gtt to map dumb buffers, so we
> need a cpu-map based path to do it. We prefer map_gtt on platforms that
> do have aperture.
This is very hard as a standalone patch to see if you the s
Quoting Matthew Auld (2019-02-14 14:57:28)
> @@ -157,6 +163,10 @@ struct drm_i915_gem_object {
> unsigned int userfault_count;
> struct list_head userfault_link;
>
> + enum i915_cpu_mmap_origin_type mmap_origin;
> + atomic_t mmap_count;
> + u64 mmap_flags;
These
Quoting Matthew Auld (2019-02-14 14:57:26)
> From: Abdiel Janulgue
>
> In preparation for using multiple page-fault handlers depending
> on the object's backing storage.
>
> Signed-off-by: Abdiel Janulgue
> Cc: Joonas Lahtinen
> ---
> drivers/gpu/drm/i915/i915_gem.c | 112 +++-
Quoting Matthew Auld (2019-02-14 14:57:24)
> + void *s;
> + struct page *page;
> +
> + for_each_sgt_page(page, iter, vma->pages) {
> + s = kmap_atomic(page);
These pages are not coherent, so missing the point of using UC/WC access
to
== Series Details ==
Series: drm/i915/selftests: Always use an active engine while resetting
URL : https://patchwork.freedesktop.org/series/56633/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5601 -> Patchwork_12218
Summar
Quoting Matthew Auld (2019-02-14 14:57:18)
> + ret = mutex_lock_interruptible(&i915->drm.struct_mutex);
> + if (ret)
> + goto out_unpin;
> +
> + wakeref = intel_runtime_pm_get(i915);
But why wakeref in the middle?
> +
> + ret = i915_gem_object_set_to_wc_domain
Quoting Matthew Auld (2019-02-14 14:57:16)
> We need to support doing relocations from the CPU when dealing with LMEM
> objects.
Why not just use the GPU reloc? Please do explain the relative merits.
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.free
== Series Details ==
Series: drm/i915/psr: Bump vblank evasion time for seamless updates
URL : https://patchwork.freedesktop.org/series/56618/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5599_full -> Patchwork_12215_full
Quoting Matthew Auld (2019-02-14 14:57:12)
> We may be without a context to perform various internal blitter
> operations, for example when performing object migration. Piggybacking
> off the kernel_context is probably a bad idea, since it has other uses.
Explain why it is a worse idea than creati
Quoting Matthew Auld (2019-02-14 14:57:11)
> +static int i915_gem_object_fill_blt(struct i915_gem_context *ctx,
> + struct drm_i915_gem_object *obj,
> + u32 value)
> +{
> + struct drm_i915_private *i915 = to_i915(obj->base.de
Quoting Matthew Auld (2019-02-14 14:57:11)
> +static struct i915_vma *
> +__i915_gem_fill_blt(struct i915_vma *vma, u32 value)
> +{
> + struct drm_i915_private *i915 = to_i915(vma->obj->base.dev);
> + const int gen = INTEL_GEN(i915);
> + struct drm_i915_gem_object *obj;
> +
Quoting Matthew Auld (2019-02-14 14:57:11)
> diff --git a/drivers/gpu/drm/i915/intel_gpu_commands.h
> b/drivers/gpu/drm/i915/intel_gpu_commands.h
> index b96a31bc1080..f74ff1d095c2 100644
> --- a/drivers/gpu/drm/i915/intel_gpu_commands.h
> +++ b/drivers/gpu/drm/i915/intel_gpu_commands.h
> @@ -175,
Quoting Matthew Auld (2019-02-14 14:57:08)
> From: Abdiel Janulgue
Why?
So can something without a CPU visible struct page even have a pfn?
> Signed-off-by: Abdiel Janulgue
> Signed-off-by: Matthew Auld
> Cc: Joonas Lahtinen
> ---
> drivers/gpu/drm/i915/intel_region_lmem.c | 11 +++
Quoting Matthew Auld (2019-02-14 14:57:07)
> +int intel_memory_region_live_selftests(struct drm_i915_private *i915)
> +{
> + static const struct i915_subtest tests[] = {
> + SUBTEST(igt_lmem_create),
> + };
> + struct i915_gem_context *ctx;
> + struct drm_file
Quoting Matthew Auld (2019-02-14 14:57:03)
> Support basic eviction for regions.
>
> Signed-off-by: Matthew Auld
> Cc: Joonas Lahtinen
> Cc: Abdiel Janulgue
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 +
> drivers/gpu/drm/i915/i915_gem.c | 16
> drivers/gpu/dr
Quoting Matthew Auld (2019-02-14 14:57:02)
> +int
> +i915_memory_region_get_pages_buddy(struct drm_i915_gem_object *obj)
> +{
> + struct intel_memory_region *mem = obj->memory_region;
> + resource_size_t size = obj->base.size;
> + struct sg_table *st;
> + struct scatterlist
From: Abdiel Janulgue
Returns the available memory region areas supported by the HW.
Signed-off-by: Abdiel Janulgue
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_query.c | 57 +++
include/uapi/drm/i915_drm.h | 40 +
From: Abdiel Janulgue
Signed-off-by: Abdiel Janulgue
Cc: Matthew Auld
---
drivers/gpu/drm/i915/intel_region_lmem.c | 28 ++--
1 file changed, 26 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_region_lmem.c
b/drivers/gpu/drm/i915/intel_region_lmem.c
Intended for upstream testing so that we can still exercise the LMEM
plumbing and !HAS_MAPPABLE_APERTURE paths. Smoke tested on Skull Canyon
device. This works by allocating an intel_memory_region for a reserved
portion of system memory, which we treat like LMEM. For the LMEMBAR we
steal the apertu
From: Daniele Ceraolo Spurio
Skip both setup and cleanup of the aperture mapping if the HW doesn't
have an aperture bar.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Matthew Auld
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 34 ++---
1 file changed, 21 insertions(+), 13 dele
Hack patch to default all userspace allocations to LMEM. Useful for
testing purposes.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/i915_gem.c | 45 +++--
1 file changed, 43 insertions(+), 2 deletions(-)
diff --git a/d
We need to add support for pwrite'ing an LMEM object.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/intel_region_lmem.c | 73
1 file changed, 73 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_region_lmem.c
b/drive
We need to support copying from one object backing store to another for
object migration.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/i915_drv.h | 3 +
drivers/gpu/drm/i915/i915_gem.c | 187 ++
drive
From: Abdiel Janulgue
If there is no aperture we can't use map_gtt to map dumb buffers, so we
need a cpu-map based path to do it. We prefer map_gtt on platforms that
do have aperture.
Signed-off-by: Abdiel Janulgue
Cc: Daniele Ceraolo Spurio
Cc: Tvrtko Ursulin
Cc: Matthew Auld
---
drivers/g
From: Daniele Ceraolo Spurio
We can't fence anything without aperture.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Matthew Auld
---
drivers/gpu/drm/i915/i915_gem.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i9
We already exercise huge-pages for our other object types, so add LMEM
objects to the list. Also try our luck with 1G pages.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/selftests/huge_pages.c | 121 +++-
1 file changed, 120 inser
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/i915_gem.c| 6 ++
drivers/gpu/drm/i915/i915_gem_object.h | 2 ++
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 3f3195
Volatile objects are marked as DONTNEED while pinned, therefore once
unpinned the backing store can be discarded.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/i915_gem_object.h| 3 +-
drivers/gpu/drm/i915/intel_memory_region.c| 10 ++
From: Michal Wajdeczko
HWS placement restrictions can't just rely on HAS_LLC flag.
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_engine_cs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c
We need to add support for pread'ing an LMEM object.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/intel_region_lmem.c | 73
1 file changed, 73 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_region_lmem.c
b/driver
From: Abdiel Janulgue
This simplifies adding new query item objects.
Signed-off-by: Abdiel Janulgue
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_query.c | 40 ---
1 file changed, 26 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_query.c
From: Abdiel Janulgue
CPU mmap implementation depending on the object's backing pages.
At the moment we introduce shmem and local-memory BAR fault handlers
Note that the mmap type is done one at a time to circumvent the DRM
offset manager limitation. Note that we multiplex mmap_gtt and
mmap_offse
From: Abdiel Janulgue
In preparation for using multiple page-fault handlers depending
on the object's backing storage.
Signed-off-by: Abdiel Janulgue
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_gem.c | 112 +++-
1 file changed, 66 insertions(+), 46 deletions(
From: Abdiel Janulgue
Use the plumbing from the new mmap_offset infrastructure to
implement gtt-mmaps.
Signed-off-by: Abdiel Janulgue
Cc: Matthew Auld
---
drivers/gpu/drm/i915/i915_gem.c| 8
drivers/gpu/drm/i915/i915_gem_dmabuf.c | 14 ++
drivers/gpu/drm/i915/i91
From: Abdiel Janulgue
Nothing to enumerate yet...
Signed-off-by: Abdiel Janulgue
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 73 ++---
1 file changed, 67 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i91
From: Abdiel Janulgue
This call will specify which memory region an object should be placed.
Note that changing the object's backing storage should be immediately
done after an object is created or if it's not yet in use, otherwise
this will fail on a busy object.
Signed-off-by: Abdiel Janulgue
Support memory regions, as defined by a given (start, end), and allow
creating GEM objects which are backed by said region.
Signed-off-by: Matthew Auld
Signed-off-by: Abdiel Janulgue
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_drv.h
Support inserting 1G gtt pages into the 48b PPGTT.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/i915_debugfs.c | 4
drivers/gpu/drm/i915/i915_gem_gtt.c | 16 +---
drivers/gp
From: Abdiel Janulgue
Signed-off-by: Abdiel Janulgue
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/intel_region_lmem.c | 11 +++
drivers/gpu/drm/i915/intel_region_lmem.h | 3 +++
2 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_reg
In preparation for upcoming devices with device local memory, introduce the
concept of different memory regions, and a simple buddy allocator to manage
them.
At the end of the series are a couple of HAX patches which introduce a fake
local memory region for testing purposes. Currently smoke tested
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/i915_drv.h| 2 +
drivers/gpu/drm/i915/i915_gem.c| 89 ++
drivers/gpu/drm/i915/i915_gem_gtt.c| 11 ++-
drivers/gpu/drm/i915/intel_memory_region.c | 9
Convert stolen memory over to a region object. Still leaves open the
question with what to do with pre-allocated objects...
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/i915_drv.h| 3 +-
drivers/gpu/drm/i915/i915_gem_gtt.c| 1
Useful for debugging.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/i915_debugfs.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index fe
From: Daniele Ceraolo Spurio
If the aperture is not available in HW we can't use a ggtt slot and wc
copy, so fal back to regular kmap.
Signed-off-by: Daniele Ceraolo Spurio
Signed-off-by: Abdiel Janulgue
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 19
drivers/gpu/drm/i915/i915_gpu_er
From: Daniele Ceraolo Spurio
Done by returning -ENODEV from the map_gtt version ioctl.
Cc: Antonio Argenziano
Cc: Matthew Auld
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/i915_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/dri
From: Abdiel Janulgue
This allows page-faults from objects with different backing stores
from a single interface.
Signed-off-by: Abdiel Janulgue
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1
From: Abdiel Janulgue
We can create LMEM objects, but we also need to support mapping them
into kernel space for internal use.
Signed-off-by: Abdiel Janulgue
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_gem.c | 18 ++-
drivers/gpu/drm/i915/inte
From: Daniele Ceraolo Spurio
The following patches in the series will use it to avoid certain
operations when aperture is not available in HW.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Matthew Auld
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drive
We are going want to able to move objects between different regions
like system memory and local memory. In the future everything should
be just another region.
Signed-off-by: Matthew Auld
Signed-off-by: Abdiel Janulgue
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/i915_drv
We need to support doing relocations from the CPU when dealing with LMEM
objects.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
Cc: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 67 ++
1 file changed, 56 insertions(+), 11 deletions(-)
We may be without a context to perform various internal blitter
operations, for example when performing object migration. Piggybacking
off the kernel_context is probably a bad idea, since it has other uses.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm
Support clearing objects via the blitter engine. This is needed for LMEM
where we need to clear the backing store before handing the object to
userspace.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/d
For gen8+ platforms which support the 48b PPGTT, enable support for 1G
pages. Also enable for mock testing.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/i915_pci.c | 6 --
drivers/gpu/drm/i915/selftests/mock_gem_device.c | 3
Support basic eviction for regions.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_gem.c | 16
drivers/gpu/drm/i915/i915_gem_object.h| 7 ++
drivers/gpu/drm/i915
Quick and dirty test to exercise writing through LMEM from the GPU/CPU.
We currently don't have an LMEM region so these tests should just skip
for now.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
.../drm/i915/selftests/intel_memory_region.c | 225 ++
From: Abdiel Janulgue
Exposes available regions for the platform. Shared memory will
always be available.
Signed-off-by: Abdiel Janulgue
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_pci.c | 12
drivers/gpu/dr
Really simply buddy allocator.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_gem_buddy.c | 206 +
drivers/gpu/drm/i915/i915_gem_buddy.h | 118 ++
.
1 - 100 of 121 matches
Mail list logo
