Re: [Intel-gfx] [PATCH v2] drm/i915: Replace global_seqno with a hangcheck heartbeat seqno

2019-02-25 Thread Tvrtko Ursulin
On 26/02/2019 07:49, Chris Wilson wrote: To determine whether an engine has 'stuck', we simply check whether or not is still on the same seqno for several seconds. To keep this simple mechanism intact over the loss of a global seqno, we can simply add a new global heartbeat seqno instead. As we

[Intel-gfx] [PATCH v2] drm/i915: Replace global_seqno with a hangcheck heartbeat seqno

2019-02-25 Thread Chris Wilson
To determine whether an engine has 'stuck', we simply check whether or not is still on the same seqno for several seconds. To keep this simple mechanism intact over the loss of a global seqno, we can simply add a new global heartbeat seqno instead. As we cannot know the sequence in which requests

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Replace global_seqno with a hangcheck heartbeat seqno

2019-02-25 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-02-26 07:34:37) > > On 25/02/2019 18:40, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2019-02-25 17:59:40) > >> > >> On 25/02/2019 16:23, Chris Wilson wrote: > >>>static inline struct i915_priolist *to_priolist(struct rb_node *rb) > >>>{ > >>>return

[Intel-gfx] [PATCH 09/10] drm/i915: Populate downstream info for HDCP2.2

2019-02-25 Thread Ramalingam C
Populates the downstream info for HDCP2.2 encryption also. On success of encryption Blob is updated. Additional two variable are added to downstream info blob. Such as ver_in_force and content type. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_hdcp.c | 29

[Intel-gfx] [PATCH 08/10] drm/i915: Populate downstream info for HDCP1.4

2019-02-25 Thread Ramalingam C
Implements drm blob property cp_downstream_info property on HDCP capable connectors. Downstream topology info is gathered across authentication stages and stored in intel_hdcp. When HDCP authentication is complete, new blob with latest downstream topology information is updated to

[Intel-gfx] [PATCH 07/10] drm: Add CP downstream_info property

2019-02-25 Thread Ramalingam C
This patch adds CP downstream info blob property to the connectors. This enables the Userspace to read the information of HDCP authenticated downstream topology. Driver will updated this blob with all downstream information at the end of the authentication. Userspace need this informations to

[Intel-gfx] [PATCH 06/10] drm/i915: SRM parsing and revocation check for HDCP2

2019-02-25 Thread Ramalingam C
SRM blob with hdcp2 id is parsed and parsed list of revoked ids is used in the authentication process to identify the compromised HDCP sinks. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_hdcp.c | 86 +-- include/drm/drm_hdcp.h| 20

[Intel-gfx] [PATCH 05/10] drm/i915: Add revocation check on HDCP1.4 Ksvs

2019-02-25 Thread Ramalingam C
KSV list revocated by DCP LLC is provided as SRM Blob to kernel. Which is parsed and stored in intel_hdcp->revocated_ksv_list. This patch adds the revocation check for BKSV and KSV_FIFO in HDCP1.4 authentication. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_hdcp.c | 67

[Intel-gfx] [PATCH 02/10] drm/i915: Attach content type property

2019-02-25 Thread Ramalingam C
Attaches the content type property for HDCP2.2 capable connectors. Implements the update of content type from property and apply the restriction on HDCP version selection. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_ddi.c | 21 +++--

Re: [Intel-gfx] [PATCH 3/3] usb: typec: altmodes/displayport: Notify drm subsys of hotplug events

2019-02-25 Thread kbuild test robot
Hi Hans, I love your patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on next-20190225] [cannot apply to v5.0-rc8] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https

[Intel-gfx] [PATCH 00/10] HDCP2.2 Phase II

2019-02-25 Thread Ramalingam C
HDCP2.2 phase-II mojorly adds below features: Addition of three connector properties CP_Content_Type CP_SRM CP_Downstream_Info parsing for HDCP1.4 and 2.2 SRM Blobs Once HDCP1.4/2.2 authentication is completed gathering the

[Intel-gfx] [PATCH 10/10] drm/i915: debugfs: HDCP2.2 capability read

2019-02-25 Thread Ramalingam C
Adding the HDCP2.2 capability of HDCP src and sink info into debugfs entry "i915_hdcp_sink_capability" This helps the userspace tests to skip the HDCP2.2 test on non HDCP2.2 sinks. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/i915_debugfs.c | 13 +++--

[Intel-gfx] [PATCH 01/10] drm: Add CP content type property

2019-02-25 Thread Ramalingam C
This patch adds a DRM ENUM property to the selected connectors. This property is used for pass the protected content's type from userspace to kernel HDCP authentication. Type of the stream is decided by the protected content providers as Type 0/1. Type 0 content can be rendered on any HDCP

[Intel-gfx] [PATCH 04/10] drm/i915: Add HDCP SRM Blob parsing

2019-02-25 Thread Ramalingam C
This patch adds a drm blob property to selected connectors. And also adds capability to parse the new HDCP1.4 srm blob passed through cp_srm_property. The revocated KSV list and their counts are stored in the intel_hdcp. This list should be used for revocation check of BKSVs in first stage HDCP

[Intel-gfx] [PATCH 03/10] drm: Add CP System Renewability Msg Property

2019-02-25 Thread Ramalingam C
This patch adds a drm blob property to the selected connector. This property will be used to pass the SRM Blob ID from userspace to kernel. Revocated ksv list from SRM Table will be used by the kernel in the HDCP authentication. Kernel doesn't validate the incoming SRM table or store it in

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Replace global_seqno with a hangcheck heartbeat seqno

2019-02-25 Thread Tvrtko Ursulin
On 25/02/2019 18:40, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-02-25 17:59:40) On 25/02/2019 16:23, Chris Wilson wrote: static inline struct i915_priolist *to_priolist(struct rb_node *rb) { return rb_entry(rb, struct i915_priolist, node); @@ -2206,6 +2212,10 @@ static u32

Re: [Intel-gfx] [PATCH v6 1/3] drm: Add CRTC background color property (v5)

2019-02-25 Thread Maarten Lankhorst
Hey, Op 21-02-2019 om 01:28 schreef Matt Roper: > Some display controllers can be programmed to present non-black colors > for pixels not covered by any plane (or pixels covered by the > transparent regions of higher planes). Compositors that want a UI with > a solid color background can

[Intel-gfx] ✓ Fi.CI.IGT: success for Polish DRAM information readout code

2019-02-25 Thread Patchwork
== Series Details == Series: Polish DRAM information readout code URL : https://patchwork.freedesktop.org/series/57213/ State : success == Summary == CI Bug Log - changes from CI_DRM_5659_full -> Patchwork_12301_full Summary ---

Re: [Intel-gfx] [RFC PATCH 00/42] Introduce memory region concept (including device local memory)

2019-02-25 Thread Alex Deucher
On Mon, Feb 25, 2019 at 9:35 PM Joonas Lahtinen wrote: > > Quoting Dave Airlie (2019-02-25 12:24:48) > > On Tue, 19 Feb 2019 at 23:32, Joonas Lahtinen > > wrote: > > > > > > + dri-devel mailing list, especially for the buddy allocator part > > > > > > Quoting Dave Airlie (2019-02-15 02:47:07) >

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Yet another if/else sort of newer to older platforms. (rev2)

2019-02-25 Thread Patchwork
== Series Details == Series: drm/i915: Yet another if/else sort of newer to older platforms. (rev2) URL : https://patchwork.freedesktop.org/series/57112/ State : success == Summary == CI Bug Log - changes from CI_DRM_5659_full -> Patchwork_12300_full

Re: [Intel-gfx] [RFC PATCH 00/42] Introduce memory region concept (including device local memory)

2019-02-25 Thread Joonas Lahtinen
Quoting Dave Airlie (2019-02-25 12:24:48) > On Tue, 19 Feb 2019 at 23:32, Joonas Lahtinen > wrote: > > > > + dri-devel mailing list, especially for the buddy allocator part > > > > Quoting Dave Airlie (2019-02-15 02:47:07) > > > On Fri, 15 Feb 2019 at 00:57, Matthew Auld wrote: > > > > > > > >

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Infoframe precompute/check (rev7)

2019-02-25 Thread Patchwork
== Series Details == Series: drm/i915: Infoframe precompute/check (rev7) URL : https://patchwork.freedesktop.org/series/49983/ State : success == Summary == CI Bug Log - changes from CI_DRM_5659_full -> Patchwork_12299_full Summary ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: extract AUX mask assignment to separate function (rev2)

2019-02-25 Thread Patchwork
== Series Details == Series: drm/i915: extract AUX mask assignment to separate function (rev2) URL : https://patchwork.freedesktop.org/series/57119/ State : success == Summary == CI Bug Log - changes from CI_DRM_5659 -> Patchwork_12302

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915: Replace global_seqno with a hangcheck heartbeat seqno

2019-02-25 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Replace global_seqno with a hangcheck heartbeat seqno URL : https://patchwork.freedesktop.org/series/57203/ State : success == Summary == CI Bug Log - changes from CI_DRM_5659_full -> Patchwork_12298_full

[Intel-gfx] [PATCH v2] drm/i915: extract AUX mask assignment to separate function

2019-02-25 Thread Lucas De Marchi
No change in behavior, this only allows to more easily follow the flow of gen8_de_irq_handler without the mask assignments for each platform. This also re-organizes the branches a little bit, so the one-off case for CNL_WITH_PORT_F is separate from the generic gen >= 11. v2: rename

Re: [Intel-gfx] [PATCH 1/3] drm/i915/icl: move MG pll hw_state readout

2019-02-25 Thread Lucas De Marchi
On Mon, Feb 25, 2019 at 10:42:12PM +0200, Ville Syrjälä wrote: On Fri, Feb 22, 2019 at 03:23:22PM -0800, Lucas De Marchi wrote: Let the MG plls have their own hooks since it shares very little with other PLL types. It's also better so the platform info contains the info if the PLL is for MG PHY

Re: [Intel-gfx] [PATCH 1/2] drm/i915: remove unused bits from Panel Power Sequence State

2019-02-25 Thread Lucas De Marchi
On Mon, Feb 25, 2019 at 09:28:06PM +0200, Ville Syrjälä wrote: On Fri, Feb 22, 2019 at 04:34:48PM -0800, Lucas De Marchi wrote: No change in behavior. Just removing the unused bits since it makes it easier to compare them on new platforms and one of them was wrong (PP_SEQUENCE_STATE_ON_S1_0 vs

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Disable PSR2 while getting pipe CRC

2019-02-25 Thread Souza, Jose
On Fri, 2019-02-22 at 22:14 -0800, Dhinakaran Pandiyan wrote: > On Sat, 2019-02-23 at 02:48 +, Souza, Jose wrote: > > On Fri, 2019-02-22 at 18:13 -0800, Dhinakaran Pandiyan wrote: > > > On Wed, 2019-02-13 at 18:02 -0800, José Roberto de Souza wrote: > > > > As stated in CRC_CTL spec, after PSR

Re: [Intel-gfx] [PATCH 3/3] drm/i915/icl: decouple dpll ids from type

2019-02-25 Thread Lucas De Marchi
On Mon, Feb 25, 2019 at 10:45:34PM +0200, Ville Syrjälä wrote: On Fri, Feb 22, 2019 at 03:23:24PM -0800, Lucas De Marchi wrote: Use the first 3 bits of dpll_info.platform_flags to mark the type of the PLL instead of relying on the IDs. This is more future proof for allowing the same set of

[Intel-gfx] ✓ Fi.CI.BAT: success for Polish DRAM information readout code

2019-02-25 Thread Patchwork
== Series Details == Series: Polish DRAM information readout code URL : https://patchwork.freedesktop.org/series/57213/ State : success == Summary == CI Bug Log - changes from CI_DRM_5659 -> Patchwork_12301 Summary --- **SUCCESS**

Re: [Intel-gfx] [PATCH 05/12] drm/i915: Fix DRAM size reporting for BXT

2019-02-25 Thread Ville Syrjälä
On Mon, Feb 25, 2019 at 08:57:45PM +, Chris Wilson wrote: > Quoting Ville Syrjälä (2019-02-25 20:48:10) > > On Mon, Feb 25, 2019 at 08:35:08PM +, Chris Wilson wrote: > > > Quoting Ville Syrjala (2019-02-25 20:29:00) > > > > From: Ville Syrjälä > > > > > > > > The BXT DUNIT register tells

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Polish DRAM information readout code

2019-02-25 Thread Patchwork
== Series Details == Series: Polish DRAM information readout code URL : https://patchwork.freedesktop.org/series/57213/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Store DIMM rank information as a number

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/tinydrm: Remove tinydrm_device

2019-02-25 Thread Patchwork
== Series Details == Series: drm/tinydrm: Remove tinydrm_device URL : https://patchwork.freedesktop.org/series/57197/ State : success == Summary == CI Bug Log - changes from CI_DRM_5658_full -> Patchwork_12297_full Summary ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Polish DRAM information readout code

2019-02-25 Thread Patchwork
== Series Details == Series: Polish DRAM information readout code URL : https://patchwork.freedesktop.org/series/57213/ State : warning == Summary == $ dim checkpatch origin/drm-tip 00f769077034 drm/i915: Store DIMM rank information as a number 6000a48eb1cf drm/i915: Extract functions to

Re: [Intel-gfx] [PATCH 05/12] drm/i915: Fix DRAM size reporting for BXT

2019-02-25 Thread Chris Wilson
Quoting Ville Syrjälä (2019-02-25 20:48:10) > On Mon, Feb 25, 2019 at 08:35:08PM +, Chris Wilson wrote: > > Quoting Ville Syrjala (2019-02-25 20:29:00) > > > From: Ville Syrjälä > > > > > > The BXT DUNIT register tells us the size of each DRAM device > > > in Gb. We want to report the size

Re: [Intel-gfx] [PATCH 05/12] drm/i915: Fix DRAM size reporting for BXT

2019-02-25 Thread Ville Syrjälä
On Mon, Feb 25, 2019 at 08:35:08PM +, Chris Wilson wrote: > Quoting Ville Syrjala (2019-02-25 20:29:00) > > From: Ville Syrjälä > > > > The BXT DUNIT register tells us the size of each DRAM device > > in Gb. We want to report the size of the whole DIMM in GB, so > > that it matches how we

Re: [Intel-gfx] [PATCH 3/3] drm/i915/icl: decouple dpll ids from type

2019-02-25 Thread Ville Syrjälä
On Fri, Feb 22, 2019 at 03:23:24PM -0800, Lucas De Marchi wrote: > Use the first 3 bits of dpll_info.platform_flags to mark the type of the > PLL instead of relying on the IDs. This is more future proof for > allowing the same set of functions to be reused, even if the IDs change. > > The warning

Re: [Intel-gfx] [PATCH 1/3] drm/i915/icl: move MG pll hw_state readout

2019-02-25 Thread Ville Syrjälä
On Fri, Feb 22, 2019 at 03:23:22PM -0800, Lucas De Marchi wrote: > Let the MG plls have their own hooks since it shares very little with > other PLL types. It's also better so the platform info contains the info > if the PLL is for MG PHY rather than relying on the PLL ids. > > Signed-off-by:

Re: [Intel-gfx] [PATCH 05/12] drm/i915: Fix DRAM size reporting for BXT

2019-02-25 Thread Chris Wilson
Quoting Ville Syrjala (2019-02-25 20:29:00) > From: Ville Syrjälä > > The BXT DUNIT register tells us the size of each DRAM device > in Gb. We want to report the size of the whole DIMM in GB, so > that it matches how we report it for non-LP platforms. > > Signed-off-by: Ville Syrjälä > --- >

[Intel-gfx] [PATCH 11/12] drm/i915: Extract DIMM info on cnl+

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä We'll need information about the memory configuration on cnl+ too. Extend the code to parse the slightly changed register layout. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.c | 69 - drivers/gpu/drm/i915/i915_reg.h | 17

[Intel-gfx] [PATCH 12/12] drm/i915: Read out memory type

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä We'll need to know the memory type in the system for some bandwidth limitations and whatnot. Let's read that out on gen9+. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.c | 83 +++-- drivers/gpu/drm/i915/i915_drv.h | 7 +++

[Intel-gfx] [PATCH 08/12] drm/i915: Generalize intel_is_dram_symmetric()

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Decouple intel_is_dram_symmetric() from the raw register values by comparing just the dram_channel_info structs. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.c | 28 1 file changed, 12 insertions(+), 16 deletions(-) diff

[Intel-gfx] [PATCH 10/12] drm/i915: Clean up intel_get_dram_info() a bit

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Remove the pointless zero initialization of bunch of things (the thing is kzalloc()ed). Also throw out the mostly useless on-stack string. I think it'll be clear enough from the logs that 0 means unknown. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.c |

[Intel-gfx] [PATCH 07/12] drm/i915: Use dram_dimm_info more

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Reduce the code duplication a bit by sharing the same code for parsing both DIMMs on a channel. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.c | 44 ++--- 1 file changed, 24 insertions(+), 20 deletions(-) diff --git

[Intel-gfx] [PATCH 04/12] drm/i915: Extract BXT DIMM helpers

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Polish the bxt DIMM parsing by extracting a few small helpers. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.c | 79 ++--- 1 file changed, 52 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c

[Intel-gfx] [PATCH 06/12] drm/i915: Extract DIMM info on GLK too

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä The BXT code for parsing DIMM info works for GLK too. Let's dig it out even if we might not need it immediately. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[Intel-gfx] [PATCH 09/12] drm/i914: s/l_info/dimm_l/ etc.

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Rename the dimm info structs for clarity. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.c | 18 +- drivers/gpu/drm/i915/i915_drv.h | 2 +- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c

[Intel-gfx] [PATCH 03/12] drm/i915: Polish skl_is_16gb_dimm()

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Pass the dimm struct to skl_is_16gb_dimm() rather than passing each value separately. And let's replace the hardcoded set of values with some simple arithmetic. Also fix the byte vs. bit inconsistency in the debug message, and polish the wording otherwise as well.

[Intel-gfx] [PATCH 00/12] Polish DRAM information readout code

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Try to pimp up the DRAM information readut code a bit. This is prep work for some DRAM bandwidth limit checks we'll be needing. Ville Syrjälä (12): drm/i915: Store DIMM rank information as a number drm/i915: Extract functions to derive SKL+ DIMM info drm/i915: Polish

[Intel-gfx] [PATCH 05/12] drm/i915: Fix DRAM size reporting for BXT

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä The BXT DUNIT register tells us the size of each DRAM device in Gb. We want to report the size of the whole DIMM in GB, so that it matches how we report it for non-LP platforms. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.c | 9 - 1 file changed,

[Intel-gfx] [PATCH 02/12] drm/i915: Extract functions to derive SKL+ DIMM info

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Make the code less repetitive by extracting a few small helpers. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.c | 68 + 1 file changed, 43 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c

[Intel-gfx] [PATCH 01/12] drm/i915: Store DIMM rank information as a number

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Life will be easier later if we have the ranks stored as a bare number. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.c | 92 +++-- drivers/gpu/drm/i915/i915_drv.h | 11 ++-- 2 files changed, 45 insertions(+), 58 deletions(-)

Re: [Intel-gfx] [RFC PATCH 00/42] Introduce memory region concept (including device local memory)

2019-02-25 Thread Dave Airlie
On Tue, 19 Feb 2019 at 23:32, Joonas Lahtinen wrote: > > + dri-devel mailing list, especially for the buddy allocator part > > Quoting Dave Airlie (2019-02-15 02:47:07) > > On Fri, 15 Feb 2019 at 00:57, Matthew Auld wrote: > > > > > > In preparation for upcoming devices with device local memory,

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Yet another if/else sort of newer to older platforms. (rev2)

2019-02-25 Thread Patchwork
== Series Details == Series: drm/i915: Yet another if/else sort of newer to older platforms. (rev2) URL : https://patchwork.freedesktop.org/series/57112/ State : success == Summary == CI Bug Log - changes from CI_DRM_5659 -> Patchwork_12300

[Intel-gfx] ✓ Fi.CI.IGT: success for Propagate DP-over-Type-C hotplug events from Type-C subsys to drm-drivers

2019-02-25 Thread Patchwork
== Series Details == Series: Propagate DP-over-Type-C hotplug events from Type-C subsys to drm-drivers URL : https://patchwork.freedesktop.org/series/57187/ State : success == Summary == CI Bug Log - changes from CI_DRM_5658_full -> Patchwork_12296_full

Re: [Intel-gfx] [PATCH 2/2] drm/i915: don't check internal state in PP_STATUS

2019-02-25 Thread Ville Syrjälä
On Fri, Feb 22, 2019 at 04:34:49PM -0800, Lucas De Marchi wrote: > Instead of checking the bits that give the internal machine state we can > simply rely on the information from the other bits: 1) on or off, > 2) transitioning or not. > > Bit 31 has the "Panel Power On Status" > Bits 29:28 has

Re: [Intel-gfx] [PATCH 1/2] drm/i915: remove unused bits from Panel Power Sequence State

2019-02-25 Thread Ville Syrjälä
On Fri, Feb 22, 2019 at 04:34:48PM -0800, Lucas De Marchi wrote: > No change in behavior. Just removing the unused bits since it makes it > easier to compare them on new platforms and one of them was wrong > (PP_SEQUENCE_STATE_ON_S1_0 vs the supposedly correct name > PP_SEQUENCE_STATE_ON_S1_1) >

Re: [Intel-gfx] [PATCH] drm/i915: extract AUX mask assignment to separate function

2019-02-25 Thread Ville Syrjälä
On Fri, Feb 22, 2019 at 03:59:54PM -0800, Lucas De Marchi wrote: > No change in behavior, this only allows to more easily follow the flow > of gen8_de_irq_handler without the mask assignments for each platform. > This also re-organizes the branches a little bit, so the one-off case > for

[Intel-gfx] [PATCH] drm/i915: Yet another if/else sort of newer to older platforms.

2019-02-25 Thread Rodrigo Vivi
No functional change. Just a reorg to match the preferred behavior. When rebasing internal branch on top of latest sort I noticed few more cases that needs to get reordered. Let's do in a bundle this time and hoping there's no other missing places. v2: Check for HSW/BDW ULT before generic

Re: [Intel-gfx] [PATCH] drm/i915: Yet another if/else sort of newer to older platforms.

2019-02-25 Thread Rodrigo Vivi
On Mon, Feb 25, 2019 at 06:32:51PM +0200, Ville Syrjälä wrote: > On Fri, Feb 22, 2019 at 02:11:12PM -0800, Rodrigo Vivi wrote: > > No functional change. Just a reorg to match the preferred > > behavior. > > > > When rebasing internal branch on top of latest sort I noticed > > few more cases that

Re: [Intel-gfx] [PATCH v2 3/3] drm/dsc: Split DSC PPS and SDP header initialisations

2019-02-25 Thread Manasi Navare
On Thu, Feb 21, 2019 at 03:20:01PM -0500, David Francis wrote: > The DP 1.4 spec defines the SDP header and SDP contents for > a Picture Parameter Set (PPS) that must be sent in advance > of DSC transmission to define the encoding characteristics. > > This was done in one struct,

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Replace global_seqno with a hangcheck heartbeat seqno

2019-02-25 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-02-25 17:59:40) > > On 25/02/2019 16:23, Chris Wilson wrote: > > static inline struct i915_priolist *to_priolist(struct rb_node *rb) > > { > > return rb_entry(rb, struct i915_priolist, node); > > @@ -2206,6 +2212,10 @@ static u32

Re: [Intel-gfx] [PATCH i-g-t] i915/gem_ctx_switch: Use minimum qlen over all engines and measure switches

2019-02-25 Thread Chris Wilson
Quoting Caz Yokoyama (2019-02-25 18:28:34) > Chris, > By your patch, measure_qlen() reports how many gem_execbuf() can be > executed(queue length) within timeout of the slowest engine, correct? More or less, yes. -Chris ___ Intel-gfx mailing list

Re: [Intel-gfx] [PATCH i-g-t] i915/gem_ctx_switch: Use minimum qlen over all engines and measure switches

2019-02-25 Thread Caz Yokoyama
Chris, By your patch, measure_qlen() reports how many gem_execbuf() can be executed(queue length) within timeout of the slowest engine, correct? Run time becomes 95 sec which is less than half. -caz On Sat, 2019-02-23 at 01:34 +, Chris Wilson wrote: > Not all engines are created equal, and

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Infoframe precompute/check (rev7)

2019-02-25 Thread Patchwork
== Series Details == Series: drm/i915: Infoframe precompute/check (rev7) URL : https://patchwork.freedesktop.org/series/49983/ State : success == Summary == CI Bug Log - changes from CI_DRM_5659 -> Patchwork_12299 Summary ---

Re: [Intel-gfx] [PATCH 1/9] drm/i915: Make user contexts bannable again!

2019-02-25 Thread Sasha Levin
Hi, [This is an automated email] This commit has been processed because it contains a "Fixes:" tag, fixing commit: 6095868a271d drm/i915: Complete kerneldoc for struct i915_gem_context. The bot has tested the following trees: v4.20.11, v4.19.24, v4.14.102. v4.20.11: Failed to apply! Possible

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Infoframe precompute/check (rev7)

2019-02-25 Thread Patchwork
== Series Details == Series: drm/i915: Infoframe precompute/check (rev7) URL : https://patchwork.freedesktop.org/series/49983/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Add the missing HDMI gamut metadata packet stuff Okay! Commit:

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Infoframe precompute/check (rev7)

2019-02-25 Thread Patchwork
== Series Details == Series: drm/i915: Infoframe precompute/check (rev7) URL : https://patchwork.freedesktop.org/series/49983/ State : warning == Summary == $ dim checkpatch origin/drm-tip f1e068bf9522 drm/i915: Add the missing HDMI gamut metadata packet stuff -:45: WARNING:LONG_LINE: line

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Replace global_seqno with a hangcheck heartbeat seqno

2019-02-25 Thread Tvrtko Ursulin
On 25/02/2019 16:23, Chris Wilson wrote: To determine whether an engine has 'stuck', we simply check whether or not is still on the same seqno for several seconds. To keep this simple mechanism intact over the loss of a global seqno, we can simply add a new global heartbeat seqno instead. As we

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Replace global_seqno with a hangcheck heartbeat seqno

2019-02-25 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Replace global_seqno with a hangcheck heartbeat seqno URL : https://patchwork.freedesktop.org/series/57203/ State : success == Summary == CI Bug Log - changes from CI_DRM_5659 -> Patchwork_12298

Re: [Intel-gfx] [PATCH v15 00/16] drm/i915: Implement HDCP2.2

2019-02-25 Thread Daniel Vetter
On Mon, Feb 25, 2019 at 03:13:04PM +, Winkler, Tomas wrote: > > On Mon, Feb 25, 2019 at 05:12:09AM +, C, Ramalingam wrote: > > > Tomas, > > > > > > Lkp issue is complaining about the header > > > drm/i915_mei_hdcp_interface.h, Which is already merged in drm-tip > > > through below commit.

Re: [Intel-gfx] [PATCH 3/4] drm/i915: Remove i915_request.global_seqno

2019-02-25 Thread Tvrtko Ursulin
On 25/02/2019 16:23, Chris Wilson wrote: Having weaned the interrupt handling off using a single global execution queue, we no longer need to emit a global_seqno. Note that we still have a few assumptions about execution order along engine timelines, but this removes the most obvious artefact!

[Intel-gfx] [PATCH v3 3/9] drm/i915: Store mask of enabled infoframes in the crtc state

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Store the mask of enabled infoframes in the crtc state. We'll start with just the readout for HDMI encoder, and we'll expand this to compute the bitmask in .compute_config() later. SDVO will also follow later. Signed-off-by: Ville Syrjälä Reviewed-by: Daniel Vetter ---

[Intel-gfx] [PATCH v3 8/9] drm/i915: Check infoframe state in intel_pipe_config_compare()

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Check the infoframes and infoframe enable state when comparing two crtc states. We'll use the infoframe logging functions from video/hdmi.c to show the infoframes as part of the state dump. TODO: Try to better integrate the infoframe dumps with drm state dumps v2:

[Intel-gfx] [PATCH v3 5/9] drm/i915: Read out HDMI infoframes

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Add code to read the infoframes from the video DIP and unpack them into the crtc state. v2: Make the read funcs return void (Daniel) Drop the duplicate infoframe enabled checks (Daniel) Add a FIXME for lspcon infoframe readout Signed-off-by: Ville Syrjälä

[Intel-gfx] [PATCH v3 4/9] drm/i915: Precompute HDMI infoframes

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Store the infoframes in the crtc state and precompute them in .compute_config(). While precomputing we'll also fill out the inforames.enable bitmask appropriately. v2: Drop the null packet stuff (Daniel) Add a FIXME for lspcon v3: .compute_config() now returns int

[Intel-gfx] [PATCH v3 7/9] drm/i915/sdvo: Read out HDMI infoframes

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Read the HDMI infoframes from the hbuf and unpack them into the crtc state. Well, actually just AVI infoframe for now but let's write the infoframe readout code in a more generic fashion in case we expand this later. Note that Daniel was sceptical about the benefit if this

[Intel-gfx] [PATCH v3 9/9] drm/i915: Include infoframes in the crtc state dump

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Dump out the infoframes in the normal crtc state dump. TODO: Try to better integrate the infoframe dumps with drm state dumps Signed-off-by: Ville Syrjälä Reviewed-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 26 ++ 1 file

[Intel-gfx] [PATCH v3 6/9] drm/i915/sdvo: Precompute HDMI infoframes

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä As with regular HDMI encoders, let's precompute the infoframes (actually just AVI infoframe for the time being) with SDVO HDMI encoders. v2: Drop the WARN_ON() from drm_hdmi_avi_infoframe_from_display_mode() return since that could genuinely fail due to user asking

[Intel-gfx] [PATCH v3 2/9] drm/i915: Return the mask of enabled infoframes from ->inforame_enabled()

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä We want to start tracking which infoframes are enabled, so let's replace the boolean flag with a bitmask. We'll abstract the bitmask so that it's not platform dependent. That will allow us to examine the bitmask later in platform independent code. v2: Don't map

[Intel-gfx] [PATCH v3 1/9] drm/i915: Add the missing HDMI gamut metadata packet stuff

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä We have definitions and low level code for everything except the gamut metadata HDMI packet. Add the missing bits. Signed-off-by: Ville Syrjälä Reviewed-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_reg.h | 8 +--- drivers/gpu/drm/i915/intel_hdmi.c | 12

[Intel-gfx] [PATCH v3 0/9] drm/i915: Infoframe precompute/check

2019-02-25 Thread Ville Syrjala
From: Ville Syrjälä Simply a rebase on top of latest drm-tip. The one important change was the adjustment of .compute_config() return value from bool to int. All r-b'd/acked so should be good to land if CI is still agreeable. Ville Syrjälä (9): drm/i915: Add the missing HDMI gamut metadata

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Replace global_seqno with a hangcheck heartbeat seqno

2019-02-25 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Replace global_seqno with a hangcheck heartbeat seqno URL : https://patchwork.freedesktop.org/series/57203/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0e4e62c64045 drm/i915: Replace global_seqno with a

Re: [Intel-gfx] [PATCH 7/7] drm/i915/perf: add flushing ioctl

2019-02-25 Thread Joonas Lahtinen
Quoting Lionel Landwerlin (2019-02-04 17:30:12) > On 22/01/2019 16:25, Joonas Lahtinen wrote: > > Quoting Lionel Landwerlin (2019-01-16 17:36:22) > >> With the currently available parameters for the i915-perf stream, > >> there are still situations that are not well covered : > >> > >> If an

Re: [Intel-gfx] [PATCH] drm/i915: Yet another if/else sort of newer to older platforms.

2019-02-25 Thread Ville Syrjälä
On Fri, Feb 22, 2019 at 02:11:12PM -0800, Rodrigo Vivi wrote: > No functional change. Just a reorg to match the preferred > behavior. > > When rebasing internal branch on top of latest sort I noticed > few more cases that needs to get reordered. > > Let's do in a bundle this time and hoping

[Intel-gfx] [PATCH 2/4] drm/i915: Remove access to global seqno in the HWSP

2019-02-25 Thread Chris Wilson
Stop accessing the HWSP to read the global seqno, and stop tracking the mirror in the engine's execution timeline -- it is unused. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gpu_error.c | 4 -- drivers/gpu/drm/i915/i915_gpu_error.h |

[Intel-gfx] [PATCH 4/4] drm/i915/selftests: Exercise resetting during non-user payloads

2019-02-25 Thread Chris Wilson
In selftests/live_hangcheck, we have a lot of tests for resetting simple spinners, but nothing quite prepared us for how the GPU reacted to triggering a reset outside of the safe spinner. These two subtests fill the ring with plain old empty, non-spinning requests, and then triggers a reset.

[Intel-gfx] [PATCH 3/4] drm/i915: Remove i915_request.global_seqno

2019-02-25 Thread Chris Wilson
Having weaned the interrupt handling off using a single global execution queue, we no longer need to emit a global_seqno. Note that we still have a few assumptions about execution order along engine timelines, but this removes the most obvious artefact! Signed-off-by: Chris Wilson ---

[Intel-gfx] [PATCH 1/4] drm/i915: Replace global_seqno with a hangcheck heartbeat seqno

2019-02-25 Thread Chris Wilson
To determine whether an engine has 'stuck', we simply check whether or not is still on the same seqno for several seconds. To keep this simple mechanism intact over the loss of a global seqno, we can simply add a new global heartbeat seqno instead. As we cannot know the sequence in which requests

Re: [Intel-gfx] [PATCH 3/3] usb: typec: altmodes/displayport: Notify drm subsys of hotplug events

2019-02-25 Thread Hans de Goede
Hi, On 25-02-19 15:06, Greg Kroah-Hartman wrote: On Mon, Feb 25, 2019 at 02:20:37PM +0100, Hans de Goede wrote: Use the new drm_kms_call_oob_hotplug_notifier_chain() function to load s/load/let/ fixed in my tree. drm/kms drivers know about DisplayPort over Type-C hotplug events.

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Restrict SNB LP3+ disable to Thinkpad X220 tablet

2019-02-25 Thread Ville Syrjälä
On Mon, Feb 25, 2019 at 05:45:38PM +0200, Ville Syrjälä wrote: > On Fri, Feb 22, 2019 at 05:52:51PM +0200, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > The only machine we know for sure to require the LP3+ disable > > is the Lenovo Thinkpad X220 tablet. Originally in commit > >

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Restrict SNB LP3+ disable to Thinkpad X220 tablet

2019-02-25 Thread Ville Syrjälä
On Fri, Feb 22, 2019 at 05:52:51PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > The only machine we know for sure to require the LP3+ disable > is the Lenovo Thinkpad X220 tablet. Originally in commit > 03981c6ebec4 ("drm/i915: Disable LP3 watermarks on all SNB > machines") I disabled

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/tinydrm: Remove tinydrm_device

2019-02-25 Thread Patchwork
== Series Details == Series: drm/tinydrm: Remove tinydrm_device URL : https://patchwork.freedesktop.org/series/57197/ State : success == Summary == CI Bug Log - changes from CI_DRM_5658 -> Patchwork_12297 Summary --- **SUCCESS**

Re: [Intel-gfx] [PATCH i-g-t 1/2] tests/pm_rpm: Enable PC8+ residency test for ICL and GEN9.

2019-02-25 Thread Imre Deak
On Thu, Feb 21, 2019 at 10:37:57PM +0530, Anshuman Gupta wrote: > Enabled has_pc8 global for ICL and Gen9. > Added PC8+ residency test for display enabled case as well. > > Signed-off-by: Anshuman Gupta > --- > tests/pm_rpm.c | 13 + > 1 file changed, 9 insertions(+), 4 deletions(-)

Re: [Intel-gfx] [PATCH v15 00/16] drm/i915: Implement HDCP2.2

2019-02-25 Thread Winkler, Tomas
> On Mon, Feb 25, 2019 at 05:12:09AM +, C, Ramalingam wrote: > > Tomas, > > > > Lkp issue is complaining about the header > > drm/i915_mei_hdcp_interface.h, Which is already merged in drm-tip > > through below commit. So don’t think this is a genuine issue. May be > > this build was tried in

Re: [Intel-gfx] [PATCH v2 2/3] drm/dsc: Add native 420 and 422 support to compute_rc_params

2019-02-25 Thread Jani Nikula
On Thu, 21 Feb 2019, David Francis wrote: > Native 420 and 422 transfer modes are new in DSC1.2 > > In these modes, each two pixels of a slice are treated as one > pixel, so the slice width is half as large (round down) for > the purposes of calucating the groups per line and chunk size > in

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/tinydrm: Remove tinydrm_device

2019-02-25 Thread Patchwork
== Series Details == Series: drm/tinydrm: Remove tinydrm_device URL : https://patchwork.freedesktop.org/series/57197/ State : warning == Summary == $ dim checkpatch origin/drm-tip 686f06d66ef6 drm/drv: Hold ref on parent device during drm_device lifetime 979fb6bd33a0 drm: Add

[Intel-gfx] ✓ Fi.CI.BAT: success for Propagate DP-over-Type-C hotplug events from Type-C subsys to drm-drivers

2019-02-25 Thread Patchwork
== Series Details == Series: Propagate DP-over-Type-C hotplug events from Type-C subsys to drm-drivers URL : https://patchwork.freedesktop.org/series/57187/ State : success == Summary == CI Bug Log - changes from CI_DRM_5658 -> Patchwork_12296

Re: [Intel-gfx] BUG: KASAN: use-after-free in intel_hdmi_destroy+0x79/0x80

2019-02-25 Thread Jani Nikula
On Mon, 25 Feb 2019, Hans Verkuil wrote: > Hi Jani, > > On 2/25/19 2:40 PM, Jani Nikula wrote: >> On Fri, 22 Feb 2019, Randy Dunlap wrote: >>> This is 5.0-rc7 on an old Toshiba Portege laptop. >>> No hdmi or other external video. >>> >>> Linux dragon.dunlab 5.0.0-rc7mod #3 SMP PREEMPT Wed Feb 20

Re: [Intel-gfx] [PATCH v2 0/3] Make DRM DSC helpers more generally usable

2019-02-25 Thread Christian König
Am 21.02.19 um 21:19 schrieb David Francis: drm_dsc could use some work so that drm drivers other than i915 can make use of it their own DSC implementations Move rc compute, a function that forms part of the DSC spec, into drm. Update it to DSC 1.2. Also split the PPS packing and SDP header

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