== Series Details ==
Series: series starting with [1/2] drm/i915: Fix legacy gamma mode for ICL
URL : https://patchwork.freedesktop.org/series/58079/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5754_full -> Patchwork_12487_full
===
== Series Details ==
Series: drm/i915/icl: pass cfgcr* register around instead of pll_id
URL : https://patchwork.freedesktop.org/series/58084/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5756 -> Patchwork_12490
Summary
--
== Series Details ==
Series: series starting with [1/2] drm/i915/ehl: Add EHL platform info and PCI
IDs
URL : https://patchwork.freedesktop.org/series/58078/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5754_full -> Patchwork_12486_full
==
The caller already knows what platform that is and what register should
be used. Instead of keep adding if/else chains on a leaf functions,
let the caller pass the register.
We read cfgcr0 twice for CNL, but we were already doing that anyway.
icl_calc_dp_combo_pll_link() is only used for ICL, but
On Fri, Mar 15, 2019 at 10:57 AM Rodrigo Vivi wrote:
>
> From: Lucas De Marchi
>
> Elkhart Lake has a different set of PLLs as compared to Ice Lake,
> although programming them is very similar.
>
> Signed-off-by: Lucas De Marchi
> Signed-off-by: Rodrigo Vivi
> Reviewed-by: José Roberto de Souza
Quoting Daniele Ceraolo Spurio (2019-03-13 23:13:10)
> The only usage we have for it is for the regs pointer. Save a pointer to
> the set and ack registers instead of the register offsets to remove this
> requirement
>
> Cc: Paulo Zanoni
> Signed-off-by: Daniele Ceraolo Spurio
Reviewed-by: Chris
Em qua, 2019-03-13 às 16:13 -0700, Daniele Ceraolo Spurio escreveu:
> This allows us to ditch i915 in some more places.
>
> RFC: should we just make them work directly on the regs pointer instead?
Both options look better than passing God Object dev_priv, so I'm fine
with either.
To give a paral
== Series Details ==
Series: drm/i915/icl: Fix clockgating issue when using scalars
URL : https://patchwork.freedesktop.org/series/58081/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5756 -> Patchwork_12489
Summary
---
Em qua, 2019-03-13 às 16:13 -0700, Daniele Ceraolo Spurio escreveu:
> Use a local variable where it makes sense.
Also worth it on its own IMHO.
Reviewed-by: Paulo Zanoni
>
> Cc: Paulo Zanoni
> Signed-off-by: Daniele Ceraolo Spurio
> ---
> drivers/gpu/drm/i915/intel_uncore.c | 79 +++
If we allow a fork-helper to exit normally before the parent tries to
reap the helper (fork-helpers are intended to be only used for
persistent background loads), then the helper unhelpful aborts because
the child exited cleanly.
Simplify by not using the so called helpers at all.
Bugzilla: https
== Series Details ==
Series: drm/i915/display: Increase timeout for DP Aux channel ctl signal
URL : https://patchwork.freedesktop.org/series/58077/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5753_full -> Patchwork_12485_full
=
On Fri, Mar 15, 2019 at 02:43:46PM -0700, Rodrigo Vivi wrote:
On Fri, Mar 15, 2019 at 02:39:25PM -0700, Rodrigo Vivi wrote:
On Fri, Mar 15, 2019 at 02:31:40PM -0700, Rodrigo Vivi wrote:
> On Fri, Mar 15, 2019 at 01:27:22PM -0700, Vanshidhar Konda wrote:
> > On Fri, Mar 15, 2019 at 12:38:41PM -07
On Fri, Mar 15, 2019 at 03:56:17PM +0200, Jani Nikula wrote:
> v4 of [1], rebased and very mildly tweaked, with the intention to merge.
before it starts conflicting again :)
> I added
> Chris' Reviewed-bys despite the rebase.
Acked-by: Rodrigo Vivi
Do you intend to follow-up with a big sed or
Em qua, 2019-03-13 às 16:13 -0700, Daniele Ceraolo Spurio escreveu:
> Remove unneeded usage of dev_priv from 1 extra function.
>
Reviewed-by: Paulo Zanoni
> Cc: Paulo Zanoni
> Signed-off-by: Daniele Ceraolo Spurio
> ---
> drivers/gpu/drm/i915/intel_uncore.c | 20 ++--
> 1 fil
== Series Details ==
Series: drm/i915: Fix PSR2 selective update corruption after PSR1 setup (rev4)
URL : https://patchwork.freedesktop.org/series/57900/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5756 -> Patchwork_12488
Scalars as opposed to vector instructions? EU clock gating issues with
certain shaders?
Itym scalers.
-Chris
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On Fri, 2019-03-15 at 03:39 +0200, Imre Deak wrote:
> On Fri, Mar 15, 2019 at 02:25:36AM +0200, Souza, Jose wrote:
> > On Thu, 2019-03-14 at 18:09 +0200, Imre Deak wrote:
> > > On Tue, Mar 12, 2019 at 05:58:51PM -0700, José Roberto de Souza
> > > wrote:
> > > > From: Imre Deak
> > > >
> > > > The
Em qua, 2019-03-13 às 16:13 -0700, Daniele Ceraolo Spurio escreveu:
> Move the init, fini, prune, suspend, resume function to work on
> intel_uncore instead of dev_priv
>
A common theme in this series is the last sentence of a commit message
missing the final period ("."). Please fix all of them
Fixes the clock-gating issue when pipe scaling is enabled.
(Lineage #2006604312)
Cc: Rodrigo Vivi
Cc: Anusha Srivatsa
Cc: Aditya Swarup
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_display.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --
== Series Details ==
Series: series starting with [CI,1/6] drm/i915/ehl: Add EHL platform info and
PCI IDs
URL : https://patchwork.freedesktop.org/series/58076/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5753_full -> Patchwork_12484_full
===
On Thu, 2019-03-14 at 16:01 -0700, José Roberto de Souza wrote:
> There is probably a issue in DMC firmwares(icl_dmc_ver1_07.bin and
> kbl_dmc_ver1_04.bin at least) that causes PSR2 SU to fail
nit: instead of "fail", it is better to document what you see visually
- freeze, flicker, corruption etc.
On Fri, Mar 15, 2019 at 02:39:25PM -0700, Rodrigo Vivi wrote:
> On Fri, Mar 15, 2019 at 02:31:40PM -0700, Rodrigo Vivi wrote:
> > On Fri, Mar 15, 2019 at 01:27:22PM -0700, Vanshidhar Konda wrote:
> > > On Fri, Mar 15, 2019 at 12:38:41PM -0700, Rodrigo Vivi wrote:
> > > > On Fri, Mar 15, 2019 at 11:
Em qua, 2019-03-13 às 16:13 -0700, Daniele Ceraolo Spurio escreveu:
> Now that the internal code all works on intel_uncore, flip the
> external-facing interface.
Long but trivial patch. It breaks compilation of gvt but that's also
trivial to fix.
Unlike patches 1 and 2, this one doesn't add much
On Fri, Mar 15, 2019 at 02:31:40PM -0700, Rodrigo Vivi wrote:
> On Fri, Mar 15, 2019 at 01:27:22PM -0700, Vanshidhar Konda wrote:
> > On Fri, Mar 15, 2019 at 12:38:41PM -0700, Rodrigo Vivi wrote:
> > > On Fri, Mar 15, 2019 at 11:39:54AM -0700, Vanshidhar Konda wrote:
> > > > Extend the timeout for
On Fri, Mar 15, 2019 at 01:27:22PM -0700, Vanshidhar Konda wrote:
> On Fri, Mar 15, 2019 at 12:38:41PM -0700, Rodrigo Vivi wrote:
> > On Fri, Mar 15, 2019 at 11:39:54AM -0700, Vanshidhar Konda wrote:
> > > Extend the timeout for the hardware to signal SEND_BUSY on the DP
> > > Aux Channel Controlle
Em qua, 2019-03-13 às 16:13 -0700, Daniele Ceraolo Spurio escreveu:
> Get/put functions used outside of uncore.c are updated in the next
> patch for a nicer split
>
> Cc: Paulo Zanoni
> Signed-off-by: Daniele Ceraolo Spurio
I really like this one, replacing a gazillion i915->uncore.x with only
Quoting Daniele Ceraolo Spurio (2019-03-13 23:13:16)
> This will allow futher simplifications in the uncore handling.
>
> RFC: if we want to keep the pointer logically separate from the uncore,
> we could also move both the regs pointer and the uncore struct
> inside a new structure (intel_mmio?)
== Series Details ==
Series: drm/i915: Sanity check mmap length against object size (rev2)
URL : https://patchwork.freedesktop.org/series/57977/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5753_full -> Patchwork_12482_full
On Wed, Mar 13, 2019 at 03:11:55PM +, Shankar, Uma wrote:
>
>
> >-Original Message-
> >From: Ville Syrjala [mailto:ville.syrj...@linux.intel.com]
> >Sent: Tuesday, February 19, 2019 1:02 AM
> >To: intel-gfx@lists.freedesktop.org
> >Cc: Shankar, Uma ; Roper, Matthew D
> >
> >Subject: [
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix legacy gamma mode for ICL
URL : https://patchwork.freedesktop.org/series/58079/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5754 -> Patchwork_12487
Sum
On Fri, Mar 15, 2019 at 12:38:41PM -0700, Rodrigo Vivi wrote:
On Fri, Mar 15, 2019 at 11:39:54AM -0700, Vanshidhar Konda wrote:
Extend the timeout for the hardware to signal SEND_BUSY on the DP
Aux Channel Controller register.
This is needed to address FDO #109982
https://bugzilla.freedesktop.o
== Series Details ==
Series: series starting with [1/2] drm/i915/ehl: Add EHL platform info and PCI
IDs
URL : https://patchwork.freedesktop.org/series/58078/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5754 -> Patchwork_12486
Em qua, 2019-03-13 às 16:13 -0700, Daniele Ceraolo Spurio escreveu:
> The only usage we have for it is for the regs pointer. Save a pointer to
> the set and ack registers instead of the register offsets to remove this
> requirement
Reviewed-by: Paulo Zanoni
>
> Cc: Paulo Zanoni
> Signed-off-by
On Fri, Mar 15, 2019 at 06:19:08PM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Clean up ilk+ csc stuff (rev2)
> URL : https://patchwork.freedesktop.org/series/56857/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_5753_full -> Patchwork_12478_f
From: Ville Syrjälä
We're currently leaving the CUS enabled if we disable the
master plane directly after scanning out NV12.
Could perhaps cause the selected slave plane to misbehave
if we try to use it for scanning out something non-NV12?
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915
From: Ville Syrjälä
We must remember to actually enable the post CSC gamma if
we expect the legacy LUT to work. Seems to fix NV12 crc
tests on the SDR planes. Curiously we apparently managed to
get 100% match for the HDR planes even without chopping
off the low bits.
Cc: Uma Shankar
Signed-off-
On Fri, Mar 15, 2019 at 11:39:54AM -0700, Vanshidhar Konda wrote:
> Extend the timeout for the hardware to signal SEND_BUSY on the DP
> Aux Channel Controller register.
>
> This is needed to address FDO #109982
> https://bugzilla.freedesktop.org/show_bug.cgi?id=109982
instead of mentioning like t
On Fri, 2019-03-15 at 12:19 -0700, Rodrigo Vivi wrote:
> Let's reserve EHL stolen memory for graphics.
>
> ElkhartLake is a gen11 platform which is compatible with
> ICL changes.
Reviewed-by: José Roberto de Souza
>
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: Borislav Petkov
> Cc: "H. Pet
On Fri, 2019-03-15 at 12:19 -0700, Rodrigo Vivi wrote:
> From: James Ausmus
>
> Add known EHL PCI IDs.
>
> v2 (Rodrigo): Removed x86 early quirk. To be sent in a separated
> patch cc'ing the appropriated list and maintainers for
> proper ack.
> v3: (Rodrigo): - Removed .n
== Series Details ==
Series: drm/i915: Fix off-by-one in reporting hanging process
URL : https://patchwork.freedesktop.org/series/58073/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5753_full -> Patchwork_12481_full
Summar
Let's reserve EHL stolen memory for graphics.
ElkhartLake is a gen11 platform which is compatible with
ICL changes.
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: Borislav Petkov
Cc: "H. Peter Anvin"
Cc: x...@kernel.org
Cc: José Roberto de Souza
Signed-off-by: Rodrigo Vivi
---
arch/x86/kernel/ear
From: James Ausmus
Add known EHL PCI IDs.
v2 (Rodrigo): Removed x86 early quirk. To be sent in a separated
patch cc'ing the appropriated list and maintainers for
proper ack.
v3: (Rodrigo): - Removed .num_pipes = 3 that is coming since GEN&_FEATURES.
- A
== Series Details ==
Series: drm/i915/display: Increase timeout for DP Aux channel ctl signal
URL : https://patchwork.freedesktop.org/series/58077/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5753 -> Patchwork_12485
Summa
== Series Details ==
Series: series starting with [CI,1/6] drm/i915/ehl: Add EHL platform info and
PCI IDs
URL : https://patchwork.freedesktop.org/series/58076/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5753 -> Patchwork_12484
=
On Fri, Mar 15, 2019 at 08:19:58PM +0200, Ville Syrjälä wrote:
On Fri, Mar 15, 2019 at 07:13:49AM +, Tvrtko Ursulin wrote:
On 15/03/2019 06:56, Tvrtko Ursulin wrote:
>
> On 15/03/2019 00:52, Chris Wilson wrote:
>> Quoting José Roberto de Souza (2019-03-15 00:42:35)
>>> We don't have any pla
On Fri, Mar 15, 2019 at 05:31:05PM +, Tvrtko Ursulin wrote:
On 15/03/2019 17:12, Lucas De Marchi wrote:
On Fri, Mar 15, 2019 at 12:26:33PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Concept of a sub-platform already exist in our code (like ULX and ULT
platform variants and similar
Extend the timeout for the hardware to signal SEND_BUSY on the DP
Aux Channel Controller register.
This is needed to address FDO #109982
https://bugzilla.freedesktop.org/show_bug.cgi?id=109982
Cc: Ville Syrjälä
Cc: Imre Deak
Signed-off-by: Vanshidhar Konda
---
drivers/gpu/drm/i915/intel_dp.c
== Series Details ==
Series: drm/i915: Sanity check mmap length against object size (rev2)
URL : https://patchwork.freedesktop.org/series/57977/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5753 -> Patchwork_12482
Summary
== Series Details ==
Series: drm/i915: Introduce concept of a sub-platform (rev3)
URL : https://patchwork.freedesktop.org/series/58056/
State : failure
== Summary ==
Applying: drm/i915: Introduce concept of a sub-platform
error: corrupt patch at line 199
error: could not build fake ancestor
hi
On Fri, Mar 15, 2019 at 07:13:49AM +, Tvrtko Ursulin wrote:
>
> On 15/03/2019 06:56, Tvrtko Ursulin wrote:
> >
> > On 15/03/2019 00:52, Chris Wilson wrote:
> >> Quoting José Roberto de Souza (2019-03-15 00:42:35)
> >>> We don't have any platform that is composed by 2 or more platforms so
> >>
== Series Details ==
Series: drm/i915: Clean up ilk+ csc stuff (rev2)
URL : https://patchwork.freedesktop.org/series/56857/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5753_full -> Patchwork_12478_full
Summary
---
== Series Details ==
Series: drm/i915: Fix off-by-one in reporting hanging process
URL : https://patchwork.freedesktop.org/series/58073/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5753 -> Patchwork_12481
Summary
---
On Fri, Mar 15, 2019 at 10:26:04AM -0700, Bob Paauwe wrote:
> On Fri, 15 Mar 2019 10:01:51 -0700
> Rodrigo Vivi wrote:
>
> > On Fri, Mar 15, 2019 at 09:55:47AM -0700, Bob Paauwe wrote:
> > > On Fri, 15 Mar 2019 09:09:11 +
> > > Chris Wilson wrote:
> > >
> > > > Quoting Rodrigo Vivi (2019-
From: Anusha Srivatsa
EHL uses the same firmware as ICL.
Cc: Bob Paauwe
Signed-off-by: Anusha Srivatsa
Signed-off-by: Rodrigo Vivi
Reviewed-by: Lucas De Marchi
Link:
https://patchwork.freedesktop.org/patch/msgid/20190313211144.4842-9-rodrigo.v...@intel.com
---
drivers/gpu/drm/i915/intel_cs
From: Bob Paauwe
Add ElkhartLake as a unique platform as there are some differences
between it and Icelake.
Signed-off-by: Bob Paauwe
Signed-off-by: Rodrigo Vivi
Reviewed-by: Lucas De Marchi
Link:
https://patchwork.freedesktop.org/patch/msgid/20190313211144.4842-2-rodrigo.v...@intel.com
---
From: Lucas De Marchi
Elkhart Lake has a different set of PLLs as compared to Ice Lake,
although programming them is very similar.
Signed-off-by: Lucas De Marchi
Signed-off-by: Rodrigo Vivi
Reviewed-by: José Roberto de Souza
Link:
https://patchwork.freedesktop.org/patch/msgid/20190313211144.
From: Bob Paauwe
Configure the correct set of outputs for EHL. EHL has three DDI's
plus MIPI.
Cc: Lucas De Marchi
Signed-off-by: Bob Paauwe
Signed-off-by: Rodrigo Vivi
Reviewed-by: Lucas De Marchi
Link:
https://patchwork.freedesktop.org/patch/msgid/20190313211144.4842-6-rodrigo.v...@intel.c
From: James Ausmus
Add known EHL PCI IDs.
v2 (Rodrigo): Removed x86 early quirk. To be sent in a separated
patch cc'ing the appropriated list and maintainers for proper ack.
Cc: Bob Paauwe
Signed-off-by: James Ausmus
Signed-off-by: Rodrigo Vivi
Reviewed-by: José Roberto de Souza
Link:
h
From: Bob Paauwe
EHL has a different number of subslices.
Cc: Lucas De Marchi
Signed-off-by: Bob Paauwe
Signed-off-by: Rodrigo Vivi
Reviewed-by: Lucas De Marchi
Link:
https://patchwork.freedesktop.org/patch/msgid/20190313211144.4842-7-rodrigo.v...@intel.com
---
drivers/gpu/drm/i915/intel_d
Em sex, 2019-03-15 às 06:56 +, Tvrtko Ursulin escreveu:
> On 15/03/2019 00:52, Chris Wilson wrote:
> > Quoting José Roberto de Souza (2019-03-15 00:42:35)
> > > We don't have any platform that is composed by 2 or more platforms so
> > > we don't need a mask, lets drop it and remove the actual l
== Series Details ==
Series: no-primary
URL : https://patchwork.freedesktop.org/series/58072/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5753 -> Patchwork_12480
Summary
---
**FAILURE**
Serious unknown changes c
On 15/03/2019 17:28, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-03-15 17:09:28)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 3d8020888604..e3360a31f8d3 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_g
On 15/03/2019 17:12, Lucas De Marchi wrote:
On Fri, Mar 15, 2019 at 12:26:33PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Concept of a sub-platform already exist in our code (like ULX and ULT
platform variants and similar),implemented via the macros which check a
list of device ids to
Quoting Tvrtko Ursulin (2019-03-15 17:09:28)
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
> b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 3d8020888604..e3360a31f8d3 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -677,6 +677,7 @@ st
On Fri, 15 Mar 2019 10:01:51 -0700
Rodrigo Vivi wrote:
> On Fri, Mar 15, 2019 at 09:55:47AM -0700, Bob Paauwe wrote:
> > On Fri, 15 Mar 2019 09:09:11 +
> > Chris Wilson wrote:
> >
> > > Quoting Rodrigo Vivi (2019-03-14 22:53:44)
> > > > On Thu, Mar 14, 2019 at 10:38:39PM +, Chris Wi
On Fri, Mar 15, 2019 at 12:26:33PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Concept of a sub-platform already exist in our code (like ULX and ULT
platform variants and similar),implemented via the macros which check a
list of device ids to determine a match.
With this patch we consoli
From: Tvrtko Ursulin
Concept of a sub-platform already exist in our code (like ULX and ULT
platform variants and similar),implemented via the macros which check a
list of device ids to determine a match.
With this patch we consolidate device ids checking into a single function
called during earl
On Fri, Mar 15, 2019 at 09:55:47AM -0700, Bob Paauwe wrote:
> On Fri, 15 Mar 2019 09:09:11 +
> Chris Wilson wrote:
>
> > Quoting Rodrigo Vivi (2019-03-14 22:53:44)
> > > On Thu, Mar 14, 2019 at 10:38:39PM +, Chris Wilson wrote:
> > > > The basic setup of the i915_hw_ppgtt is the same be
== Series Details ==
Series: drm/i915: introduce macros to define register contents (rev4)
URL : https://patchwork.freedesktop.org/series/50513/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5753_full -> Patchwork_12476_full
On Fri, 15 Mar 2019 09:09:11 +
Chris Wilson wrote:
> Quoting Rodrigo Vivi (2019-03-14 22:53:44)
> > On Thu, Mar 14, 2019 at 10:38:39PM +, Chris Wilson wrote:
> > > The basic setup of the i915_hw_ppgtt is the same between gen6 and gen8,
> > > so refactor that into a common routine.
> > >
On Fri, Mar 15, 2019 at 04:39:33PM +, Chris Wilson wrote:
> ffs() is 1-indexed, but we want to use it as an index into an array, so
> use __ffs() instead.
>
> Fixes: eb8d0f5af4ec ("drm/i915: Remove GPU reset dependence on struct_mutex")
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
Rev
ffs() is 1-indexed, but we want to use it as an index into an array, so
use __ffs() instead.
Fixes: eb8d0f5af4ec ("drm/i915: Remove GPU reset dependence on struct_mutex")
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
1 file changed, 1 insertion(
Wrong branch...
-Chris
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---
drivers/gpu/drm/drm_debugfs.c | 2 +-
drivers/gpu/drm/drm_drv.c | 12
drivers/gpu/drm/drm_prime.c | 2 +-
3 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/drm_debugfs.c b/drivers/gpu/drm/drm_debugfs.c
index f8468eae0503..f7044ff82f9c 100644
-
On Thu, Mar 14, 2019 at 04:01:13PM -0700, José Roberto de Souza wrote:
> There is probably a issue in DMC firmwares(icl_dmc_ver1_07.bin and
> kbl_dmc_ver1_04.bin at least) that causes PSR2 SU to fail after
> exiting DC6 if EDP_PSR_TP1_TP3_SEL is kept in PSR_CTL, so for now
> lets workaround the iss
== Series Details ==
Series: drm/i915: Clean up ilk+ csc stuff (rev2)
URL : https://patchwork.freedesktop.org/series/56857/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5753 -> Patchwork_12478
Summary
---
**SUCCESS*
== Series Details ==
Series: series starting with [01/21] drm/i915: Move intel_engine_mask_t around
for use by i915_request_types.h (rev3)
URL : https://patchwork.freedesktop.org/series/58065/
State : failure
== Summary ==
Applying: drm/i915: Move intel_engine_mask_t around for use by
i915_r
On 2019-03-14, John Ogness wrote:
> On 2019-03-14, Daniel Vetter wrote:
>> That's why we came up with the trylock + immediate bail out design if
>> that fails. Plus really only render the oops int whatever is the
>> current display buffer, so that we don't have to do any hw
>> programming at all.
Hi Tvrtko,
On Tue, Nov 6, 2018 at 3:14 PM Tvrtko Ursulin <
tvrtko.ursu...@linux.intel.com> wrote:
>
> On 06/11/2018 04:13, Ankit Navik wrote:
> > From: Praveen Diwakar
> >
> > This patch gives us the active pending request count which is yet
> > to be submitted to the GPU
> >
> > Signed-off-by:
Hi Tvrtko,
On Tue, Dec 11, 2018 at 6:06 PM Tvrtko Ursulin <
tvrtko.ursu...@linux.intel.com> wrote:
>
> On 11/12/2018 10:14, Ankit Navik wrote:
> > From: Praveen Diwakar
> >
> > This patch will update power clock state register at runtime base on the
> > flag which can set by any governor which c
On 2019-03-14, Daniel Vetter wrote:
> That's why we came up with the trylock + immediate bail out design if
> that fails. Plus really only render the oops int whatever is the
> current display buffer, so that we don't have to do any hw programming
> at all.
I think this is your best option. The r
On 15/03/2019 15:55, Ville Syrjälä wrote:
On Fri, Mar 15, 2019 at 02:21:57PM +, Tvrtko Ursulin wrote:
[snip]
diff --git a/drivers/gpu/drm/i915/intel_device_info.h
b/drivers/gpu/drm/i915/intel_device_info.h
index 047d10bdd455..b03fbd2e451a 100644
--- a/drivers/gpu/drm/i915/intel_device_i
On Fri, Mar 15, 2019 at 03:35:04PM +0200, Ville Syrjälä wrote:
On Thu, Mar 14, 2019 at 06:37:22PM -0700, Vanshidhar Konda wrote:
On Thu, Mar 14, 2019 at 11:09:38PM +0200, Ville Syrjälä wrote:
>On Thu, Mar 14, 2019 at 02:00:29PM -0700, Vanshidhar Konda wrote:
>> On Thu, Mar 14, 2019 at 10:47:56PM
On Fri, Mar 15, 2019 at 05:55:19PM +0200, Ville Syrjälä wrote:
> On Fri, Mar 15, 2019 at 02:21:57PM +, Tvrtko Ursulin wrote:
> >
> > On 15/03/2019 14:09, Ville Syrjälä wrote:
> > > On Fri, Mar 15, 2019 at 12:26:33PM +, Tvrtko Ursulin wrote:
> > >> -#define IS_KBL_ULX(dev_priv)(INTEL_DE
On Fri, Mar 15, 2019 at 02:21:57PM +, Tvrtko Ursulin wrote:
>
> On 15/03/2019 14:09, Ville Syrjälä wrote:
> > On Fri, Mar 15, 2019 at 12:26:33PM +, Tvrtko Ursulin wrote:
> >> From: Tvrtko Ursulin
> >>
> >> Concept of a sub-platform already exist in our code (like ULX and ULT
> >> platform
== Series Details ==
Series: drm/i915: Move intel_engine_mask_t around for use by
i915_request_types.h (rev2)
URL : https://patchwork.freedesktop.org/series/58052/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5753_full -> Patchwork_12474_full
A usecase arose out of handling context recovery in mesa, whereby they
wish to recreate a context with fresh logical state but preserving all
other details of the original. Currently, they create a new context and
iterate over which bits they want to copy across, but it would much more
convenient i
Some users require that when a master batch is executed on one particular
engine, a companion batch is run simultaneously on a specific slave
engine. For this purpose, we introduce virtual engine bonding, allowing
maps of master:slaves to be constructed to constrain which physical
engines a virtual
Quoting Patchwork (2019-03-15 15:44:37)
> == Series Details ==
>
> Series: series starting with [01/21] drm/i915: Move intel_engine_mask_t
> around for use by i915_request_types.h
> URL : https://patchwork.freedesktop.org/series/58065/
> State : failure
>
> == Summary ==
>
> CI Bug Log - chan
== Series Details ==
Series: series starting with [01/21] drm/i915: Move intel_engine_mask_t around
for use by i915_request_types.h
URL : https://patchwork.freedesktop.org/series/58065/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5753 -> Patchwork_12477
Quoting Chris Wilson (2019-03-15 15:03:27)
> +static int create_clone(struct i915_user_extension __user *ext, void *data)
> +{
> + static int (* const fn[])(struct i915_gem_context *dst,
> + struct i915_gem_context *src) = {
> + [ilog2(I915_CONTEX
== Series Details ==
Series: drm/i915: introduce macros to define register contents (rev4)
URL : https://patchwork.freedesktop.org/series/50513/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5753 -> Patchwork_12476
Summary
In preparation to making the ppGTT binding for a context explicit (to
facilitate reusing the same ppGTT between different contexts), allow the
user to create and destroy named ppGTT.
v2: Replace global barrier for swapping over the ppgtt and tlbs with a
local context barrier (Tvrtko)
v3: serialise
We assumed that vm_mmap() would reject an attempt to mmap past the end of
the filp (our object), but we were wrong.
Reported-by: Antonio Argenziano
Testcase: igt/gem_mmap/bad-size
Signed-off-by: Chris Wilson
Cc: Antonio Argenziano
Cc: Joonas Lahtinen
Cc: Tvrtko Ursulin
Cc: sta...@vger.kernel.
Define a mutex for the exclusive use of interacting with the per-file
context-idr, that was previously guarded by struct_mutex. This allows us
to reduce the coverage of struct_mutex, with a view to removing the last
bits coordinating GEM context later. (In the short term, we avoid taking
struct_mut
As the final request on a ring may hold the reference to this ring (via
retiring the last pinned context), we may find ourselves chasing a
dangling pointer on completion of the list.
A quick solution is to hold a reference to the ring itself as we retire
along it so that we only free it after we s
We want to use intel_engine_mask_t inside i915_request.h, which means
extracting it from the general header file mess and placing it inside a
types.h. A knock on effect is that the compiler wants to warn about
type-contraction of ALL_ENGINES into intel_engine_maskt_t, so prepare
for the worst.
Sig
If a test fails, we quite often mark the device as wedged. Provide the
stub functions so that we can wedge the mock device, and avoid exploding
on test failures.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109981
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/selftests/mock_engi
If we use the STORE_DATA_INDEX function we can use a fixed offset and
avoid having to lookup up the engine HWS address. A step closer to being
able to emit the final breadcrumb during request_add rather than later
in the submission interrupt handler.
Signed-off-by: Chris Wilson
---
drivers/gpu/d
There is a desire to split a task onto two engines and have them run at
the same time, e.g. scanline interleaving to spread the workload evenly.
Through the use of the out-fence from the first execbuf, we can
coordinate secondary execbuf to only become ready simultaneously with
the first, so that w
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