Quoting Patchwork (2019-03-22 13:10:23)
> == Series Details ==
>
> Series: series starting with [CI,1/4] drm/i915: Introduce the
> i915_user_extension_method (rev3)
> URL : https://patchwork.freedesktop.org/series/58402/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM
>-Original Message-
>From: Roper, Matthew D
>Sent: Friday, March 22, 2019 3:23 AM
>To: Shankar, Uma
>Cc: Syrjala, Ville ; Lankhorst, Maarten
>; intel-gfx@lists.freedesktop.org; Sharma,
>Shashank
>
>Subject: Re: [RFC v1 3/7] drm/i915: Add Support for Multi Segment Gamma Mode
>
>On Wed, M
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Introduce the
i915_user_extension_method (rev3)
URL : https://patchwork.freedesktop.org/series/58402/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5794 -> Patchwork_12571
===
On Thu, Mar 21, 2019 at 03:02:57PM -0700, Lucas De Marchi wrote:
> By the time icl_ddi_clock_get() is called we've just got the hw state
> from the pll registers. We don't need to read them again: we can rather
> reuse what was cached in the dpll_hw_state.
>
> Signed-off-by: Lucas De Marchi
> ---
On Thu, Mar 21, 2019 at 03:02:56PM -0700, Lucas De Marchi wrote:
> By the time cnl_ddi_clock_get() is called we've just got the hw state
> from the pll registers. We don't need to read them again: we can rather
> reuse what was cached in the dpll_hw_state.
>
> This also affects the code for ICL si
>-Original Message-
>From: Roper, Matthew D
>Sent: Friday, March 22, 2019 2:50 AM
>To: Shankar, Uma
>Cc: intel-gfx@lists.freedesktop.org; Lankhorst, Maarten
>; Syrjala, Ville ;
>Sharma,
>Shashank
>Subject: Re: [RFC v1 1/7] drm/i915: Add gamma mode property
>
>On Tue, Mar 19, 2019 at 02
On Thu, Mar 21, 2019 at 03:02:55PM -0700, Lucas De Marchi wrote:
> By the time skl_ddi_clock_get() is called - and thus
> skl_calc_wrpll_link() - we've just got the hw state from the pll
> registers. We don't need to read them again: we can rather reuse what
> was cached in the dpll_hw_state.
>
>
== Series Details ==
Series: drm/i915/bios: iterate over child devices to initialize ddi_port_info
URL : https://patchwork.freedesktop.org/series/58407/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/bios: iterate over child devices to initial
Re-enable clock gating of DDI clocks.
v2: Fix the default ddi clk state for mipi-dsi (Imre)
Fixes: 1026bea00381 (drm/i915/icl: Ungate DSI clocks)
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/icl_dsi.c | 2 +-
drivers/gpu/drm/i915/intel_ddi.c | 6 +++---
2 files changed, 4 insertio
IO enable sequencing needs ddi clocks enabled.
These clocks will be gated at a later point in
the enable sequence.
v2: Fix the commit header (uma)
Signed-off-by: Vandita Kulkarni
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/icl_dsi.c | 7 +++
1 file changed, 7 insertions(+)
diff --gi
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Introduce the
i915_user_extension_method (rev3)
URL : https://patchwork.freedesktop.org/series/58402/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Introduce the i915_user
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Introduce the
i915_user_extension_method (rev3)
URL : https://patchwork.freedesktop.org/series/58402/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
fd4168c2494d drm/i915: Introduce the i915_user_extension_met
Iterate over child devices instead of ports in parse_ddi_ports() to
initialize dri_port_info. We'll eventually need to decide some stuff
based on the child device order, which may be different from the port
order.
As a bonus, this allows better abstractions for e.g. dvo port mapping.
There's a su
4.19-stable review patch. If anyone has any objections, please let me know.
--
[ Upstream commit ca22f32a6296cbfa29de56328c8505560a18cfa8 ]
Legacy behaviour was to allow non-page-aligned mmap requests, as does the
linux mmap(2) implementation by virtue of automatically rounding
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Introduce the
i915_user_extension_method (rev2)
URL : https://patchwork.freedesktop.org/series/58402/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5794 -> Patchwork_12570
===
4.14-stable review patch. If anyone has any objections, please let me know.
--
[ Upstream commit ca22f32a6296cbfa29de56328c8505560a18cfa8 ]
Legacy behaviour was to allow non-page-aligned mmap requests, as does the
linux mmap(2) implementation by virtue of automatically rounding
== Series Details ==
Series: series starting with [v1,1/1] drm/i915/sleftests: live_execlists
subtest faster
URL : https://patchwork.freedesktop.org/series/58371/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5789_full -> Patchwork_12554_full
=
4.9-stable review patch. If anyone has any objections, please let me know.
--
[ Upstream commit ca22f32a6296cbfa29de56328c8505560a18cfa8 ]
Legacy behaviour was to allow non-page-aligned mmap requests, as does the
linux mmap(2) implementation by virtue of automatically rounding u
Quoting Lionel Landwerlin (2019-03-22 11:36:35)
> On 21/03/2019 14:15, Chris Wilson wrote:
> > Quoting Lionel Landwerlin (2019-03-21 14:08:39)
> >> Mostly it's just about having the ability to extend it.
> >> I can't really tell you up front what we're going to need until we do :)
> > Yup. My takea
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Introduce the
i915_user_extension_method (rev2)
URL : https://patchwork.freedesktop.org/series/58402/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Introduce the i915_user
On 21/03/2019 14:15, Chris Wilson wrote:
Quoting Lionel Landwerlin (2019-03-21 14:08:39)
Mostly it's just about having the ability to extend it.
I can't really tell you up front what we're going to need until we do :)
Yup. My takeaway is that the uAPI debugability is something that has
never be
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Introduce the
i915_user_extension_method (rev2)
URL : https://patchwork.freedesktop.org/series/58402/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2ab848dd268d drm/i915: Introduce the i915_user_extension_met
== Series Details ==
Series: lib: sync with the newer i915_pciids.h from the Kernel
URL : https://patchwork.freedesktop.org/series/58375/
State : success
== Summary ==
CI Bug Log - changes from IGT_4897_full -> IGTPW_2686_full
Summary
-
== Series Details ==
Series: series starting with [1/2] drm/i915: Flush pages on acquisition
URL : https://patchwork.freedesktop.org/series/58367/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5789_full -> Patchwork_12552_full
==
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Introduce the
i915_user_extension_method
URL : https://patchwork.freedesktop.org/series/58402/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5794 -> Patchwork_12569
==
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Introduce the
i915_user_extension_method
URL : https://patchwork.freedesktop.org/series/58402/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Introduce the i915_user_extens
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Introduce the
i915_user_extension_method
URL : https://patchwork.freedesktop.org/series/58402/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e0e2e4bc30d9 drm/i915: Introduce the i915_user_extension_method
-:7
Quoting Chris Wilson (2019-03-22 08:57:35)
> Quoting Sujaritha Sundaresan (2019-03-21 20:38:04)
> > Adding a call to intel_uc_suspend in i915_gem_suspend, which
> > is a common point for the suspend/resume and hibernate paths.
> > This fixes an unbalanced call that causes issues with the CTB
> > re
On Thu, 21 Mar 2019, Clinton Taylor wrote:
> On 3/20/19 6:54 AM, Imre Deak wrote:
>> From: Ville Syrjälä
>>
>> CDCLK has to be at least twice the BLCK regardless of audio. Audio
>> driver has to probe using this hook and increase the clock even in
>> absence of any display.
>>
>> v2: Use atomic r
On Thu, 21 Mar 2019, Manasi Navare wrote:
> In case of tiled displays where different tiles are displayed across
> different ports, we need to synchronize the transcoders involved.
> This patch implements the transcoder port sync feature for
> synchronizing one master transcoder with one or more s
On Thu, 21 Mar 2019, Rodrigo Vivi wrote:
> From: Bob Paauwe
>
> Configure the correct set of outputs for EHL. EHL has three DDI's
> plus MIPI.
Broken record, we don't have MIPI, we have MIPI DSI or just DSI.
Similarly, we don't have VESA, we have VESA DP or just DP.
BR,
Jani.
>
> Cc: Lucas De
On 22/03/2019 09:23, Tvrtko Ursulin wrote:
On 22/03/2019 00:24, Daniele Ceraolo Spurio wrote:
We're already updating the engine_mask to reflect what's in the HW, so
we can just get the info from there. A couple of macros have been added
to facilitate this.
Suggested-by: Chris Wilson
Signed-o
On Thu, 21 Mar 2019, Lucas De Marchi wrote:
> Instead of re-reading the registers we just read on the hw state
> readout, use the values saved on intel_shared_dpll. Besides not doing
> the MMIO, this helps on sharing code since we don't have to
> differentiate e.g. ICL and CNL because they have di
Exercise the in-kernel load balancer checking that we can distribute
batches across the set of ctx->engines to avoid load.
Signed-off-by: Chris Wilson
---
tests/Makefile.am | 1 +
tests/Makefile.sources | 1 +
tests/i915/gem_exec_balancer.c | 886
Measure the baseline latency between contexts in order to directly
compare that with the additional cost of preemption.
Signed-off-by: Chris Wilson
---
tests/i915/gem_exec_latency.c | 145 ++
1 file changed, 145 insertions(+)
diff --git a/tests/i915/gem_exec_late
On 22/03/2019 00:24, Daniele Ceraolo Spurio wrote:
We're already updating the engine_mask to reflect what's in the HW, so
we can just get the info from there. A couple of macros have been added
to facilitate this.
Suggested-by: Chris Wilson
Signed-off-by: Daniele Ceraolo Spurio
Cc: Chris Wils
It can be useful to have a single ioctl to create a context with all
the initial parameters instead of a series of create + setparam + setparam
ioctls. This extension to create context allows any of the parameters
to be passed in as a linked list to be applied to the newly constructed
context.
v2:
An idea for extending uABI inspired by Vulkan's extension chains.
Instead of expanding the data struct for each ioctl every time we need
to add a new feature, define an extension chain instead. As we add
optional interfaces to control the ioctl, we define a new extension
struct that can be linked i
Add a new mode for some more stress, submit the all-engines tests
simultaneously, a stream per engine.
Signed-off-by: Chris Wilson
---
tests/i915/gem_exec_whisper.c | 27 ++-
1 file changed, 22 insertions(+), 5 deletions(-)
diff --git a/tests/i915/gem_exec_whisper.c b/te
In preparation to making the ppGTT binding for a context explicit (to
facilitate reusing the same ppGTT between different contexts), allow the
user to create and destroy named ppGTT.
v2: Replace global barrier for swapping over the ppgtt and tlbs with a
local context barrier (Tvrtko)
v3: serialise
Check that the extended create interface accepts setparam.
Signed-off-by: Chris Wilson
---
tests/i915/gem_ctx_create.c | 57 +
1 file changed, 57 insertions(+)
diff --git a/tests/i915/gem_ctx_create.c b/tests/i915/gem_ctx_create.c
index a664070db..e12f41691 1
Previously, our view has been always to run the engines independently
within a context. (Multiple engines happened before we had contexts and
timelines, so they always operated independently and that behaviour
persisted into contexts.) However, at the user level the context often
represents a singl
The invalid set/get tests do not serve the purpose of detecting whether
or not invalid parameters are indeed detect correctly -- simply because
the kernel is the arbiter of what is invalid and this test second
guesses that and is wrong.
The intent of this test was to ensure that we didn't include
Queues are a form of contexts that share vm and enfore a single timeline
across all engines. Test switching between them, just like ordinary
contexts.
Signed-off-by: Chris Wilson
---
tests/i915/gem_ctx_switch.c | 75 +++--
1 file changed, 55 insertions(+), 20 dele
To exercise the new I915_CONTEXT_PARAM_ENGINES and interactions with
gem_execbuf().
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Cc: Andi Shyti
---
tests/Makefile.sources | 1 +
tests/i915/gem_ctx_engines.c | 441 +++
tests/meson.build| 1
To make the demonstration of the cheeky preemption more impactful, make
the second context a nop to contrast the first being 1024
MI_STORE_DWORD_IMM. Then if we execute and wait on the second context
before executing the first, the client latency is even more drastically
reduced.
To more clearly s
CI complains that the exhaustive test of trying every size up to the
limit is too slow, so add a simple test that tries to submit one
extreme batch buffer and check all the relocations land.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=10
Signed-off-by: Chris Wilson
---
tests/i915/
commit 53073249452d307b66c2ab9a4b5ebf94db534ad6
Author: Chris Wilson
Date: Thu Jan 25 17:55:58 2018 +
drm/i915: Allow contexts to share a single timeline across all engines
Signed-off-by: Chris Wilson
---
include/drm-uapi/i915_drm.h | 192 +---
1 file
Avoid embedding the DRM_IOCTL() macro into the error message as it is
unreadable, and instead always wrap the ioctl with a self-descriptive
helper.
Signed-off-by: Chris Wilson
---
lib/i915/gem_context.c | 72 --
1 file changed, 34 insertions(+), 38 deletio
Exercise cloning contexts, an extension of merely creating one.
Signed-off-by: Chris Wilson
---
tests/Makefile.sources | 1 +
tests/i915/gem_ctx_clone.c | 421 +
tests/meson.build | 1 +
3 files changed, 423 insertions(+)
create mode 100644 t
Check that the GPU even exists before submitting a batch.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109589
Signed-off-by: Chris Wilson
---
tests/kms_fence_pin_leak.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/kms_fence_pin_leak.c b/tests/kms_fence_pin_leak.c
index 62c
How much energy does spinning on a semaphore consume relative to plain
old spinning?
Signed-off-by: Chris Wilson
---
tests/i915/gem_exec_schedule.c | 72 +-
1 file changed, 71 insertions(+), 1 deletion(-)
diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/g
v2: Test each shared context is its own timeline and allows request
reordering between shared contexts.
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Tvrtko Ursulin
Cc: Mika Kuoppala
Cc: Michal Wajdeczko
---
lib/i915/gem_context.c| 68 +++
lib/i915/gem_context.h| 13 +
We removed next_seqno in 5.1, so time to wave goodbye.
Signed-off-by: Chris Wilson
---
tests/i915/gem_exec_whisper.c | 12
1 file changed, 12 deletions(-)
diff --git a/tests/i915/gem_exec_whisper.c b/tests/i915/gem_exec_whisper.c
index d5afc8119..61b8d6dac 100644
--- a/tests/i915/g
In order to correctly serialise the order of execution between rings, we
need to flag the scratch address as being written. Make it so.
Signed-off-by: Chris Wilson
---
tests/i915/gem_exec_nop.c | 152 +-
1 file changed, 133 insertions(+), 19 deletions(-)
diff
Show the total power consumed across all the whispers.
Signed-off-by: Chris Wilson
---
tests/i915/gem_exec_whisper.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/tests/i915/gem_exec_whisper.c b/tests/i915/gem_exec_whisper.c
index 0b15fe431..6c3b53756 100644
---
Exercise basic creation and swapping between new address spaces.
Signed-off-by: Chris Wilson
---
lib/Makefile.sources | 2 +
lib/i915/gem_vm.c | 130
lib/i915/gem_vm.h | 38 ++
lib/meson.build| 1 +
tests/Makefile.sources |
commit 364df3d04d51f0aad13b898f3dffca8c2d03d2b3 (HEAD)
Author: Chris Wilson
Date: Fri Jun 30 13:40:53 2017 +0100
drm/i915: Allow specification of parallel execbuf
Signed-off-by: Chris Wilson
---
include/drm-uapi/i915_drm.h | 137 +++-
1 file changed, 135 i
The submit-fence + load_balancing apis allow for us to execute a named
pair of engines in parallel; that this by submitting a request to one
engine, we can then use the generated submit-fence to submit a second
request to another engine and have it execute at the same time.
Furthermore, by specifyi
We may use HW semaphores to schedule nearly-ready work such that they
are already spinning on the GPU waiting for the completion on another
engine. However, we don't want for that spinning task to actually block
any real work should it be scheduled.
Signed-off-by: Chris Wilson
---
tests/i915/gem
Read the RAPL power metrics courtesy of perf. Or your local HW
equivalent?
v2: uselocale()
Signed-off-by: Chris Wilson
---
lib/Makefile.am | 1 +
lib/Makefile.sources | 2 +
lib/igt_gpu_power.c | 114 +++
lib/igt_gpu_power.h | 59 +
Exercise reusing the GTT of one ctx in another.
Signed-off-by: Chris Wilson
---
tests/i915/gem_ctx_param.c | 83 --
1 file changed, 71 insertions(+), 12 deletions(-)
diff --git a/tests/i915/gem_ctx_param.c b/tests/i915/gem_ctx_param.c
index b3f8637df..54ade8b
On Thu, 21 Mar 2019, José Roberto de Souza wrote:
> Right now it have a mix of PSR registers that are relative to PSR
> mmio base and other register with a hardcoded address, lets keep it
> consistented and have it all relative to mmio base.
This is not strictly limited to this patch, but an over
Quoting Sujaritha Sundaresan (2019-03-21 20:38:04)
> Adding a call to intel_uc_suspend in i915_gem_suspend, which
> is a common point for the suspend/resume and hibernate paths.
> This fixes an unbalanced call that causes issues with the CTB
> register/deregister.
>
> v2: Making the call unconditi
== Series Details ==
Series: drm/i915: Pass intel_context to i915_request_create() (rev2)
URL : https://patchwork.freedesktop.org/series/58380/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5793 -> Patchwork_12568
Summary
-
On Thu, 21 Mar 2019, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Both LVDS and eDP have the same code to look up the preferred mode
> from the connector probed_modes list. Move the code to a common
> location.
>
> Signed-off-by: Ville Syrjälä
This series is something I've been meaning to do
Quoting Daniele Ceraolo Spurio (2019-03-22 00:24:31)
> We're already updating the engine_mask to reflect what's in the HW, so
> we can just get the info from there. A couple of macros have been added
> to facilitate this.
>
> Suggested-by: Chris Wilson
> Signed-off-by: Daniele Ceraolo Spurio
> C
On 2019.03.22 08:18:33 +, Chris Wilson wrote:
> Quoting Zhenyu Wang (2019-02-18 08:59:07)
> > On 2019.02.05 20:30:33 +, Chris Wilson wrote:
> > > drivers/gpu/drm/i915/gvt/display.c:457: warning: Function parameter or
> > > member 'connected' not described in 'intel_vgpu_emulate_hotplug'
>
Quoting Zhenyu Wang (2019-02-18 08:59:07)
> On 2019.02.05 20:30:33 +, Chris Wilson wrote:
> > drivers/gpu/drm/i915/gvt/display.c:457: warning: Function parameter or
> > member 'connected' not described in 'intel_vgpu_emulate_hotplug'
> > drivers/gpu/drm/i915/gvt/display.c:457: warning: Excess
>> -Original Message-
>> From: Kulkarni, Vandita
>> Sent: Thursday, March 21, 2019 7:23 PM
>> To: Shankar, Uma ;
>> intel-gfx@lists.freedesktop.org
>> Cc: Nikula, Jani ; Chauhan, Madhav
>>
>> Subject: RE: [PATCH 1/2] drm/i915/icl/dsi: Ungate clocks if gated
>>
>>
>> > -Original Message
> -Original Message-
> From: Kulkarni, Vandita
> Sent: Thursday, March 21, 2019 7:23 PM
> To: Shankar, Uma ; intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani ; Chauhan, Madhav
>
> Subject: RE: [PATCH 1/2] drm/i915/icl/dsi: Ungate clocks if gated
>
>
> > -Original Message-
> >
Start acquiring the logical intel_context and using that as our primary
means for request allocation. This is the initial step to allow us to
avoid requiring struct_mutex for request allocation along the
perma-pinned kernel context, but it also provides a foundation for
breaking up the complex requ
== Series Details ==
Series: series starting with [1/6] drm/i915: Refactor EDID fixed mode search
URL : https://patchwork.freedesktop.org/series/58356/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5788_full -> Patchwork_12549_full
=
Quoting José Roberto de Souza (2019-03-22 00:42:59)
> There is some kms_frontbuffer_tracking failures due FBC being
> disabled with the reason "framebuffer not tiled or fenced".
> Although the test is setting up everything correctly to have
> FBC enabled sporadically it is failing, due the alignmen
101 - 174 of 174 matches
Mail list logo
