[Intel-gfx] [RFC patch 15/41] drm: Remove the ULONG_MAX stack trace hackery

2019-04-10 Thread Thomas Gleixner
No architecture terminates the stack trace with ULONG_MAX anymore. Remove the cruft. Signed-off-by: Thomas Gleixner Cc: intel-gfx@lists.freedesktop.org Cc: Joonas Lahtinen Cc: Maarten Lankhorst Cc: dri-de...@lists.freedesktop.org Cc: David Airlie Cc: Jani Nikula Cc: Daniel Vetter Cc:

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11

2019-04-10 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11 URL : https://patchwork.freedesktop.org/series/59278/ State : success == Summary == CI Bug Log - changes from CI_DRM_5898 -> Patchwork_12751

Re: [Intel-gfx] [PATCH i-g-t] lib: Rework __kms_addfb() function

2019-04-10 Thread Arkadiusz Hiler
On Wed, Apr 03, 2019 at 07:24:39PM -0300, Rodrigo Siqueira wrote: > The function __kms_addfb() and drmModeAddFB2WithModifiers() have a > similar code. Due to this similarity, this commit replace part of the > code inside __kms_addfb() by using drmModeAddFB2WithModifiers(). igt master % grep

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11

2019-04-10 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11 URL : https://patchwork.freedesktop.org/series/59278/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0c869cb6edc4 drm/i915: Use dedicated rc6 enabling sequence for

[Intel-gfx] ✓ Fi.CI.BAT: success for snd/hda: Only get/put display_power once (rev2)

2019-04-10 Thread Patchwork
== Series Details == Series: snd/hda: Only get/put display_power once (rev2) URL : https://patchwork.freedesktop.org/series/59267/ State : success == Summary == CI Bug Log - changes from CI_DRM_5898 -> Patchwork_12750 Summary ---

Re: [Intel-gfx] [PATCH 7/7] drm/i915/icl: Don't warn on spurious interrupts

2019-04-10 Thread Chris Wilson
Quoting Mika Kuoppala (2019-04-10 11:59:23) > There is a chance we can see spurious interrupts in live > now. We have more engines enabled and that with more elaborate > access patterns with pm and display, increases the chances > hardware just makes a social call, without anything to work on. >

Re: [Intel-gfx] [PATCH 10/29] drm/i915: Introduce context->enter() and context->exit()

2019-04-10 Thread Tvrtko Ursulin
On 10/04/2019 11:13, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-04-10 11:05:13) On 08/04/2019 10:17, Chris Wilson wrote: +void __intel_context_enter(struct intel_context *ce) +{ + struct drm_i915_private *i915 = ce->gem_context->i915; + + if (!i915->gt.active_requests++) +

Re: [Intel-gfx] [PATCH 4/7] drm/i915/icl: Disable video turbo mode for rp control

2019-04-10 Thread Chris Wilson
Quoting Mika Kuoppala (2019-04-10 11:59:20) > There is no video turbo mode for gen11, so don't set it. > > v2: inline (Chris) > > Cc: Chris Wilson > Signed-off-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/intel_pm.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git

Re: [Intel-gfx] [PATCH] snd/hda: Only get/put display_power once

2019-04-10 Thread Takashi Iwai
On Wed, 10 Apr 2019 12:44:49 +0200, Takashi Iwai wrote: > > On Wed, 10 Apr 2019 12:24:24 +0200, > Chris Wilson wrote: > > > > Quoting Takashi Iwai (2019-04-10 11:09:47) > > > On Wed, 10 Apr 2019 10:17:33 +0200, > > > Chris Wilson wrote: > > > > > > > > While we only allow a single display power

[Intel-gfx] [PATCH 1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11

2019-04-10 Thread Mika Kuoppala
In order not to inflate gen9 rc6 enabling sequence with gen11 specifics, use a separate function for it. Signed-off-by: Mika Kuoppala Reviewed-by: Chris Wilson --- drivers/gpu/drm/i915/intel_pm.c | 72 + 1 file changed, 72 insertions(+) diff --git

[Intel-gfx] [PATCH 5/7] drm/i915/icl: Handle rps interrupts without irq lock

2019-04-10 Thread Mika Kuoppala
Unlike previous gens, we already hold the irq_lock on entering the rps handler so we can't use it as it is. Make a gen11 specific rps interrupt handler without locking. v2: return early (Chris) Cc: Chris Wilson Signed-off-by: Mika Kuoppala Reviewed-by: Chris Wilson ---

[Intel-gfx] [PATCH 2/7] drm/i915/icl: Apply a recommended rc6 threshold

2019-04-10 Thread Mika Kuoppala
On gen11 the recommended rc6 threshold differs from previous gens, apply it. Move the write to a correct spot in sequence. v2: do write in 2b, fix bspec ref (Michal) Bspec: 33149 Cc: Michal Wajdeczko Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/intel_pm.c | 4 ++-- 1 file changed, 2

[Intel-gfx] [PATCH 3/7] drm/i915/icl: Enable media sampler powergate

2019-04-10 Thread Mika Kuoppala
Enable media sampler powergate as recommended. v2: use REG_BIT (Chris) Cc: Chris Wilson Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_reg.h | 5 +++-- drivers/gpu/drm/i915/intel_pm.c | 4 +++- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git

[Intel-gfx] [PATCH 7/7] drm/i915/icl: Don't warn on spurious interrupts

2019-04-10 Thread Mika Kuoppala
There is a chance we can see spurious interrupts in live now. We have more engines enabled and that with more elaborate access patterns with pm and display, increases the chances hardware just makes a social call, without anything to work on. Remove the error as we have tests to actually probe if

[Intel-gfx] [PATCH 6/7] drm/i915: Use Engine1 instance for gen11 pm interrupts

2019-04-10 Thread Mika Kuoppala
With gen11 the interrupt registers are shared between 2 engines, with Engine1 instance being upper word and Engine0 instance being lower. Annoyingly gen11 selected the pm interrupts to be in the Engine1 instance. Rectify the situation by shifting the access accordingly, based on gen. v2:

[Intel-gfx] [PATCH 4/7] drm/i915/icl: Disable video turbo mode for rp control

2019-04-10 Thread Mika Kuoppala
There is no video turbo mode for gen11, so don't set it. v2: inline (Chris) Cc: Chris Wilson Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/intel_pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix setting 10 bit color mode

2019-04-10 Thread Patchwork
== Series Details == Series: drm/i915: Fix setting 10 bit color mode URL : https://patchwork.freedesktop.org/series/59246/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5897_full -> Patchwork_12745_full Summary ---

Re: [Intel-gfx] [PATCH] drm/i915: Update HDMI max TMDS data rate definition for VBT

2019-04-10 Thread Ville Syrjälä
On Wed, Apr 10, 2019 at 10:08:43AM +, Chiou, Cooper wrote: > Hi Ville, > > > > From Intel BSpec, this is HDMI max data rate bits field definition as the > following, and please find my experiment/log below. And as I knew, all > platforms are using Default 000 for max data rate. (No any

Re: [Intel-gfx] [PATCH] snd/hda: Only get/put display_power once

2019-04-10 Thread Takashi Iwai
On Wed, 10 Apr 2019 12:24:24 +0200, Chris Wilson wrote: > > Quoting Takashi Iwai (2019-04-10 11:09:47) > > On Wed, 10 Apr 2019 10:17:33 +0200, > > Chris Wilson wrote: > > > > > > While we only allow a single display power reference, the current > > > acquisition/release is racy and a direct call

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for snd/hda: Only get/put display_power once (rev2)

2019-04-10 Thread Patchwork
== Series Details == Series: snd/hda: Only get/put display_power once (rev2) URL : https://patchwork.freedesktop.org/series/59267/ State : warning == Summary == $ dim checkpatch origin/drm-tip 156ac646b015 snd/hda: Only get/put display_power once -:76: ERROR:MISSING_SIGN_OFF: Missing

Re: [Intel-gfx] [PATCH 11/29] drm/i915: Pass intel_context to i915_request_create()

2019-04-10 Thread Tvrtko Ursulin
On 08/04/2019 10:17, Chris Wilson wrote: Start acquiring the logical intel_context and using that as our primary means for request allocation. This is the initial step to allow us to avoid requiring struct_mutex for request allocation along the perma-pinned kernel context, but it also provides

Re: [Intel-gfx] [PATCH 1/7] drm/i915/sdvo: Fix AVI infoframe TX rate readout

2019-04-10 Thread Ville Syrjälä
On Tue, Apr 09, 2019 at 10:16:04PM +0100, Chris Wilson wrote: > Quoting Ville Syrjala (2019-04-09 15:40:48) > > From: Ville Syrjälä > > > > The AVI infoframe readout code currently issues a > > SDVO_CMD_GET_HBUF_TXRATE before SDVO_CMD_SET_HBUF_INDEX, which is > > not the correct order for these

Re: [Intel-gfx] [PATCH] snd/hda: Only get/put display_power once

2019-04-10 Thread Chris Wilson
Quoting Takashi Iwai (2019-04-10 11:09:47) > On Wed, 10 Apr 2019 10:17:33 +0200, > Chris Wilson wrote: > > > > While we only allow a single display power reference, the current > > acquisition/release is racy and a direct call may run concurrently with > > a runtime-pm worker. Prevent the double

Re: [Intel-gfx] [PATCH 10/29] drm/i915: Introduce context->enter() and context->exit()

2019-04-10 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-04-10 11:05:13) > > On 08/04/2019 10:17, Chris Wilson wrote: > > +void __intel_context_enter(struct intel_context *ce) > > +{ > > + struct drm_i915_private *i915 = ce->gem_context->i915; > > + > > + if (!i915->gt.active_requests++) > > +

Re: [Intel-gfx] [PATCH] drm/i915: Update HDMI max TMDS data rate definition for VBT

2019-04-10 Thread Chiou, Cooper
Hi Ville, From Intel BSpec, this is HDMI max data rate bits field definition as the following, and please find my experiment/log below. And as I knew, all platforms are using Default 000 for max data rate. (No any platform used 2.97/1.65 definition in VBT so far). That’s why I correct HDMI

Re: [Intel-gfx] [PATCH] snd/hda: Only get/put display_power once

2019-04-10 Thread Takashi Iwai
On Wed, 10 Apr 2019 10:17:33 +0200, Chris Wilson wrote: > > While we only allow a single display power reference, the current > acquisition/release is racy and a direct call may run concurrently with > a runtime-pm worker. Prevent the double unreference by atomically > tracking the

Re: [Intel-gfx] [PATCH 08/29] drm/i915: Introduce struct intel_wakeref

2019-04-10 Thread Tvrtko Ursulin
On 10/04/2019 11:01, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-04-10 10:49:35) On 08/04/2019 10:17, Chris Wilson wrote: For controlling runtime pm of the GT and engines, we would like to have a callback to do extra work the first time we wake up and the last time we drop the wakeref.

Re: [Intel-gfx] [PATCH 10/29] drm/i915: Introduce context->enter() and context->exit()

2019-04-10 Thread Tvrtko Ursulin
On 08/04/2019 10:17, Chris Wilson wrote: We wish to start segregating the power management into different control domains, both with respect to the hardware and the user interface. The first step is that at the lowest level flow of requests, we want to process a context event (and not a global

Re: [Intel-gfx] [PATCH 08/29] drm/i915: Introduce struct intel_wakeref

2019-04-10 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-04-10 10:49:35) > > On 08/04/2019 10:17, Chris Wilson wrote: > > For controlling runtime pm of the GT and engines, we would like to have > > a callback to do extra work the first time we wake up and the last time > > we drop the wakeref. This first/last access needs

Re: [Intel-gfx] [PATCH 09/29] drm/i915: Pull the GEM powermangement coupling into its own file

2019-04-10 Thread Tvrtko Ursulin
On 08/04/2019 10:17, Chris Wilson wrote: Split out the powermanagement portion (GT wakeref, suspend/resume) of GEM from i915_gem.c into its own file. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/Makefile.header-test | 1 +

Re: [Intel-gfx] [PATCH 08/29] drm/i915: Introduce struct intel_wakeref

2019-04-10 Thread Tvrtko Ursulin
On 08/04/2019 10:17, Chris Wilson wrote: For controlling runtime pm of the GT and engines, we would like to have a callback to do extra work the first time we wake up and the last time we drop the wakeref. This first/last access needs serialisation and so we encompass a mutex with the regular

Re: [Intel-gfx] [PATCH 07/29] drm/i915: Only reset the pinned kernel contexts on resume

2019-04-10 Thread Tvrtko Ursulin
On 08/04/2019 10:17, Chris Wilson wrote: On resume, we know that the only pinned contexts in danger of seeing corruption are the kernel context, and so we do not need to walk the list of all GEM contexts as we tracked them on each engine. Signed-off-by: Chris Wilson ---

[Intel-gfx] ✓ Fi.CI.BAT: success for snd/hda: Only get/put display_power once

2019-04-10 Thread Patchwork
== Series Details == Series: snd/hda: Only get/put display_power once URL : https://patchwork.freedesktop.org/series/59267/ State : success == Summary == CI Bug Log - changes from CI_DRM_5897 -> Patchwork_12749 Summary ---

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11

2019-04-10 Thread Chris Wilson
Quoting Patchwork (2019-04-10 06:59:20) > Possible fixes > > * igt@i915_pm_rps@reset: > - shard-iclb: FAIL [fdo#108059] -> PASS +2 \o/ -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

Re: [Intel-gfx] [PATCH 4/4] lib/hexdump.c: Allow multiple groups to be separated by lines '|'

2019-04-10 Thread David Laight
From: Alastair D'Silva > Sent: 10 April 2019 04:17 > With the wider display format, it can become hard to identify how many > bytes into the line you are looking at. > > The patch adds new flags to hex_dump_to_buffer() and print_hex_dump() to > print vertical lines to separate every N groups of

Re: [Intel-gfx] [PATCH v2] Core-for-CI:ICL_only Disable ACPI idle driver

2019-04-10 Thread Peres, Martin
On 09/04/2019 18:49, Wysocki, Rafael J wrote: > On 4/9/2019 8:29 AM, Anshuman Gupta wrote: >> There were few system hung observed while running i915_pm_rpm igt test. >> FDO https://bugs.freedesktop.org/show_bug.cgi?id=108840 >> Root cause is believed to due to page fault in ACPI idle driver. >>

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Avoiding reclaim tainting from runtime-pm debug

2019-04-10 Thread Patchwork
== Series Details == Series: drm/i915: Avoiding reclaim tainting from runtime-pm debug URL : https://patchwork.freedesktop.org/series/59242/ State : success == Summary == CI Bug Log - changes from CI_DRM_5897_full -> Patchwork_12744_full

Re: [Intel-gfx] [PATCH] snd/hda: Only get/put display_power once

2019-04-10 Thread Chris Wilson
Quoting Chris Wilson (2019-04-10 09:17:33) > While we only allow a single display power reference, the current > acquisition/release is racy and a direct call may run concurrently with > a runtime-pm worker. Prevent the double unreference by atomically > tracking the display_power_active cookie.

Re: [Intel-gfx] [PATCH 7/7] drm/i915: Use Engine1 instance for gen11 pm interrupts

2019-04-10 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2019-04-09 17:13:10) >> With gen11 the interrupt registers are shared between 2 engines, >> with Engine1 instance being upper word and Engine0 instance being >> lower. Annoyingly gen11 selected the pm interrupts to be in the >> Engine1 instance. > >

[Intel-gfx] [PATCH] snd/hda: Only get/put display_power once

2019-04-10 Thread Chris Wilson
While we only allow a single display power reference, the current acquisition/release is racy and a direct call may run concurrently with a runtime-pm worker. Prevent the double unreference by atomically tracking the display_power_active cookie. Testcase: igt/i915_pm_rpm/module-reload #glk-dsi

Re: [Intel-gfx] [PATCH 6/7] drm/i915/icl: Handle rps interrupts without irq lock

2019-04-10 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2019-04-09 17:13:09) >> Unlike previous gens, we already hold the irq_lock on >> entering the rps handler so we can't use it as it is. >> >> Make a gen11 specific rps interrupt handler without >> locking. >> >> Signed-off-by: Mika Kuoppala >> ---

Re: [Intel-gfx] [PATCH 5/7] drm/i915/icl: Disable video turbo mode for rp control

2019-04-10 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2019-04-09 17:13:08) >> There is no video turbo mode for gen11, so don't set it. >> >> Signed-off-by: Mika Kuoppala >> --- >> drivers/gpu/drm/i915/intel_pm.c | 5 - >> 1 file changed, 4 insertions(+), 1 deletion(-) >> >> diff --git

Re: [Intel-gfx] [PATCH 3/7] drm/i915/icl: Apply recommended rc6 idle hysteresis

2019-04-10 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2019-04-09 17:13:06) >> Use a recommended idle hysteresis for media and render powergates. >> >> References: bspec#52070 >> Signed-off-by: Mika Kuoppala >> --- >> drivers/gpu/drm/i915/intel_pm.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2

Re: [Intel-gfx] [PATCH] snd/hda: Balance hda->need_i915_power across runtime_suspend

2019-04-10 Thread Takashi Iwai
On Wed, 10 Apr 2019 09:59:19 +0200, Chris Wilson wrote: > > Quoting Takashi Iwai (2019-04-10 06:29:07) > > On Wed, 10 Apr 2019 00:53:31 +0200, > > Chris Wilson wrote: > > > > > > Quoting Takashi Iwai (2019-04-09 22:35:28) > > > > On Tue, 09 Apr 2019 23:27:41 +0200, > > > > Chris Wilson wrote: >

Re: [Intel-gfx] [PATCH] snd/hda: Balance hda->need_i915_power across runtime_suspend

2019-04-10 Thread Chris Wilson
Quoting Takashi Iwai (2019-04-10 06:29:07) > On Wed, 10 Apr 2019 00:53:31 +0200, > Chris Wilson wrote: > > > > Quoting Takashi Iwai (2019-04-09 22:35:28) > > > On Tue, 09 Apr 2019 23:27:41 +0200, > > > Chris Wilson wrote: > > > > > > > > In runtime_resume, we release the local display_power

[Intel-gfx] ✓ Fi.CI.IGT: success for Add HDR Metadata Parsing and handling in DRM layer (rev8)

2019-04-10 Thread Patchwork
== Series Details == Series: Add HDR Metadata Parsing and handling in DRM layer (rev8) URL : https://patchwork.freedesktop.org/series/25091/ State : success == Summary == CI Bug Log - changes from CI_DRM_5897_full -> Patchwork_12743_full

Re: [Intel-gfx] [PATCH 3/4] lib/hexdump.c: Replace ascii bool in hex_dump_to_buffer with flags

2019-04-10 Thread Dan Carpenter
On Wed, Apr 10, 2019 at 01:17:19PM +1000, Alastair D'Silva wrote: > @@ -107,7 +108,7 @@ EXPORT_SYMBOL(bin2hex); > * string if enough space had been available. > */ > int hex_dump_to_buffer(const void *buf, size_t len, int rowsize, int > groupsize, > -char *linebuf, size_t

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11

2019-04-10 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11 URL : https://patchwork.freedesktop.org/series/59237/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5897_full -> Patchwork_12742_full

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