Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915/icl: Factor out combo PHY lane power setup helper

On Thu, 02 May 2019, Imre Deak wrote: > On Thu, May 02, 2019 at 05:45:45PM +0300, Jani Nikula wrote: >> On Thu, 02 May 2019, Imre Deak wrote: >> > Thanks for the review, series pushed to -dinq, with the s/icl_/intel_/ >> > change and adding the headers to intel_combo_phy.h required by the >> > re

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/perf: Refactor oa object to better manage resources (rev2)

== Series Details == Series: drm/i915/perf: Refactor oa object to better manage resources (rev2) URL : https://patchwork.freedesktop.org/series/60176/ State : success == Summary == CI Bug Log - changes from CI_DRM_6031_full -> Patchwork_12954_full ==

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with RFC: hung_task: taint kernel (rev2)

== Series Details == Series: series starting with RFC: hung_task: taint kernel (rev2) URL : https://patchwork.freedesktop.org/series/60228/ State : success == Summary == CI Bug Log - changes from CI_DRM_6031_full -> Patchwork_12953_full Sum

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Move the PIPEMISC write the correct place

== Series Details == Series: series starting with [1/2] drm/i915: Move the PIPEMISC write the correct place URL : https://patchwork.freedesktop.org/series/60233/ State : success == Summary == CI Bug Log - changes from CI_DRM_6031_full -> Patchwork_12951_full ==

[Intel-gfx] [drm-tip:drm-tip 4/9] htmldocs: drivers/gpu/drm/scheduler/sched_main.c:364: warning: Function parameter or member 'bad' not described in 'drm_sched_stop'

tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip head: 6f67b24f2fc7b90a94e4163ae4cd01bc2783fbfd commit: fb4f0930305e60c480c86c0e2ba9bc8683179bd9 [4/9] Merge remote-tracking branch 'origin/drm-misc-next' into drm-tip reproduce: make htmldocs If you fix the issue, kindly add following ta

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v5,1/4] drm/i915: Fix the pipe state timing mismatch warnings

== Series Details == Series: series starting with [v5,1/4] drm/i915: Fix the pipe state timing mismatch warnings URL : https://patchwork.freedesktop.org/series/60218/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029_full -> Patchwork_12949_full =

Re: [Intel-gfx] [PATCH] RFC: hung_task: taint kernel

On 2019/05/03 5:46, Daniel Vetter wrote: > There's the hung_task_panic sysctl, but that's a bit an extreme measure. > As a fallback taint at least the machine. > > Our CI uses this to decide when a reboot is necessary, plus to figure > out whether the kernel is still happy. Why your CI can't watc

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add support for asynchronous display power disabling

== Series Details == Series: drm/i915: Add support for asynchronous display power disabling URL : https://patchwork.freedesktop.org/series/60242/ State : success == Summary == CI Bug Log - changes from CI_DRM_6032 -> Patchwork_12955 Summary

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers (rev2)

== Series Details == Series: drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers (rev2) URL : https://patchwork.freedesktop.org/series/60195/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029_full -> Patchwork_12948_full ===

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Add support for asynchronous display power disabling

== Series Details == Series: drm/i915: Add support for asynchronous display power disabling URL : https://patchwork.freedesktop.org/series/60242/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Add support for tracking wakerefs w/o power-on gu

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for asynchronous display power disabling

== Series Details == Series: drm/i915: Add support for asynchronous display power disabling URL : https://patchwork.freedesktop.org/series/60242/ State : warning == Summary == $ dim checkpatch origin/drm-tip 51d597ed4135 drm/i915: Add support for tracking wakerefs w/o power-on guarantee 105dea

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: the great header refactoring, part three

== Series Details == Series: drm/i915: the great header refactoring, part three URL : https://patchwork.freedesktop.org/series/60215/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029_full -> Patchwork_12947_full Summary -

Re: [Intel-gfx] [PATCH] drm/i915/guc: Fix runtime suspend

On 5/2/19 1:30 PM, Chris Wilson wrote: We are not allowed to rpm_get() inside the runtime-suspend callback, so split the intel_uc_suspend() into the core that assumes the caller holds the wakeref (intel_uc_runtime_suspend), and one acquires the wakeref as necessary (intel_uc_suspend). Reported

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: Refactor oa object to better manage resources (rev2)

== Series Details == Series: drm/i915/perf: Refactor oa object to better manage resources (rev2) URL : https://patchwork.freedesktop.org/series/60176/ State : success == Summary == CI Bug Log - changes from CI_DRM_6031 -> Patchwork_12954 Su

Re: [Intel-gfx] [PATCH 2/2] RFC: soft/hardlookup: taint kernel

On Thu, 2019-05-02 at 21:42 +0200, Daniel Vetter wrote: > There's the soft/hardlookup_panic sysctls, but that's a bit an > extreme > measure. As a fallback taint at least the machine. > > Our CI uses this to decide when a reboot is necessary, plus to figure > out whether the kernel is still happy.

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with RFC: hung_task: taint kernel (rev2)

== Series Details == Series: series starting with RFC: hung_task: taint kernel (rev2) URL : https://patchwork.freedesktop.org/series/60228/ State : success == Summary == CI Bug Log - changes from CI_DRM_6031 -> Patchwork_12953 Summary -

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/perf: Refactor oa object to better manage resources (rev2)

== Series Details == Series: drm/i915/perf: Refactor oa object to better manage resources (rev2) URL : https://patchwork.freedesktop.org/series/60176/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/perf: Refactor oa object to better manage res

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/execlists: Flush the tasklet on parking

== Series Details == Series: series starting with [1/2] drm/i915/execlists: Flush the tasklet on parking URL : https://patchwork.freedesktop.org/series/60216/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6029_full -> Patchwork_12946_full =

[Intel-gfx] [PATCH 08/10] drm/i915: Replace use of PLLS power domain with DISPLAY_CORE domain

There isn't a separate power domain specific to PLLs. When programming them we require the same power domain to be enabled which is needed when accessing other display core parts (not specific to any pipe/port/transcoder). This corresponds to the DISPLAY_CORE domain added previously in this patchse

[Intel-gfx] [PATCH 06/10] drm/i915: Remove the unneeded AUX power ref from intel_dp_detect()

We don't need the AUX power for the whole duration of the detect, only when we're doing AUX transfers. The AUX transfer function takes its own reference on the AUX power domain already. The two places during detect which access display core registers (not specific to a pipe/port/transcoder) only ne

[Intel-gfx] [PATCH 03/10] drm/i915: Add support for asynchronous display power disabling

By disabling a power domain asynchronously we can restrict holding a reference on that power domain to the actual code sequence that requires the power to be on for the HW access it's doing, by also avoiding unneeded on-off-on togglings of the power domain (since the disabling happens with a delay)

[Intel-gfx] [PATCH 10/10] drm/i915: Assert that TypeC ports are not used for eDP

Add an assert that we don't use TypeC ports for eDP. That may in theory be possible on TypeC legacy ports, but I'm not sure if that's a practical scenario, so let's deal with that only if there's a use case. Adding support for that wouldn't be too difficult, since TypeC mode switching is not possib

[Intel-gfx] [PATCH 02/10] drm/i915: Verify power domains state during suspend in all cases

There is no reason why we couldn't verify the power domains state during suspend in all cases, so do that. I overlooked this when originally adding the check. Cc: Chris Wilson Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/intel_runtime_pm.c | 6 +++--- 1 file changed, 3 insertions(+), 3 del

[Intel-gfx] [PATCH 05/10] drm/i915: WARN for eDP encoders in intel_dp_detect_dpcd()

We are not calling this function for eDP, so add an early assert about this for clarity. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/intel_dp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index

[Intel-gfx] [PATCH 07/10] drm/i915: Remove the unneeded AUX power ref from intel_dp_hpd_pulse()

The power get/put was added in commit 1c767b339b3938b19076ffdc9d70aa1e4235a45b Author: Imre Deak Date: Mon Aug 18 14:42:42 2014 +0300 drm/i915: take display port power domain in DP HPD handle to account for the HW access in ibx_digital_port_connected(). This latter call was in turn remove

[Intel-gfx] [PATCH 01/10] drm/i915: Add support for tracking wakerefs w/o power-on guarantee

It's useful to track runtime PM refs that don't guarantee a device power-on state to the rest of the driver. One such case is holding a reference that will be put asynchronously, during which normal users without their own reference shouldn't access the HW. A follow-up patch will add support for di

[Intel-gfx] [PATCH 04/10] drm/i915: Disable power asynchronously during DP AUX transfers

In a follow-up patch we will restrict holding the reference on the AUX power domain to the AUX transfer function. To avoid the unnecessary on-off-on power togglings drop the reference asynchronously. There is no reason we couldn't do this in general and also put the reference asynchronously in pps

[Intel-gfx] [PATCH 09/10] drm/i915: Avoid taking the PPS lock for non-eDP/VLV/CHV

On ICL we have to make sure that we enable the AUX power domain in a controlled way (corresponding to the port's actual TypeC mode). Since the PPS lock - which takes an AUX power ref - is only needed on eDP/VLV/CHV avoid taking it in other cases. Cc: Ville Syrjala Signed-off-by: Imre Deak --- d

[Intel-gfx] [PATCH 00/10] drm/i915: Add support for asynchronous display power disabling

This is a preparation for making hotplug useable on ICL TypeC ports. On ICL we need a stricter control on when either kind of AUX power domain (TBT-alt or DP-alt) is enabled. That control becomes unfeasible if the reference can be held for arbitratry periods due to locking dependencies. OTOH it mak

[Intel-gfx] [PATCH] drm/i915/perf: Refactor oa object to better manage resources

The oa object manages the oa buffer and must be allocated when the user intends to read performance counter snapshots. This can be achieved by making the oa object part of the stream object which is allocated when a stream is opened by the user. Attributes in the oa object that are gen-specific ar

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with RFC: hung_task: taint kernel (rev2)

== Series Details == Series: series starting with RFC: hung_task: taint kernel (rev2) URL : https://patchwork.freedesktop.org/series/60228/ State : warning == Summary == $ dim checkpatch origin/drm-tip fb98bc124cb7 RFC: hung_task: taint kernel -:37: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-o

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Fix runtime suspend

== Series Details == Series: drm/i915/guc: Fix runtime suspend URL : https://patchwork.freedesktop.org/series/60236/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6031 -> Patchwork_12952 Summary --- **FAILURE** Se

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: add single combo phy init/unit functions (rev3)

== Series Details == Series: drm/i915: add single combo phy init/unit functions (rev3) URL : https://patchwork.freedesktop.org/series/60112/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029_full -> Patchwork_12945_full Su

Re: [Intel-gfx] [RFC PATCH 0/5] cgroup support for GPU devices

> Count us (Mellanox) too, our RDMA devices are exposing special and > limited in size device memory to the users and we would like to provide > an option to use cgroup to control its exposure. Doesn't RDMA already has a separate cgroup? Why not implement it there? > > and with future work, we c

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Move the PIPEMISC write the correct place

== Series Details == Series: series starting with [1/2] drm/i915: Move the PIPEMISC write the correct place URL : https://patchwork.freedesktop.org/series/60233/ State : success == Summary == CI Bug Log - changes from CI_DRM_6031 -> Patchwork_12951

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Unshadow MI_USER_INTERRUPT (rev2)

== Series Details == Series: drm/i915/execlists: Unshadow MI_USER_INTERRUPT (rev2) URL : https://patchwork.freedesktop.org/series/60192/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029_full -> Patchwork_12942_full Summar

[Intel-gfx] [PATCH] RFC: hung_task: taint kernel

There's the hung_task_panic sysctl, but that's a bit an extreme measure. As a fallback taint at least the machine. Our CI uses this to decide when a reboot is necessary, plus to figure out whether the kernel is still happy. v2: Works much better when I put the else { add_taint() } at the right pl

[Intel-gfx] [PATCH] drm/i915/guc: Fix runtime suspend

We are not allowed to rpm_get() inside the runtime-suspend callback, so split the intel_uc_suspend() into the core that assumes the caller holds the wakeref (intel_uc_runtime_suspend), and one acquires the wakeref as necessary (intel_uc_suspend). Reported-by: Daniele Ceraolo Spurio Fixes: 79ffac8

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] RFC: hung_task: taint kernel

== Series Details == Series: series starting with [1/2] RFC: hung_task: taint kernel URL : https://patchwork.freedesktop.org/series/60228/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12950 Summary --

[Intel-gfx] ✓ Fi.CI.IGT: success for RFC: console: hack up console_trylock more

== Series Details == Series: RFC: console: hack up console_trylock more URL : https://patchwork.freedesktop.org/series/60212/ State : success == Summary == CI Bug Log - changes from CI_DRM_6028_full -> Patchwork_12941_full Summary ---

[Intel-gfx] [PATCH 2/2] drm/i915: Allow ICL pipe "HDR mode" when the cursor is visible

From: Ville Syrjälä Turns out the cursor is compatible with the pipe "HDR mode". It's only the actual SDR planes that get entirely bypassed during blending. So let's ignore the cursor when checking if we have any planes active that aren't HDR compatible. This fixes the regressions in the kms_curs

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Tune down WARN about incorrect VBT TC legacy flag

On Thu, May 02, 2019 at 04:57:24PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915: Tune down WARN about incorrect VBT TC legacy flag > URL : https://patchwork.freedesktop.org/series/60197/ > State : success Thanks for the review, pushed to -dinq with the code comment update

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] RFC: hung_task: taint kernel

== Series Details == Series: series starting with [1/2] RFC: hung_task: taint kernel URL : https://patchwork.freedesktop.org/series/60228/ State : warning == Summary == $ dim checkpatch origin/drm-tip 71eca6313419 RFC: hung_task: taint kernel -:34: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-of

[Intel-gfx] [PATCH 1/2] drm/i915: Move the PIPEMISC write the correct place

From: Ville Syrjälä I fumbled the PIPEMISC write into the wrong place. It only gets called for fastsets, but since value needs to be updated based on the set of active planes it needs to be done for all plane updates. Move it to the correct spot. The symptoms include SDR planes never showing up

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/4] drm/i915: Fix the pipe state timing mismatch warnings

== Series Details == Series: series starting with [v5,1/4] drm/i915: Fix the pipe state timing mismatch warnings URL : https://patchwork.freedesktop.org/series/60218/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12949 ===

[Intel-gfx] [PATCH v3 04/10] drm: Convert connector_helper_funcs->atomic_check to accept drm_atomic_state

From: Sean Paul Everyone who implements connector_helper_funcs->atomic_check reaches into the connector state to get the atomic state. Instead of continuing this pattern, change the callback signature to just give atomic state and let the driver determine what it does and does not need from it.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers (rev2)

== Series Details == Series: drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers (rev2) URL : https://patchwork.freedesktop.org/series/60195/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12948

[Intel-gfx] [PATCH 2/2] RFC: soft/hardlookup: taint kernel

There's the soft/hardlookup_panic sysctls, but that's a bit an extreme measure. As a fallback taint at least the machine. Our CI uses this to decide when a reboot is necessary, plus to figure out whether the kernel is still happy. Signed-off-by: Daniel Vetter Cc: Thomas Gleixner Cc: Ingo Molnar

[Intel-gfx] [PATCH 1/2] RFC: hung_task: taint kernel

There's the hung_task_panic sysctl, but that's a bit an extreme measure. As a fallback taint at least the machine. Our CI uses this to decide when a reboot is necessary, plus to figure out whether the kernel is still happy. Signed-off-by: Daniel Vetter Cc: Andrew Morton Cc: Tetsuo Handa Cc: Dm

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/4] drm/i915: Fix the pipe state timing mismatch warnings

== Series Details == Series: series starting with [v5,1/4] drm/i915: Fix the pipe state timing mismatch warnings URL : https://patchwork.freedesktop.org/series/60218/ State : warning == Summary == $ dim checkpatch origin/drm-tip 91207cbf0ccb drm/i915: Fix the pipe state timing mismatch warnin

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: the great header refactoring, part three

== Series Details == Series: drm/i915: the great header refactoring, part three URL : https://patchwork.freedesktop.org/series/60215/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12947 Summary ---

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: the great header refactoring, part three

== Series Details == Series: drm/i915: the great header refactoring, part three URL : https://patchwork.freedesktop.org/series/60215/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/dvo: move DVO chip types to intel_dvo.c Okay! Commit: drm/i91

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: the great header refactoring, part three

== Series Details == Series: drm/i915: the great header refactoring, part three URL : https://patchwork.freedesktop.org/series/60215/ State : warning == Summary == $ dim checkpatch origin/drm-tip ac0fcd25f9fa drm/i915/dvo: move DVO chip types to intel_dvo.c ecb082b73857 drm/i915/dsi: move oper

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/execlists: Flush the tasklet on parking

== Series Details == Series: series starting with [1/2] drm/i915/execlists: Flush the tasklet on parking URL : https://patchwork.freedesktop.org/series/60216/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12946 ===

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: add single combo phy init/unit functions (rev3)

== Series Details == Series: drm/i915: add single combo phy init/unit functions (rev3) URL : https://patchwork.freedesktop.org/series/60112/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12945 Summary

[Intel-gfx] ✓ Fi.CI.IGT: success for HDCP2.2 Phase II (rev8)

== Series Details == Series: HDCP2.2 Phase II (rev8) URL : https://patchwork.freedesktop.org/series/57232/ State : success == Summary == CI Bug Log - changes from CI_DRM_6026_full -> Patchwork_12939_full Summary --- **SUCCESS** No

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dp: use logical operators with boolean type (rev2)

== Series Details == Series: drm/i915/dp: use logical operators with boolean type (rev2) URL : https://patchwork.freedesktop.org/series/60190/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12944 Summary --

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Unshadow MI_USER_INTERRUPT (rev2)

== Series Details == Series: drm/i915/execlists: Unshadow MI_USER_INTERRUPT (rev2) URL : https://patchwork.freedesktop.org/series/60192/ State : success == Summary == CI Bug Log - changes from CI_DRM_6029 -> Patchwork_12942 Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Tune down WARN about incorrect VBT TC legacy flag

== Series Details == Series: drm/i915: Tune down WARN about incorrect VBT TC legacy flag URL : https://patchwork.freedesktop.org/series/60197/ State : success == Summary == CI Bug Log - changes from CI_DRM_6026_full -> Patchwork_12938_full

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/14] drm/i915/hangcheck: Track context changes (rev5)

== Series Details == Series: series starting with [01/14] drm/i915/hangcheck: Track context changes (rev5) URL : https://patchwork.freedesktop.org/series/60153/ State : failure == Summary == Applying: drm/i915/hangcheck: Track context changes Applying: drm/i915: Include fence signaled bit in

Re: [Intel-gfx] [PATCH v2] drm/i915/execlists: Ensure arbitration is disabled for the breadcrumb

Quoting Chris Wilson (2019-05-02 15:17:01) > If we interrupt building of the request, we may emit a request with no > payload at all, with the consequence that we never disable arbitration > prior to the breadcrumb. If we get preempted during the breadcrumb, it > appears possible to lose the associ

[Intel-gfx] ✓ Fi.CI.BAT: success for RFC: console: hack up console_trylock more

== Series Details == Series: RFC: console: hack up console_trylock more URL : https://patchwork.freedesktop.org/series/60212/ State : success == Summary == CI Bug Log - changes from CI_DRM_6028 -> Patchwork_12941 Summary --- **SUCCES

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915/icl: Factor out combo PHY lane power setup helper

On Thu, May 02, 2019 at 05:45:45PM +0300, Jani Nikula wrote: > On Thu, 02 May 2019, Imre Deak wrote: > > On Fri, Apr 26, 2019 at 08:39:12AM +, Patchwork wrote: > >> == Series Details == > >> > >> Series: series starting with [v2,1/2] drm/i915/icl: Factor out combo PHY > >> lane power setup h

[Intel-gfx] [v5 1/4] drm/i915: Fix the pipe state timing mismatch warnings

Adjust the get transcoder timings for mipi dsi as per the set timing calculations. v2: Use the existing intel_get_pipe_timings and do the dsi specific adjustments in the encoder get_config hook.(Ville, Jani) v3: Exclude VBLANK and HBLANK registers for dsi transcoder. v4: Fix the incomplete c

[Intel-gfx] [v5 2/4] drm/i915: Refactor bdw_get_pipemisc_bpp

Move bdw_get_pipemisc_bpp alongside bdw_set_pipemisc Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/intel_display.c | 22 ++ drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/vlv_dsi.c | 22 -- 3 files changed, 23 insertions

[Intel-gfx] [v5 3/4] drm/i915: Fix pipe config mismatch for bpp, output format

Read back the pixel fomrat register and get the bpp. v2: Read the PIPE_MISC register (Jani). Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/icl_dsi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index 45fe69c..c

[Intel-gfx] [v5 4/4] drm/i915: Fix pixel clock and crtc clock config mismatch

In case of dual link mode, the mode clock that we get from the VBT is halved. v2: Simplify the calculation (Jani). Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/icl_dsi.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl

Re: [Intel-gfx] [PATCH] drm/i915/dp: use logical operators with boolean type

Em qui, 2019-05-02 às 11:29 +0300, Jani Nikula escreveu: > Using arithmetic operators with booleans is confusing. Switch to logical > operators. > > Cc: Paulo Zanoni > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_dp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > >

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for RFC: console: hack up console_trylock more

== Series Details == Series: RFC: console: hack up console_trylock more URL : https://patchwork.freedesktop.org/series/60212/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5a15dd2f624b RFC: console: hack up console_trylock more -:73: CHECK:AVOID_EXTERNS: extern prototypes shoul

[Intel-gfx] [PATCH v2] drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers

Framebuffer formats P01x are supported by GLK, but the function which handles CSC on plane color control register, still expectes the input buffer to be REC709. This can cause inaccurate output for direct P01x flips. This patch checks if the color_encoding property is set to YCBCR_2020, and enable

Re: [Intel-gfx] [PATCH 00/13] drm/i915: the great header refactoring, part three

Quoting Jani Nikula (2019-05-02 16:02:34) > Continue the header refactoring started in [1] and [2]. > > BR, > Jani. > > [1] https://patchwork.freedesktop.org/series/59022/ > [2] https://patchwork.freedesktop.org/series/60060/ > > Jani Nikula (13): > drm/i915/dvo: move DVO chip types to intel_d

Re: [Intel-gfx] [PATCH 12/13] drm/i915: move more generic utils to i915_utils.h

Quoting Jani Nikula (2019-05-02 16:02:46) > Reduce clutter from i915_drv.h and intel_drv.h. > > Signed-off-by: Jani Nikula Makes sense. Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedeskt

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v4,1/4] drm/i915: Fix the pipe state timing mismatch warnings

== Series Details == Series: series starting with [v4,1/4] drm/i915: Fix the pipe state timing mismatch warnings URL : https://patchwork.freedesktop.org/series/60210/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool

[Intel-gfx] [PATCH 13/13] drm/i915: extract intel_gmbus.h from i915_drv.h and rename intel_i2c.c

It used to be handy that we only had a couple of headers, but over time i915_drv.h has become unwieldy. Extract declarations to a separate header file corresponding to the implementation module, clarifying the modularity of the driver. Ensure the new header is self-contained, and do so with minima

[Intel-gfx] [PATCH 11/13] drm/i915: make i915_utils.h self-contained

And ensure it stays that way. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile.header-test | 1 + drivers/gpu/drm/i915/i915_utils.h | 6 -- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/Makefile.header-test b/drivers/gpu/drm/i915/Mak

[Intel-gfx] [PATCH 10/13] drm/i915: move i915_vgacntrl_reg() where needed

Reduce clutter from i915_drv.h. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_drv.h | 10 -- drivers/gpu/drm/i915/intel_display.c | 10 ++ 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_

[Intel-gfx] [PATCH 12/13] drm/i915: move more generic utils to i915_utils.h

Reduce clutter from i915_drv.h and intel_drv.h. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_drv.h | 44 - drivers/gpu/drm/i915/i915_utils.h | 153 ++ drivers/gpu/drm/i915/intel_drv.h | 108 - 3 files changed, 153 insertions

[Intel-gfx] [PATCH 09/13] drm/i915: extract i915_debugfs.h from i915_drv.h

It used to be handy that we only had a couple of headers, but over time i915_drv.h has become unwieldy. Extract declarations to a separate header file corresponding to the implementation module, clarifying the modularity of the driver. Ensure the new header is self-contained, and do so with minima

[Intel-gfx] [PATCH 07/13] drm/i915: extract intel_lpe_audio.h from i915_drv.h

It used to be handy that we only had a couple of headers, but over time i915_drv.h has become unwieldy. Extract declarations to a separate header file corresponding to the implementation module, clarifying the modularity of the driver. Ensure the new header is self-contained, and do so with minima

[Intel-gfx] [PATCH 08/13] drm/i915: extract intel_acpi.h from i915_drv.h

It used to be handy that we only had a couple of headers, but over time i915_drv.h has become unwieldy. Extract declarations to a separate header file corresponding to the implementation module, clarifying the modularity of the driver. Ensure the new header is self-contained, and do so with minima

[Intel-gfx] [PATCH 04/13] drm/i915: remove unused/stale macros and comments from intel_drv.h

Reduce clutter from intel_drv.h. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_drv.h | 9 - 1 file changed, 9 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 709647..addf6f 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++

[Intel-gfx] [PATCH 06/13] drm/i915: extract intel_dpio_phy.h from i915_drv.h

It used to be handy that we only had a couple of headers, but over time i915_drv.h has become unwieldy. Extract declarations to a separate header file corresponding to the implementation module, clarifying the modularity of the driver. Ensure the new header is self-contained, and do so with minima

[Intel-gfx] [PATCH 2/2] drm/i915: Leave engine parking to the engines

Drop the check in GEM parking that the engines were already parked. The intention here was that before we dropped the GT wakeref, we were sure that no more interrupts could be raised -- however, we have already dropped the wakeref by this point and the warning is no longer valid. Signed-off-by: Ch

[Intel-gfx] [PATCH 1/2] drm/i915/execlists: Flush the tasklet on parking

Tidy up the cleanup sequence by always ensure that the tasklet is flushed on parking (before we cleanup). The parking provides a convenient point to ensure that the backend is truly idle. v2: Do the full check for idleness before parking, to be sure we flush any residual interrupt. Signed-off-by:

[Intel-gfx] [PATCH 05/13] drm/i915/csr: move CSR version macros to intel_csr.h

Reduce clutter from i915_drv.h. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_debugfs.c | 1 + drivers/gpu/drm/i915/i915_drv.h | 4 drivers/gpu/drm/i915/i915_gpu_error.c | 1 + drivers/gpu/drm/i915/intel_csr.h | 4 4 files changed, 6 insertions(+), 4 deletions(-

[Intel-gfx] [PATCH 03/13] drm/i915: move ranges to intel_display.c

Reduce clutter from intel_drv.h with the minimal change. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_display.c | 15 +++ drivers/gpu/drm/i915/intel_drv.h | 15 --- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/inte

[Intel-gfx] [PATCH 01/13] drm/i915/dvo: move DVO chip types to intel_dvo.c

Reduce clutter from intel_drv.h with the minimal change. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_drv.h | 5 - drivers/gpu/drm/i915/intel_dvo.c | 5 + 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/i

[Intel-gfx] [PATCH 00/13] drm/i915: the great header refactoring, part three

Continue the header refactoring started in [1] and [2]. BR, Jani. [1] https://patchwork.freedesktop.org/series/59022/ [2] https://patchwork.freedesktop.org/series/60060/ Jani Nikula (13): drm/i915/dvo: move DVO chip types to intel_dvo.c drm/i915/dsi: move operation mode types to intel_dsi.h

[Intel-gfx] [PATCH 02/13] drm/i915/dsi: move operation mode types to intel_dsi.h

Reduce clutter from intel_drv.h with the minimal change. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_drv.h | 3 --- drivers/gpu/drm/i915/intel_dsi.h | 3 +++ 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel

Re: [Intel-gfx] [PATCH 5/6] drm/i915: Remove inline from sseu helper functions

On Thu, 2019-05-02 at 17:58 +0300, Jani Nikula wrote: > On Thu, 02 May 2019, "Summers, Stuart" > wrote: > > On Thu, 2019-05-02 at 10:15 +0300, Jani Nikula wrote: > > > Acked-by: Jani Nikula > > > > Jani, based on Daniele's feedback, I'm planning on squashing this > > patch > > with the patch tha

Re: [Intel-gfx] [PATCH 5/6] drm/i915: Remove inline from sseu helper functions

On Thu, 02 May 2019, "Summers, Stuart" wrote: > On Thu, 2019-05-02 at 10:15 +0300, Jani Nikula wrote: >> Acked-by: Jani Nikula > > Jani, based on Daniele's feedback, I'm planning on squashing this patch > with the patch that moves these helper functions to intel_sseu.h. Any > issue keeping your A

Re: [Intel-gfx] [PATCH 5/6] drm/i915: Remove inline from sseu helper functions

On Thu, 2019-05-02 at 10:15 +0300, Jani Nikula wrote: > On Wed, 01 May 2019, "Summers, Stuart" > wrote: > > On Wed, 2019-05-01 at 14:19 -0700, Daniele Ceraolo Spurio wrote: > > > > > > On 5/1/19 2:04 PM, Summers, Stuart wrote: > > > > On Wed, 2019-05-01 at 13:04 -0700, Daniele Ceraolo Spurio > >

[Intel-gfx] [PATCH v3] drm/i915: add single combo phy init/unit functions

Work on the principle that files should prefer not to expose platform specific functions. v2, v3: Rebase Cc: Imre Deak Reviewed-by: Chris Wilson Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_combo_phy.c | 24 drivers/gpu/drm/i915/intel_combo_phy.h | 6 +

Re: [Intel-gfx] [PATCH 6/6] drm/i915: Expand subslice mask

On Wed, 2019-05-01 at 15:04 -0700, Daniele Ceraolo Spurio wrote: > > On 5/1/19 8:34 AM, Stuart Summers wrote: > > Currently, the subslice_mask runtime parameter is stored as an > > array of subslices per slice. Expand the subslice mask array to > > better match what is presented to userspace throu

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915/icl: Factor out combo PHY lane power setup helper

On Thu, 02 May 2019, Imre Deak wrote: > On Fri, Apr 26, 2019 at 08:39:12AM +, Patchwork wrote: >> == Series Details == >> >> Series: series starting with [v2,1/2] drm/i915/icl: Factor out combo PHY >> lane power setup helper >> URL : https://patchwork.freedesktop.org/series/59954/ >> State

Re: [Intel-gfx] [PATCH 03/14] drm/i915/execlists: Flush the tasklet on parking

Quoting Tvrtko Ursulin (2019-05-02 15:24:16) > > On 02/05/2019 15:21, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2019-05-02 15:14:08) > >> > >> On 02/05/2019 14:53, Chris Wilson wrote: > >>> Quoting Tvrtko Ursulin (2019-05-02 14:48:18) > > On 01/05/2019 12:45, Chris Wilson wrote: >

Re: [Intel-gfx] [PATCH] drm/i915/GLK: Properly handle plane CSC for BT2020 framebuffers

tor 2019-05-02 klockan 14:51 +0300 skrev Ville Syrjälä: > On Thu, May 02, 2019 at 10:40:39AM +, Sharma, Shashank wrote: > > > > > > > -Original Message- > > > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > > > Sent: Thursday, May 2, 2019 3:45 PM > > > To: Sharma, Shashan

[Intel-gfx] [PATCH v2] drm/i915: Cancel retire_worker on parking

Replace the racy continuation check within retire_work with a definite kill-switch on idling. The race was being exposed by gem_concurrent_blit where the retire_worker would be terminated too early leaving us spinning in debugfs/i915_drop_caches with nothing flushing the retirement queue. Although

Re: [Intel-gfx] [PATCH 06/14] drm/i915: Cancel retire_worker on parking

Quoting Tvrtko Ursulin (2019-05-02 15:20:52) > > On 02/05/2019 14:33, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2019-05-02 14:29:50) > >> > >> On 01/05/2019 12:45, Chris Wilson wrote: > >>> Replace the racy continuation check within retire_work with a definite > >>> kill-switch on idling. Th

Re: [Intel-gfx] [PATCH 03/14] drm/i915/execlists: Flush the tasklet on parking

On 02/05/2019 15:21, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-05-02 15:14:08) On 02/05/2019 14:53, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-05-02 14:48:18) On 01/05/2019 12:45, Chris Wilson wrote: Tidy up the cleanup sequence by always ensure that the tasklet is flushed on

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