== Series Details ==
Series: Support mipi dsi video mode on TGL
URL : https://patchwork.freedesktop.org/series/63058/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394 -> Patchwork_13486
Summary
---
**SUCCESS**
N
This series doesn't include the patch to add dsi init in
setup_outputs. Waiting for the platform enablemnet patches to be
merged.
Vandita Kulkarni (4):
drm/i915/tgl/dsi: Program TRANS_VBLANK register
drm/i915/tgl/dsi: Set latency PCS_DW1 for tgl
drm/i915/tgl/dsi: Do not override TA_SURE
dr
Do not override TA_SURE timing parameter to
zero for DSI 8X frequency 800MHz or below on
TGL.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c | 26 ++
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i
Rest of the latency programming remains same as
that of ICL.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index 5
Program vblank register for mipi dsi in video mode
on TGL.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index b8673debf932..
No need to keep it on till IO enabling.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index d1c50a4186f0..
Hi Rodrigo, Joonas and Jani,
I'm meeting some drm issues when using Fedora 30. I'm using a Lenovo box, and I
met some error message in
dmesg, (not panic). Could you take a look at the warning, and do we have
already fixes for this? Thanks!
[43401.062181] [drm:intel_cpu_fifo_underrun_irq_h
On Mon, Jun 24, 2019 at 6:24 AM Ville Syrjälä
wrote:
>
> On Fri, Jun 21, 2019 at 08:41:04PM -0700, Derek Basehore wrote:
> > Not every platform needs quirk detection for panel orientation, so
> > split the drm_connector_init_panel_orientation_property into two
> > functions. One for platforms with
On Mon, 2019-07-01 at 22:26 +, Souza, Jose wrote:
> On Fri, 2019-06-28 at 19:25 -0700, Dhinakaran Pandiyan wrote:
> > On Mon, 2019-06-24 at 14:11 -0700, Souza, Jose wrote:
> > > > > > +#define _HSW_EDP_PSR_BASE0x64800
> > > > > > +#define _SRD_CTL_A
Hi!
It's the final week to submit your talks, workshops or demos for
#XDC2019!!
CfP ends this coming Sunday, July 7!
Have some new developments to share? Facing some challenges with you
projects? If it's related to open source graphics, please send it in!
http://xdc2019.x.org
Best,
Mark
On Tue, Jun 11, 2019 at 03:00:10PM -0600, Andreas Dilger wrote:
> On Jun 11, 2019, at 2:48 PM, Andrew Morton wrote:
> >
> > On Wed, 12 Jun 2019 01:08:36 +0530 Shyam Saini
> > wrote:
> I did a check, and FIELD_SIZEOF() is used about 350x, while sizeof_field()
> is about 30x, and SIZEOF_FIELD()
On Fri, 2019-06-28 at 19:25 -0700, Dhinakaran Pandiyan wrote:
> On Mon, 2019-06-24 at 14:11 -0700, Souza, Jose wrote:
> > > > > +#define _HSW_EDP_PSR_BASE0x64800
> > > > > +#define _SRD_CTL_A 0x60800
> > > > > +#define _SRD_CTL_EDP
== Series Details ==
Series: drm/i915/guc: Remove preemption support for current fw (rev2)
URL : https://patchwork.freedesktop.org/series/56767/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394 -> Patchwork_13485
Summary
== Series Details ==
Series: drm/i915/guc: Remove preemption support for current fw (rev2)
URL : https://patchwork.freedesktop.org/series/56767/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/guc: Remove preemption support for current fw
-./dr
== Series Details ==
Series: drm/i915/gem: Free pages before rcu-freeing the object (rev2)
URL : https://patchwork.freedesktop.org/series/63042/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394 -> Patchwork_13484
Summary
From: Chris Wilson
Preemption via GuC submission is not being supported with its current
legacy incarnation. The current FW does support a similar pre-emption
flow via H2G, but it is class-based instead of being instance-based,
which doesn't fit well with the i915 tracking. To fix this, the
firmw
Sorry for the late response! I like the idea here and I've brought up edid
comparison a couple times. Hopefully this isn't overkill, but I had a little
more in mind then just a helper like this (and I've had this on my mind for a
while!
When it comes to suspend/resume reprobing, I think there's mo
As we have dropped the final reference to the object, we do not need to
wait until after the rcu grace period to drop its pages. We still require
struct_mutex to completely unbind the object to release the pages, so we
still need a free-worker to manage that from process context. By
scheduling the
On 7/1/19 3:04 AM, Chris Wilson wrote:
Daniele pointed out that the CSB status information will change with
Tigerlake and suggested that we could rearrange our state machine to
hide the differences in generation. gcc also prefers the explicit state
machine, so make it so:
process_csb
== Series Details ==
Series: drm/i915: Use the "display core" power domain in vlv/chv set_cdclk()
URL : https://patchwork.freedesktop.org/series/63045/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394 -> Patchwork_13483
S
On 7/1/19 3:04 AM, Chris Wilson wrote:
During reset, we must be very selective in which locks we take as most
are tainted by being held across a wait or reclaim (kmalloc) which
implicitly waits. Inside the guc reset path, we reset the ADS to sane
defaults, but must keep it pinned from initialis
On Tue, Jun 25, 2019 at 10:54:20AM -0700, Lucas De Marchi wrote:
> From: Mika Kahola
>
> Add power well 5 to support 4th pipe and transcoder on TGL.
>
> Cc: James Ausmus
> Cc: Imre Deak
> Signed-off-by: Mika Kahola
> Signed-off-by: Lucas De Marchi
> ---
> .../drm/i915/display/intel_display_
== Series Details ==
Series: series starting with [1/6] drm/i915: Check
crtc_state->wm.need_postvbl_update before grabbing wm.mutex
URL : https://patchwork.freedesktop.org/series/63044/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394 -> Patchwork_13482
On Mon, Jul 01, 2019 at 08:32:59PM +0300, Ville Syrjälä wrote:
> On Fri, Jun 28, 2019 at 09:31:04AM -0700, Lucas De Marchi wrote:
> > On Fri, Jun 28, 2019 at 12:55:17PM +0300, Ville Syrjälä wrote:
> > >On Tue, Jun 25, 2019 at 10:54:21AM -0700, Lucas De Marchi wrote:
> > >> From: José Roberto de Sou
On Fri, Jun 28, 2019 at 09:31:04AM -0700, Lucas De Marchi wrote:
> On Fri, Jun 28, 2019 at 12:55:17PM +0300, Ville Syrjälä wrote:
> >On Tue, Jun 25, 2019 at 10:54:21AM -0700, Lucas De Marchi wrote:
> >> From: José Roberto de Souza
> >>
> >> On TGL the special EDP transcoder is gone and it should b
== Series Details ==
Series: drm/i915/gem: Free pages before rcu-freeing the object
URL : https://patchwork.freedesktop.org/series/63042/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6393 -> Patchwork_13481
Summary
---
From: Ville Syrjälä
The PFI credit programming performed during cdclk change on vlv/chv
requires access to a register in the disp2d power well. So far
we've abused pipe-A power domain for this, but now we have the
more appropriate "display core" domain so let's make use of it.
Signed-off-by: Vil
From: Ville Syrjälä
Use swap() instead of hand rolling it in intel_shared_dpll_swap_state(),
and pass in the intel_atomic_state instead of drm_atomic_state. Makes
the code less convoluted.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i
From: Ville Syrjälä
Streamline the code a bit by using intel_ types instead of the
drm_ types.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 38 +++-
1 file changed, 21 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i
From: Ville Syrjälä
wm.mutex does not protect the crtc state so no point in grabbing it
to check crtc_state->wm.need_postvbl_update.
Also do a bit of s/intel_crtc/crtc/ while at it.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_pm.c | 23 ---
1 file changed,
From: Ville Syrjälä
Streamline the code a bit by using intel_ types instead of drm_
types in intel_atomic_track_fbs().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu
From: Ville Syrjälä
Pass just the crtc state to modeset_get_crtc_power_domains(). We
can get the crtc from therein.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 21 ++--
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/g
From: Ville Syrjälä
Make life less annoying by favoring the intel_ types over
the drm_ types in intel_atomic_commit().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 76 ++--
1 file changed, 37 insertions(+), 39 deletions(-)
diff --git a/driver
On Wed, Jun 26, 2019 at 11:05:08AM +, Patchwork wrote:
> == Series Details ==
>
> Series: EHL port programming (rev3)
> URL : https://patchwork.freedesktop.org/series/62492/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_6351_full -> Patchwork_13432_full
> ===
Quoting Lionel Landwerlin (2019-07-01 12:34:32)
> We're planning to use this for a couple of new feature where we need
> to provide additional parameters to execbuf.
>
> Signed-off-by: Lionel Landwerlin
Looks ok, are you convinced by I915_EXEC_EXT? It doesn't roll off the
tongue too well for me,
As we have dropped the final reference to the object, we do not need to
wait until after the rcu grace period to drop its pages. We still require
struct_mutex to completely unbind the object to release the pages, so we
still need a free-worker to manage that from process context. By
scheduling the
Quoting Lionel Landwerlin (2019-07-01 12:34:29)
> struct i915_oa_config {
> + struct drm_i915_private *i915;
> +
> char uuid[UUID_STRING_LEN + 1];
> int id;
>
> @@ -1110,6 +1112,10 @@ struct i915_oa_config {
> struct attribute *attrs[2];
> struct device_attr
On Mon, Jul 01, 2019 at 04:20:45PM +0200, Hans de Goede wrote:
> Hi,
>
> On 01-07-19 15:32, Ville Syrjälä wrote:
> > On Sun, Jun 30, 2019 at 04:23:47PM +0200, Przemysław Hołubowski wrote:
> >> Hello,
> >>
> >> immediately after I have upgraded my system from Fedora 28 x64 to 29
> >> graphics' issu
On Fri, Jun 28, 2019 at 04:52:31PM -0700, Souza, Jose wrote:
> On Tue, 2019-06-25 at 17:03 -0700, Matt Roper wrote:
> > Although EHL added a third combo PHY, no PHY_MISC register was added
> > for
> > PHY C. The bspec indicates that there's no need to program the "DE
> > to
> > IO Comp Pwr Down" s
Quoting Lionel Landwerlin (2019-07-01 13:10:53)
> On 01/07/2019 15:03, Chris Wilson wrote:
> > Quoting Lionel Landwerlin (2019-07-01 12:34:35)
> >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> >> b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> >> index f92bace9caff..012d6d7f54e
Hi,
On 01-07-19 15:32, Ville Syrjälä wrote:
On Sun, Jun 30, 2019 at 04:23:47PM +0200, Przemysław Hołubowski wrote:
Hello,
immediately after I have upgraded my system from Fedora 28 x64 to 29
graphics' issue started. Mouse leaves a trail composed of multiple
blinking cursors and sometimes recta
Quoting Mika Kuoppala (2019-07-01 12:49:48)
> Chris Wilson writes:
>
> > Daniele pointed out that the CSB status information will change with
> > Tigerlake and suggested that we could rearrange our state machine to
> > hide the differences in generation. gcc also prefers the explicit state
> > ma
Quoting Michal Wajdeczko (2019-07-01 13:36:28)
> On Mon, 01 Jul 2019 12:04:51 +0200, Chris Wilson
> wrote:
>
> > During reset, we must be very selective in which locks we take as most
> > are tainted by being held across a wait or reclaim (kmalloc) which
> > implicitly waits. Inside the guc res
On 01/07/2019 16:06, Chris Wilson wrote:
Quoting Lionel Landwerlin (2019-07-01 12:34:29)
@@ -2535,9 +2635,21 @@ static int i915_perf_release(struct inode *inode, struct
file *file)
{
struct i915_perf_stream *stream = file->private_data;
struct drm_i915_private *dev_priv = st
On 01/07/2019 16:32, Chris Wilson wrote:
Quoting Lionel Landwerlin (2019-07-01 12:34:36)
@@ -1860,23 +1893,55 @@ static int alloc_noa_wait(struct drm_i915_private *i915)
return ret;
}
-static void config_oa_regs(struct drm_i915_private *dev_priv,
- const s
== Series Details ==
Series: drm/i915: Vulkan performance query support (rev6)
URL : https://patchwork.freedesktop.org/series/60916/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6390 -> Patchwork_13480
Summary
---
*
On Sat, Jun 29, 2019 at 07:03:11AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Fix TypeC port mode switching (rev8)
> URL : https://patchwork.freedesktop.org/series/61590/
> State : success
Thanks for the reviews, pushed to -dinq, resolving minor conflicts
in intel_mode
== Series Details ==
Series: Extend BT2020 support in iCSC and fixes (rev5)
URL : https://patchwork.freedesktop.org/series/60480/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6379 -> Patchwork_13466
Summary
---
**SU
On 28/06/2019 18:06, Shankar, Uma wrote:
>
>
>> -Original Message-
>> From: Patchwork [mailto:patchw...@emeril.freedesktop.org]
>> Sent: Friday, June 28, 2019 8:34 PM
>> To: Shankar, Uma
>> Cc: intel-gfx@lists.freedesktop.org
>> Subject: ✗ Fi.CI.BAT: failure for Extend BT2020 support in
Quoting Lionel Landwerlin (2019-07-01 12:34:36)
> @@ -1860,23 +1893,55 @@ static int alloc_noa_wait(struct drm_i915_private
> *i915)
> return ret;
> }
>
> -static void config_oa_regs(struct drm_i915_private *dev_priv,
> - const struct i915_oa_reg *regs,
> -
On Sun, Jun 30, 2019 at 04:23:47PM +0200, Przemysław Hołubowski wrote:
> Hello,
>
> immediately after I have upgraded my system from Fedora 28 x64 to 29
> graphics' issue started. Mouse leaves a trail composed of multiple
> blinking cursors and sometimes rectangular not-refreshed parts. The more
On 01/07/2019 16:18, Chris Wilson wrote:
Quoting Lionel Landwerlin (2019-07-01 12:34:33)
+ /*
+* For timeline syncobjs we need to preallocate chains for
+* later signaling.
+*/
+ if (point != 0 && user_fence.flags & I915
Quoting Lionel Landwerlin (2019-07-01 12:34:33)
> + /*
> +* For timeline syncobjs we need to preallocate chains for
> +* later signaling.
> +*/
> + if (point != 0 && user_fence.flags & I915_EXEC_FENCE_SIGNAL) {
> +
On 01/07/2019 16:13, Chris Wilson wrote:
Quoting Lionel Landwerlin (2019-07-01 12:34:33)
struct i915_execbuffer {
struct drm_i915_private *i915; /** i915 backpointer */
struct drm_file *file; /** per-file lookup tables and limits */
@@ -275,6 +282,7 @@ struct i915_execbuffer
== Series Details ==
Series: drm/i915: Vulkan performance query support (rev6)
URL : https://patchwork.freedesktop.org/series/60916/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/perf: add missing delay for OA muxes configuration
Okay!
Commi
Quoting Lionel Landwerlin (2019-07-01 12:34:33)
> struct i915_execbuffer {
> struct drm_i915_private *i915; /** i915 backpointer */
> struct drm_file *file; /** per-file lookup tables and limits */
> @@ -275,6 +282,7 @@ struct i915_execbuffer {
>
> struct {
>
On 01/07/2019 15:43, Chris Wilson wrote:
Quoting Lionel Landwerlin (2019-07-01 12:34:31)
NOA configuration take some amount of time to apply. That amount of
time depends on the size of the GT. There is no documented time for
this. For example, past experimentations with powergating
configuration
== Series Details ==
Series: drm/i915: Vulkan performance query support (rev6)
URL : https://patchwork.freedesktop.org/series/60916/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
063d9e6a602f drm/i915/perf: add missing delay for OA muxes configuration
-:7: WARNING:COMMIT_MESSAG
Quoting Lionel Landwerlin (2019-07-01 12:34:29)
> @@ -2535,9 +2635,21 @@ static int i915_perf_release(struct inode *inode,
> struct file *file)
> {
> struct i915_perf_stream *stream = file->private_data;
> struct drm_i915_private *dev_priv = stream->dev_priv;
> + struct i915
Quoting Lionel Landwerlin (2019-07-01 12:34:28)
> Reporting this version will help application figure out what level of
> the support the running kernel provides.
>
> Signed-off-by: Lionel Landwerlin
> ---
> drivers/gpu/drm/i915/i915_drv.c | 3 +++
> include/uapi/drm/i915_drm.h | 21 +++
Quoting Lionel Landwerlin (2019-07-01 12:34:31)
> NOA configuration take some amount of time to apply. That amount of
> time depends on the size of the GT. There is no documented time for
> this. For example, past experimentations with powergating
> configuration changes seem to indicate a 60~70us
On Mon, 01 Jul 2019 12:04:51 +0200, Chris Wilson
wrote:
During reset, we must be very selective in which locks we take as most
are tainted by being held across a wait or reclaim (kmalloc) which
implicitly waits. Inside the guc reset path, we reset the ADS to sane
defaults, but must keep it pi
== Series Details ==
Series: drm/i915: Fix memleak in runtime wakeref tracking
URL : https://patchwork.freedesktop.org/series/63031/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6390 -> Patchwork_13479
Summary
---
*
On Sat, 29 Jun 2019 02:37:09 +0200, Anusha Srivatsa
wrote:
Load GuC for Comet Lake. Depending on the REVID,
we load either the KBL firmware or the CML firmware.
Cc: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_guc_fw.c | 17 +++
On 01/07/2019 15:05, Chris Wilson wrote:
Quoting Lionel Landwerlin (2019-07-01 12:34:34)
+static int eb_oa_config(struct i915_execbuffer *eb)
+{
+ int err;
+
+ if (!eb->oa_config)
+ return 0;
+
+ err = i915_active_request_set(&eb->engine->last_oa_config,
+
On 01/07/2019 15:03, Chris Wilson wrote:
Quoting Lionel Landwerlin (2019-07-01 12:34:35)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index f92bace9caff..012d6d7f54e2 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++
Quoting Lionel Landwerlin (2019-07-01 12:34:30)
> We have a bunch of offsets in the scratch buffer. As we're about to
> add some more, let's group all of the offsets in a common location.
>
> Signed-off-by: Lionel Landwerlin
Reviewed-by: Chris Wilson
-Chris
__
Quoting Lionel Landwerlin (2019-07-01 12:34:34)
> +static int eb_oa_config(struct i915_execbuffer *eb)
> +{
> + int err;
> +
> + if (!eb->oa_config)
> + return 0;
> +
> + err = i915_active_request_set(&eb->engine->last_oa_config,
> +
Quoting Lionel Landwerlin (2019-07-01 12:34:35)
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index f92bace9caff..012d6d7f54e2 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_ge
Chris Wilson writes:
> Daniele pointed out that the CSB status information will change with
> Tigerlake and suggested that we could rearrange our state machine to
> hide the differences in generation. gcc also prefers the explicit state
> machine, so make it so:
>
> process_csb
== Series Details ==
Series: series starting with [01/12] drm/i915/guc: Avoid reclaim locks during
reset
URL : https://patchwork.freedesktop.org/series/63029/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6390 -> Patchwork_13478
===
Reporting this version will help application figure out what level of
the support the running kernel provides.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_drv.c | 3 +++
include/uapi/drm/i915_drm.h | 21 +
2 files changed, 24 insertions(+)
diff --git
Introduces a new parameters to execbuf so that we can specify syncobj
handles as well as timeline points.
v2: Reuse i915_user_extension_fn
v3: Check that the chained extension is only present once (Chris)
v4: Check that dma_fence_chain_find_seqno returns a non NULL fence (Lionel)
Signed-off-by:
We haven't run into issues with programming the global OA/NOA
registers configuration from CPU so far, but HW engineers actually
recommend doing this from the command streamer.
Since we have a command buffer prepared for the execbuffer side of
things, we can reuse that approach here too.
This als
Signed-off-by: Lionel Landwerlin
Fixes: 19f81df2859eb1 ("drm/i915/perf: Add OA unit support for Gen 8+")
---
drivers/gpu/drm/i915/i915_perf.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 357e
Hi all,
Here are a number of fixes and improvement over v5.
Here is a summary :
* Name offsets/fields used in the scratch buffer
* Save/restore used CS_GPR registers for perf delay
* Limiting taking of global lock now that we have configuration
happening on CS
* Pre
We have a bunch of offsets in the scratch buffer. As we're about to
add some more, let's group all of the offsets in a common location.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/gt/intel_gt.h | 6 +++--
drivers/gpu/drm/i915/gt/intel_gt_types.h | 15 +++
drivers
We would like to make use of perf in Vulkan. The Vulkan API is much
lower level than OpenGL, with applications directly exposed to the
concept of command buffers (pretty much equivalent to our batch
buffers). In Vulkan, queries are always limited in scope to a command
buffer. In OpenGL, the lack of
Listing configurations at the moment is supported only through sysfs.
This might cause issues for applications wanting to list
configurations from a container where sysfs isn't available.
This change adds a way to query the number of configurations and their
content through the i915 query uAPI.
v
We want the ability to dispatch a set of command buffer to the
hardware, each with a different OA configuration. To achieve this, we
reuse a couple of fields from the execbuf2 struct (I CAN HAZ
execbuf3?) to notify what OA configuration should be used for a batch
buffer. This requires the process m
Here we introduce a mechanism by which the execbuf part of the i915
driver will be able to request that a batch buffer containing the
programming for a particular OA config be created.
We'll execute these OA configuration buffers right before executing a
set of userspace commands so that a particu
NOA configuration take some amount of time to apply. That amount of
time depends on the size of the GT. There is no documented time for
this. For example, past experimentations with powergating
configuration changes seem to indicate a 60~70us delay. We go with
500us as default for now which should
We're planning to use this for a couple of new feature where we need
to provide additional parameters to execbuf.
Signed-off-by: Lionel Landwerlin
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 32 ++-
include/uapi/drm/i915_drm.h | 25 +--
2 fil
== Series Details ==
Series: series starting with [01/12] drm/i915/guc: Avoid reclaim locks during
reset
URL : https://patchwork.freedesktop.org/series/63029/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/guc: Avoid reclaim locks during rese
== Series Details ==
Series: series starting with [01/12] drm/i915/guc: Avoid reclaim locks during
reset
URL : https://patchwork.freedesktop.org/series/63029/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d4ea6c6d576e drm/i915/guc: Avoid reclaim locks during reset
2bd81633bf02
If we untrack wakerefs, the actual count may reach zero.
However the krealloced owners array is still there and
needs to be taken care of. Free the owners unconditionally
to fix the leak.
Fixes: bd780f37a361 ("drm/i915: Track all held rpm wakerefs")
Reported-by: Juha-Pekka Heikkila
Cc: Juha-Pekka
On 2019-07-01 at 08:52:05 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Commit ad129d2a583689765eaef31ff57e8cdd219f1d05
> ("tests/i915/gem_ctx_switch: Update with engine discovery") broke testing
> of I915_EXEC_DEFAULT. Bring it back.
>
> Signed-off-by: Tvrtko Ursulin
> Reported-by: C
== Series Details ==
Series: series starting with [1/2] drm: report dp downstream port type as a
subconnector property
URL : https://patchwork.freedesktop.org/series/63026/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6389 -> Patchwork_13477
=
Remember to lock the drm_mm as we modify it, lest it be modified in the
background by retire/free workers!
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
Be a little more hesitant before injecting a timeslice, and try to take
into account any change in priority that is due for the running task
before switching to another task. This will allow us to arbitrarily
prevent switching away from a request if we deem it necessarily to
disable preemption, for
Lift moving the timeline to/from the active_list on enter/exit in order
to shorten the active tracking span in comparison to the existing
pin/unpin.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_pm.c| 1 -
drivers/gpu/drm/i915/gt/intel_context.c | 2 +
drivers
During reset, we must be very selective in which locks we take as most
are tainted by being held across a wait or reclaim (kmalloc) which
implicitly waits. Inside the guc reset path, we reset the ADS to sane
defaults, but must keep it pinned from initialisation to avoid having to
pin it during rese
In the next patch, we would like to couple into the engine wakeref to
free the batch pool on idling. The caveat here is that we therefore want
to track the engine wakeref more precisely and to hold it instead of the
broader GT wakeref as we process the ioctl.
Signed-off-by: Chris Wilson
---
.../
In preparation for removing struct_mutex from around context retirement,
we need to make timeline pinning safe. Since multiple engines/contexts
can share a single timeline, it needs to be protected by a mutex.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_timeline.c | 27 +++
Forgo the struct_mutex requirement for request retirement as we have
been transitioning over to only using the timeline->mutex for
controlling the lifetime of a request on that timeline.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 192 ++
drive
Switch to tracking activity via i915_active on individual nodes, only
keeping a list of retired objects in the cache, and reaping the cache
when the engine itself idles.
Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/Makefile | 2 +-
.../gpu/drm
Make the lockchains more deterministic via i915_active by flagging the
potential lock.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_active.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_active.c
b/drivers/gpu/drm/i915/i915_active.c
index cb6a1eadf
Since a shrinker may be forced to wait on GPU activity,
i915_active_wait(&vma->active) must be safe for use inside a shrinker,
and so let's mark up the lock as being acquired by the shrinker to avoid
any nasty surprises creeping in.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_vma.c
Daniele pointed out that the CSB status information will change with
Tigerlake and suggested that we could rearrange our state machine to
hide the differences in generation. gcc also prefers the explicit state
machine, so make it so:
process_csb 19801967 -13
Convert the list manipulation of active to use spinlocks so that we can
perform the updates from underneath a quick interrupt callback.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_gt_types.h | 2 +-
drivers/gpu/drm/i915/gt/intel_reset.c| 13 ++---
drivers/gpu/drm/i
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