Re: screen freeze with 5.2-rc6 Dell XPS-13 skylake i915

2019-07-10 Thread Paul Bolle
Hi James, James Bottomley schreef op wo 10-07-2019 om 08:01 [-0700]: > I've confirmed that 5.1 doesn't have the regression and I'm now trying > to bisect the 5.2 merge window, but since the problem takes quite a > while to manifest this will take some time. Any hints about specific > patches that

[Intel-gfx] [PATCH v2] drm/i915/selftests: Ensure we don't clamp a random offset to 32b

2019-07-10 Thread Chris Wilson
Specify that we do want a 64b value for sizeof(u32) as we want to compute the mask of the upper 62bits. v2: Use round_down() for automatic type promotion Signed-off-by: Chris Wilson Cc: Mika Kuoppala Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 2 +-

Re: [Intel-gfx] [PATCH v2 10/25] drm/i915/tgl: Add power well to support 4th pipe

2019-07-10 Thread Lucas De Marchi
On Wed, Jul 10, 2019 at 04:04:29AM -0700, Rodrigo Vivi wrote: On Tue, Jul 09, 2019 at 09:20:42AM -0700, Lucas De Marchi wrote: On Tue, Jul 09, 2019 at 04:57:32AM -0700, Rodrigo Vivi wrote: > On Mon, Jul 08, 2019 at 04:16:14PM -0700, Lucas De Marchi wrote: > > From: Mika Kahola > > > > Add power

[Intel-gfx] [PATCH] drm/i915: Copy name string into ring buffer for intel_update/disable_plane tracepoints

2019-07-10 Thread Steven Rostedt
From: "Steven Rostedt (VMware)" Currently the intel_update_plane and intel_disable_plane tracepoints record the address of plane->name in the ring buffer, and then when reading the ring buffer uses %s to get the name. The issue with this, is that those two events can be minutes, hours or even da

Re: [Intel-gfx] Need to remove char pointers from trace events

2019-07-10 Thread Steven Rostedt
On Wed, 10 Jul 2019 18:45:24 +0300 Ville Syrjälä wrote: > > TP_printk("pipe %c, plane %s, frame=%u, scanline=%u", > > pipe_name(__entry->pipe), __entry->name, > > __entry->frame, __entry->scanline) > > > > > > The issue here is that you record a point

Re: [Intel-gfx] [PATCH 02/12] drm/i915/guc: simplify guc client

2019-07-10 Thread Michał Winiarski
On Tue, Jul 09, 2019 at 05:54:27PM -0700, Daniele Ceraolo Spurio wrote: > We originally added support, in some cases partial, for different modes > of operations via guc clients: > > - proxy vs direct submission; > - variable engine mask per-client. > > We only ever used one flow (all submissions

Re: [Intel-gfx] [PATCH v7 0/4] Panel rotation patches

2019-07-10 Thread Sam Ravnborg
Hi Derek. On Tue, Jul 09, 2019 at 07:16:55PM -0700, Derek Basehore wrote: > This adds the plumbing for reading panel rotation from the devicetree > and sets up adding a panel property for the panel orientation on > Mediatek SoCs when a rotation is present. > > v7 changes: > -forgot to add static

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Ensure we don't clamp a random offset to 32b

2019-07-10 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2019-07-10 16:34:23) >> Chris Wilson writes: >> >> > Specify that we do want a 64b value for sizeof(u32) as we want to >> > compute the mask of the upper 62bits. >> > >> > Signed-off-by: Chris Wilson >> > Cc: Mika Kuoppala >> > --- >> > drivers/g

Re: [Intel-gfx] [PATCH 01/12] drm/i915/guc: Remove preemption support for current fw

2019-07-10 Thread Michał Winiarski
On Tue, Jul 09, 2019 at 05:54:26PM -0700, Daniele Ceraolo Spurio wrote: > From: Chris Wilson > > Preemption via GuC submission is not being supported with its current > legacy incarnation. The current FW does support a similar pre-emption > flow via H2G, but it is class-based instead of being ins

Re: [Intel-gfx] Need to remove char pointers from trace events

2019-07-10 Thread Ville Syrjälä
On Wed, Jul 10, 2019 at 11:25:49AM -0400, Steven Rostedt wrote: > I was doing a bit of an audit on trace events and found this: > > # cat /debug/tracing/events/i915/intel_disable_plane/format > name: intel_disable_plane > ID: 1358 > format: > field:unsigned short common_type; offset:0;

Re: [Intel-gfx] [PATCH] drm/vkms: prime import support

2019-07-10 Thread Vasilev, Oleg
On Wed, 2019-07-10 at 18:35 +0300, Oleg Vasilev wrote: > On Wed, 2019-07-10 at 17:31 +0200, Daniel Vetter wrote: > > On Thu, Jul 04, 2019 at 11:54:10AM +0300, Oleg Vasilev wrote: > > > Bring dmabuf sharing through implementing prime_import_sg_table > > > callback. > > > This will help to validate u

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Ensure we don't clamp a random offset to 32b

2019-07-10 Thread Chris Wilson
Quoting Mika Kuoppala (2019-07-10 16:34:23) > Chris Wilson writes: > > > Specify that we do want a 64b value for sizeof(u32) as we want to > > compute the mask of the upper 62bits. > > > > Signed-off-by: Chris Wilson > > Cc: Mika Kuoppala > > --- > > drivers/gpu/drm/i915/gem/selftests/i915_gem

Re: [Intel-gfx] [PATCH] drm/vkms: prime import support

2019-07-10 Thread Vasilev, Oleg
On Wed, 2019-07-10 at 17:31 +0200, Daniel Vetter wrote: > On Thu, Jul 04, 2019 at 11:54:10AM +0300, Oleg Vasilev wrote: > > Bring dmabuf sharing through implementing prime_import_sg_table > > callback. > > This will help to validate userspace conformance in prime > > configurations > > without usin

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Ensure we don't clamp a random offset to 32b

2019-07-10 Thread Mika Kuoppala
Chris Wilson writes: > Specify that we do want a 64b value for sizeof(u32) as we want to > compute the mask of the upper 62bits. > > Signed-off-by: Chris Wilson > Cc: Mika Kuoppala > --- > drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletio

Re: [Intel-gfx] [igt-dev] [PATCH V6 i-g-t 3/6] lib: Add function to hash a framebuffer

2019-07-10 Thread Ser, Simon
On Wed, 2019-07-10 at 15:30 +, Ser, Simon wrote: > Mostly LGTM, here are a few nits. > > On Wed, 2019-06-12 at 23:17 -0300, Brian Starkey wrote: > > To use writeback buffers as a CRC source, we need to be able to hash > > them. Implement a simple FVA-1a hashing routine for this purpose. > > >

Re: [Intel-gfx] [PATCH] drm/vkms: prime import support

2019-07-10 Thread Daniel Vetter
On Thu, Jul 04, 2019 at 11:54:10AM +0300, Oleg Vasilev wrote: > Bring dmabuf sharing through implementing prime_import_sg_table callback. > This will help to validate userspace conformance in prime configurations > without using any actual hardware (e.g. in the cloud). > > Cc: Rodrigo Siqueira >

Re: [Intel-gfx] [igt-dev] [PATCH V6 i-g-t 3/6] lib: Add function to hash a framebuffer

2019-07-10 Thread Ser, Simon
Mostly LGTM, here are a few nits. On Wed, 2019-06-12 at 23:17 -0300, Brian Starkey wrote: > To use writeback buffers as a CRC source, we need to be able to hash > them. Implement a simple FVA-1a hashing routine for this purpose. > > Doing a bytewise hash on the framebuffer directly can be very sl

[Intel-gfx] Need to remove char pointers from trace events

2019-07-10 Thread Steven Rostedt
I was doing a bit of an audit on trace events and found this: # cat /debug/tracing/events/i915/intel_disable_plane/format name: intel_disable_plane ID: 1358 format: field:unsigned short common_type; offset:0; size:2; signed:0; field:unsigned char common_flags; of

Re: [Intel-gfx] [PATCH 04/11] drm/i915/gtt: Markup i915_ppgtt depth

2019-07-10 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2019-07-10 15:50:37) >> Chris Wilson writes: >> >> > Quoting Mika Kuoppala (2019-07-10 15:25:38) >> >> Chris Wilson writes: >> >> >> >> > Quoting Mika Kuoppala (2019-07-10 09:17:27) >> >> >> Chris Wilson writes: >> >> >> >> >> >> > This will be

Re: [Intel-gfx] [RFC PATCH] drm/i915: Join quoted strings and align them with open parenthesis

2019-07-10 Thread Chris Wilson
Quoting Janusz Krzysztofik (2019-07-10 15:59:55) > Follow dim checkpatch recommendations so it doesn't complain now and > again on consistent modifications of i915_params.c This is one where we've considered the merits of not rigorously applying checkpatch.pl and adopted a different convention. -C

Re: [Intel-gfx] [PATCH 04/11] drm/i915/gtt: Markup i915_ppgtt depth

2019-07-10 Thread Chris Wilson
Quoting Mika Kuoppala (2019-07-10 15:50:37) > Chris Wilson writes: > > > Quoting Mika Kuoppala (2019-07-10 15:25:38) > >> Chris Wilson writes: > >> > >> > Quoting Mika Kuoppala (2019-07-10 09:17:27) > >> >> Chris Wilson writes: > >> >> > >> >> > This will be useful to consolidate recursive co

Re: [Intel-gfx] [RFC PATCH] drm/i915: Drop extern qualifiers from header function prototypes

2019-07-10 Thread Chris Wilson
Quoting Janusz Krzysztofik (2019-07-10 15:52:39) > Follow dim checkpatch recommendation so it doesn't complain on that now > and again on header file modifications. > > Signed-off-by: Janusz Krzysztofik > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2388,19

Re: [Intel-gfx] screen freeze with 5.2-rc6 Dell XPS-13 skylake i915

2019-07-10 Thread James Bottomley
On Sat, 2019-06-29 at 11:56 -0700, James Bottomley wrote: > The symptoms are really weird: the screen image is locked in place. > The machine is still functional and if I log in over the network I > can do anything I like, including killing the X server and the > display will never alter. It also

[Intel-gfx] [RFC PATCH] drm/i915: Join quoted strings and align them with open parenthesis

2019-07-10 Thread Janusz Krzysztofik
Follow dim checkpatch recommendations so it doesn't complain now and again on consistent modifications of i915_params.c Signed-off-by: Janusz Krzysztofik --- drivers/gpu/drm/i915/i915_params.c | 96 ++ 1 file changed, 33 insertions(+), 63 deletions(-) diff --git a/dr

Re: [Intel-gfx] [PATCH 05/11] drm/i915/gtt: Compute the radix for gen8 page table levels

2019-07-10 Thread Mika Kuoppala
Mika Kuoppala writes: > Chris Wilson writes: > >> The radix levels of each page directory are easily determined so replace >> the numerous hardcoded constants with precomputed derived constants. >> >> Signed-off-by: Chris Wilson >> --- >> drivers/gpu/drm/i915/i915_gem_gtt.c | 39 ++

Re: [Intel-gfx] [PATCH 06/11] drm/i915/gtt: Convert vm->scratch into an array

2019-07-10 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2019-07-10 15:18:32) >> Chris Wilson writes: >> > - if (i915_vm_is_4lvl(vm)) { >> > - if (unlikely(setup_page_dma(vm, &vm->scratch_pdp))) { >> > - ret = -ENOMEM; >> > - goto free_pd; >> > -

[Intel-gfx] [RFC PATCH] drm/i915: Drop extern qualifiers from header function prototypes

2019-07-10 Thread Janusz Krzysztofik
Follow dim checkpatch recommendation so it doesn't complain on that now and again on header file modifications. Signed-off-by: Janusz Krzysztofik --- drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 +- drivers/gpu/drm/i915/gvt/gtt.h | 13 +++--- drivers/gpu/drm/i915/i915_drv.h

Re: [Intel-gfx] [PATCH 04/11] drm/i915/gtt: Markup i915_ppgtt depth

2019-07-10 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2019-07-10 15:25:38) >> Chris Wilson writes: >> >> > Quoting Mika Kuoppala (2019-07-10 09:17:27) >> >> Chris Wilson writes: >> >> >> >> > This will be useful to consolidate recursive code. >> >> > >> >> > Signed-off-by: Chris Wilson >> >> > --- >

Re: [Intel-gfx] [PATCH 04/11] drm/i915/gtt: Markup i915_ppgtt depth

2019-07-10 Thread Chris Wilson
Quoting Mika Kuoppala (2019-07-10 15:25:38) > Chris Wilson writes: > > > Quoting Mika Kuoppala (2019-07-10 09:17:27) > >> Chris Wilson writes: > >> > >> > This will be useful to consolidate recursive code. > >> > > >> > Signed-off-by: Chris Wilson > >> > --- > >> > drivers/gpu/drm/i915/i915_g

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix wrong escape clock divisor init for GLK

2019-07-10 Thread Patchwork
== Series Details == Series: drm/i915: Fix wrong escape clock divisor init for GLK URL : https://patchwork.freedesktop.org/series/63505/ State : warning == Summary == $ dim checkpatch origin/drm-tip 99873770da92 drm/i915: Fix wrong escape clock divisor init for GLK -:30: WARNING:NO_AUTHOR_SIGN

Re: [Intel-gfx] [PATCH] drm/i915: Fix wrong escape clock divisor init for GLK

2019-07-10 Thread Maarten Lankhorst
Op 10-07-2019 om 16:12 schreef Stanislav Lisovskiy: > According to Bspec clock divisor registers in GeminiLake > should be initialized by shifting 1(<<) to amount of correspondent > divisor. While i915 was writing all this time that value as is. > > Surprisingly that it by accident worked, until we

[Intel-gfx] [PATCH] drm/i915/selftests: Ensure we don't clamp a random offset to 32b

2019-07-10 Thread Chris Wilson
Specify that we do want a 64b value for sizeof(u32) as we want to compute the mask of the upper 62bits. Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i91

Re: [Intel-gfx] [PATCH 06/11] drm/i915/gtt: Convert vm->scratch into an array

2019-07-10 Thread Chris Wilson
Quoting Mika Kuoppala (2019-07-10 15:18:32) > Chris Wilson writes: > > - if (i915_vm_is_4lvl(vm)) { > > - if (unlikely(setup_page_dma(vm, &vm->scratch_pdp))) { > > - ret = -ENOMEM; > > - goto free_pd; > > - } > > - fil

Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Turn on GuC/HuC auto mode

2019-07-10 Thread Michal Wajdeczko
On Tue, 09 Jul 2019 16:17:02 +0200, Joonas Lahtinen wrote: Better subject would be: "Enable HuC (through GuC) on supported platforms" Such subject sounds better, but on one hand it does not reflect real code change (since we are not explicitly enabling HuC, but instead we are just letting th

Re: [Intel-gfx] [PATCH 04/11] drm/i915/gtt: Markup i915_ppgtt depth

2019-07-10 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2019-07-10 09:17:27) >> Chris Wilson writes: >> >> > This will be useful to consolidate recursive code. >> > >> > Signed-off-by: Chris Wilson >> > --- >> > drivers/gpu/drm/i915/i915_gem_gtt.c | 3 +++ >> > drivers/gpu/drm/i915/i915_gem_gtt.h | 1 +

Re: [Intel-gfx] [PATCH 06/11] drm/i915/gtt: Convert vm->scratch into an array

2019-07-10 Thread Mika Kuoppala
Chris Wilson writes: > Each level has its own scratch. Make the levels more obvious by forgoing > the fancy similarly names and replace them with a number. 0 is the bottom > most level, the physical page used for actual data; 1+ are the page > directories. > > Signed-off-by: Chris Wilson > --- >

[Intel-gfx] [PATCH] drm/i915: Fix wrong escape clock divisor init for GLK

2019-07-10 Thread Stanislav Lisovskiy
According to Bspec clock divisor registers in GeminiLake should be initialized by shifting 1(<<) to amount of correspondent divisor. While i915 was writing all this time that value as is. Surprisingly that it by accident worked, until we met some issues with Microtech Etab. Signed-off-by: stanisl

Re: [Intel-gfx] [PATCH v3 2/2] drm/i915: Enable hotplug retry

2019-07-10 Thread Imre Deak
On Fri, Jun 28, 2019 at 02:39:21PM -0700, José Roberto de Souza wrote: > Right now we are aware of two cases that needs another hotplug retry: > - Unpowered type-c dongles > - HDMI slow unplug > > Both have a complete explanation in the code to schedule another run > of the hotplug handler. > > I

Re: [Intel-gfx] [PATCH 05/11] drm/i915/gtt: Compute the radix for gen8 page table levels

2019-07-10 Thread Chris Wilson
Quoting Mika Kuoppala (2019-07-10 14:49:05) > Chris Wilson writes: > > +static inline unsigned int gen8_pt_count(u64 addr, u64 end) > > +{ > > + GEM_BUG_ON(addr >= end); > > + if ((addr ^ end) & ~I915_PDE_MASK) > > + return I915_PDES - (addr & I915_PDE_MASK); > > Ok, I yield o

Re: [Intel-gfx] [PATCH] drm/i915: Don't pass stack garbage to pcode in the second data register

2019-07-10 Thread Chris Wilson
Quoting Ville Syrjala (2019-07-10 14:49:37) > From: Ville Syrjälä > > Zero initialize val2 so that we don't pass stack garbage to > the pcode qgv read command. I suspect in this case pcode > just ignores the initial value in that registers, but better > safe than sorry. > > Cc: Dan Carpenter >

[Intel-gfx] [PATCH] drm/i915: Don't pass stack garbage to pcode in the second data register

2019-07-10 Thread Ville Syrjala
From: Ville Syrjälä Zero initialize val2 so that we don't pass stack garbage to the pcode qgv read command. I suspect in this case pcode just ignores the initial value in that registers, but better safe than sorry. Cc: Dan Carpenter Reported-by: Dan Carpenter Signed-off-by: Ville Syrjälä ---

Re: [Intel-gfx] [PATCH 05/11] drm/i915/gtt: Compute the radix for gen8 page table levels

2019-07-10 Thread Mika Kuoppala
Chris Wilson writes: > The radix levels of each page directory are easily determined so replace > the numerous hardcoded constants with precomputed derived constants. > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/i915_gem_gtt.c | 39 + > 1 file changed

[Intel-gfx] [PULL] drm-intel-fixes

2019-07-10 Thread Joonas Lahtinen
Hi Dave & Daniel, Some rather important fixes that appeared after -rc6 and missed v5.2. As a PR by request of Daniel. These avoid one WARN and potential dirty pointer deref, fix a regression on saturated media loads and add missing Icelake W/As. I've manually added Cc: stable to all of them. The

Re: [Intel-gfx] [PATCH 1/6] drm/i915/sdvo: Fix handling if zero hbuf size

2019-07-10 Thread Imre Deak
On Wed, Jun 19, 2019 at 09:03:07PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > The spec says: > "A value of 0 indicates that this buffer does not exist" > So we should not convert a hbuf_size of 0 into 1. > > Also pull the relevant code into a helper to avoid making the > same mistake

Re: [Intel-gfx] [PATCH v3 2/4] drm/i915: fix include order in intel_tc.*

2019-07-10 Thread Imre Deak
On Tue, Jul 09, 2019 at 08:54:03AM -0700, Lucas De Marchi wrote: > Separate local includes with a blank line and sort the groups > alphabetically. > > v2: don't make intel_tc.h be the first include > v3: don't make local includes be included first > > Signed-off-by: Lucas De Marchi Reviewed-by:

[Intel-gfx] ✗ Fi.CI.BAT: failure for Rename functions to match their entry points

2019-07-10 Thread Patchwork
== Series Details == Series: Rename functions to match their entry points URL : https://patchwork.freedesktop.org/series/63498/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6448 -> Patchwork_13599 Summary --- **FAIL

Re: [Intel-gfx] [PATCH 00/12] GT-fy the uc code

2019-07-10 Thread Chris Wilson
Quoting Daniele Ceraolo Spurio (2019-07-10 01:54:25) > GuC and HuC are a subunits of the GT HW, so it makes sense for the > relevant structures to be inside intel_gt. This series introduces a new > intel_uc structure under intel_gt and moves the GuC/HuC structures in > there. All the general uc cod

[Intel-gfx] [PATCH] drm/i915: Don't overestimate 4:2:0 link symbol clock

2019-07-10 Thread Ville Syrjala
From: Ville Syrjälä With 4:2:0 output the LS clock can be half of what it is with 4:4:4. Make that happen. Cc: Gwan-gyeong Mun Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dp.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/d

Re: [Intel-gfx] [RFC PATCH 0/6] Rename functions to match their entry points

2019-07-10 Thread Janusz Krzysztofik
On Wednesday, July 10, 2019 2:47:08 PM CEST Chris Wilson wrote: > Quoting Janusz Krzysztofik (2019-07-10 13:36:25) > > Need for this was identified while working on split of driver unbind > > path into _remove() and _release() parts. Consistency in function > > naming has been recognized as helpfu

Re: [Intel-gfx] [RFC PATCH 0/6] Rename functions to match their entry points

2019-07-10 Thread Chris Wilson
Quoting Janusz Krzysztofik (2019-07-10 13:36:25) > Need for this was identified while working on split of driver unbind > path into _remove() and _release() parts. Consistency in function > naming has been recognized as helpful when trying to work out which > phase the code is in. > > What I'm st

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for Extend BT2020 support in iCSC and fixes (rev5)

2019-07-10 Thread Ville Syrjälä
On Thu, Jul 04, 2019 at 01:58:04PM +, Shankar, Uma wrote: > > > >-Original Message- > >From: Patchwork [mailto:patchw...@emeril.freedesktop.org] > >Sent: Wednesday, July 3, 2019 12:31 AM > >To: Shankar, Uma > >Cc: intel-gfx@lists.freedesktop.org > >Subject: ✓ Fi.CI.IGT: success for E

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Rename functions to match their entry points

2019-07-10 Thread Patchwork
== Series Details == Series: Rename functions to match their entry points URL : https://patchwork.freedesktop.org/series/63498/ State : warning == Summary == $ dim checkpatch origin/drm-tip 918d25b99c3e drm/i915: Rename "_load"/"_unload" to match PCI entry points -:56: CHECK:AVOID_EXTERNS: ext

[Intel-gfx] [RFC PATCH 6/6] drm/i915: Rename "inject_load_failure" module parameter

2019-07-10 Thread Janusz Krzysztofik
Use the "probe" nomenclature for consistency with internally used names of functions and variables. Requires adjustment of IGT tests and possibly affects other user custom applications. Signed-off-by: Janusz Krzysztofik --- drivers/gpu/drm/i915/i915_drv.c| 10 +- drivers/gpu/drm/i91

[Intel-gfx] [RFC PATCH 3/6] drm/i915: Propagate "_release" function name suffix down

2019-07-10 Thread Janusz Krzysztofik
Replace mixed "_fini"/"_cleanup"/"_cleanup_hw" suffixes found in names of fucntions called from i915_driver_release() with "_release" suffix consistently. This provides better code readability, especially helpful when trying to work out which phase the code is in. Functions names starting with "i

[Intel-gfx] [RFC PATCH 4/6] drm/i915: Propagate "_remove" function name suffix down

2019-07-10 Thread Janusz Krzysztofik
Similar to the "_release" case, consistently replace mixed "_cleanup"/"_fini"/"_fini_hw" components found in names of functions called from i915_driver_remove() with "_remove" or "_driver_remove" suffixes for better code readability. Signed-off-by: Janusz Krzysztofik --- drivers/gpu/drm/i915/dis

[Intel-gfx] [RFC PATCH 5/6] drm/i915: Propagate "_probe" function name suffix down

2019-07-10 Thread Janusz Krzysztofik
Similar to the "_release" and "_remove" cases, consequently replace "_init" components of names of functions called from i915_driver_probe() with "_probe" suffixes for better code readability. Signed-off-by: Janusz Krzysztofik --- drivers/gpu/drm/i915/i915_drv.c | 26 +-

[Intel-gfx] [RFC PATCH 2/6] drm/i915: Replace "_load" with "_probe" consequently

2019-07-10 Thread Janusz Krzysztofik
Use the "_probe" nomenclature not only in i915_driver_probe() helper name but also in other related function / variable names for consistency. Only the userspace exposed name of a related module parameter is left untouched. Signed-off-by: Janusz Krzysztofik --- .../gpu/drm/i915/display/intel_co

[Intel-gfx] [RFC PATCH 1/6] drm/i915: Rename "_load"/"_unload" to match PCI entry points

2019-07-10 Thread Janusz Krzysztofik
Current names of i915_driver_load/unload() functions originate in legacy DRM stubs. Reduce nomenclature ambiguity by renaming them to match their current use as helpers called from PCI entry points. Suggested by: Chris Wilson Signed-off-by: Janusz Krzysztofik --- drivers/gpu/drm/i915/i915_drv.

[Intel-gfx] [RFC PATCH 0/6] Rename functions to match their entry points

2019-07-10 Thread Janusz Krzysztofik
Need for this was identified while working on split of driver unbind path into _remove() and _release() parts. Consistency in function naming has been recognized as helpful when trying to work out which phase the code is in. What I'm still not sure about is desired depth of that modification - ho

Re: [Intel-gfx] [PATCH xf86-video-intel v3 2/2] sna: Support 10bpc gamma via the GAMMA_LUT crtc property

2019-07-10 Thread Chris Wilson
Quoting Mario Kleiner (2019-07-09 19:34:54) > Hi Ville, > > now somebody just needs to merge these two 10 bit gamma lut patches > into intel-ddx? And so it is done. Thank you, -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lis

Re: [Intel-gfx] [igt-dev] [PATCH V6 i-g-t 2/6] kms_writeback: Add initial writeback tests

2019-07-10 Thread Ser, Simon
Hi, Thanks for the patch! Here are a few comments. For bonus points, it would be nice to add igt_describe descriptions of each sub-test. On Wed, 2019-06-12 at 23:16 -0300, Brian Starkey wrote: > Add tests for the WRITEBACK_PIXEL_FORMATS, WRITEBACK_OUT_FENCE_PTR and > WRITEBACK_FB_ID properties o

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: add missing delay for OA muxes configuration (rev3)

2019-07-10 Thread Patchwork
== Series Details == Series: drm/i915/perf: add missing delay for OA muxes configuration (rev3) URL : https://patchwork.freedesktop.org/series/63492/ State : success == Summary == CI Bug Log - changes from CI_DRM_6447 -> Patchwork_13598 Sum

[Intel-gfx] ✓ Fi.CI.IGT: success for EHL port programming (rev7)

2019-07-10 Thread Patchwork
== Series Details == Series: EHL port programming (rev7) URL : https://patchwork.freedesktop.org/series/62492/ State : success == Summary == CI Bug Log - changes from CI_DRM_6444_full -> Patchwork_13589_full Summary --- **SUCCESS**

[Intel-gfx] kernel oops loading i915 after "x86/asm: Pin sensitive CR4 bits" (873d50d58)

2019-07-10 Thread Xi Ruoyao
Hello, When I try to build and run the latest mainline kernel, it Oops loading i915 module: BUG: unable to handle page fault for address: 9edc1598 #PF: supervisor write access in kernel mode #PF: error_code(0x0003) - permissions violation PGD 1a20c067 P4D 1a20c067 PUD 1a20d063 PMD 800

Re: [Intel-gfx] [PATCH v3 1/2] drm/i915: Add support for retrying hotplug

2019-07-10 Thread Rodrigo Vivi
On Fri, Jun 28, 2019 at 02:39:20PM -0700, José Roberto de Souza wrote: > From: Imre Deak > > There is some scenarios that we are aware that sink probe can fail, > so lets add the infrastructure to let hotplug() hook to request > another probe after some time. > > v2: Handle shared HPD pins (Imre

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/perf: add missing delay for OA muxes configuration

2019-07-10 Thread Patchwork
== Series Details == Series: drm/i915/perf: add missing delay for OA muxes configuration URL : https://patchwork.freedesktop.org/series/63492/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6447 -> Patchwork_13597 Summary --

Re: [Intel-gfx] [PATCH v8 09/13] drm/i915: add a new perf configuration execbuf parameter

2019-07-10 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-07-09 13:33:47) > +static int eb_oa_config(struct i915_execbuffer *eb) > +{ > + int ret; > + > + if (!eb->oa_config) > + return 0; > + > + ret = i915_mutex_lock_interruptible(&eb->i915->drm); > + if (ret) > + return

Re: [Intel-gfx] [PATCH v8 13/13] drm/i915: add support for perf configuration queries

2019-07-10 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-07-09 13:33:51) > Listing configurations at the moment is supported only through sysfs. > This might cause issues for applications wanting to list > configurations from a container where sysfs isn't available. > > This change adds a way to query the number of config

Re: [Intel-gfx] [PATCH v2 10/25] drm/i915/tgl: Add power well to support 4th pipe

2019-07-10 Thread Rodrigo Vivi
On Tue, Jul 09, 2019 at 09:20:42AM -0700, Lucas De Marchi wrote: > On Tue, Jul 09, 2019 at 04:57:32AM -0700, Rodrigo Vivi wrote: > > On Mon, Jul 08, 2019 at 04:16:14PM -0700, Lucas De Marchi wrote: > > > From: Mika Kahola > > > > > > Add power well 5 to support 4th pipe and transcoder on TGL. > >

Re: [Intel-gfx] [PATCH] drm/i915/perf: add missing delay for OA muxes configuration

2019-07-10 Thread Lionel Landwerlin
On 10/07/2019 13:55, Chris Wilson wrote: From: Lionel Landwerlin This was dropped from the original patch series, we weren't sure whether it was needed at the time. More recent tests show it's definitely needed to have acurate performance data. Signed-off-by: Lionel Landwerlin Fixes: 19f81df2

Re: [Intel-gfx] [PATCH v3 16/25] drm/i915/tgl: port to ddc pin mapping

2019-07-10 Thread Rodrigo Vivi
On Tue, Jul 09, 2019 at 10:00:44AM -0700, Lucas De Marchi wrote: > Make the icl function generic so it is based on phy type and can be > applied to tgl as well. > > I checked if this could not apply to EHL as well, but unfortunately > there the HPD and DDC/GMBUS pins for DDI C are mapped to TypeC

[Intel-gfx] [PATCH] drm/i915/perf: add missing delay for OA muxes configuration

2019-07-10 Thread Chris Wilson
From: Lionel Landwerlin This was dropped from the original patch series, we weren't sure whether it was needed at the time. More recent tests show it's definitely needed to have acurate performance data. Signed-off-by: Lionel Landwerlin Fixes: 19f81df2859eb1 ("drm/i915/perf: Add OA unit support

[Intel-gfx] [CI] drm/i915/perf: add missing delay for OA muxes configuration

2019-07-10 Thread Chris Wilson
From: Lionel Landwerlin This was dropped from the original patch series, we weren't sure whether it was needed at the time. More recent tests show it's definitely needed to have acurate performance data. Signed-off-by: Lionel Landwerlin Fixes: 19f81df2859eb1 ("drm/i915/perf: Add OA unit support

[Intel-gfx] [CI] drm/i915/perf: add missing delay for OA muxes configuration

2019-07-10 Thread Chris Wilson
From: Lionel Landwerlin This was dropped from the original patch series, we weren't sure whether it was needed at the time. More recent tests show it's definitely needed to have acurate performance data. Signed-off-by: Lionel Landwerlin Fixes: 19f81df2859eb1 ("drm/i915/perf: Add OA unit support

[Intel-gfx] ✓ Fi.CI.IGT: success for Initial support for Tiger Lake (rev3)

2019-07-10 Thread Patchwork
== Series Details == Series: Initial support for Tiger Lake (rev3) URL : https://patchwork.freedesktop.org/series/62726/ State : success == Summary == CI Bug Log - changes from CI_DRM_6444_full -> Patchwork_13588_full Summary --- **S

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Disable preemption under GVT

2019-07-10 Thread Chris Wilson
Quoting Zhang, Xiaolin (2019-07-10 11:04:06) > On 07/09/2019 05:12 PM, Chris Wilson wrote: > > Preempt-to-busy uses a GPU semaphore to enforce an idle-barrier across > > preemption, but mediated gvt does not fully support semaphores. > > > > v2: Fiddle around with the flags and settle on using has-

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Disable preemption under GVT

2019-07-10 Thread Zhang, Xiaolin
On 07/09/2019 05:12 PM, Chris Wilson wrote: > Preempt-to-busy uses a GPU semaphore to enforce an idle-barrier across > preemption, but mediated gvt does not fully support semaphores. > > v2: Fiddle around with the flags and settle on using has-semaphores for > the core bits so that we retain the ab

Re: [Intel-gfx] Fedora 30 drm error

2019-07-10 Thread Chunyu Hu
Hi Rodrigo, Thank you Rodrigo for the reply. After some time of debug, and finally with memtest86, I find there is memory corruption issue in this workstation, even kasan kernel can't detect, so finally I decide to use memtest86+ to do the detect. After I added a 'memmap=2G$4G' in cmdline, the i

Re: [Intel-gfx] [PATCH 05/11] drm/i915/gtt: Compute the radix for gen8 page table levels

2019-07-10 Thread Chris Wilson
Quoting Mika Kuoppala (2019-07-10 10:24:48) > Chris Wilson writes: > > > The radix levels of each page directory are easily determined so replace > > the numerous hardcoded constants with precomputed derived constants. > > > > Signed-off-by: Chris Wilson > > --- > > drivers/gpu/drm/i915/i915_ge

Re: [Intel-gfx] [PATCH 05/11] drm/i915/gtt: Compute the radix for gen8 page table levels

2019-07-10 Thread Mika Kuoppala
Chris Wilson writes: > The radix levels of each page directory are easily determined so replace > the numerous hardcoded constants with precomputed derived constants. > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/i915_gem_gtt.c | 39 + > 1 file changed

Re: [Intel-gfx] [PATCH v8 00/13] drm/i915: Vulkan performance query support

2019-07-10 Thread Lionel Landwerlin
On 09/07/2019 23:30, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-07-09 13:33:38) drm/i915/perf: ensure we keep a reference on the driver drm/i915: enumerate scratch fields drm/i915: add infrastructure to hold off preemption on a request These 3 looked to be standalone, so pushe

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Record preemption counting for selftests (rev2)

2019-07-10 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Record preemption counting for selftests (rev2) URL : https://patchwork.freedesktop.org/series/63452/ State : success == Summary == CI Bug Log - changes from CI_DRM_6443_full -> Patchwork_13587_full ==

Re: [Intel-gfx] kernel oops loading i915 after "x86/asm: Pin sensitive CR4 bits" (873d50d58)

2019-07-10 Thread Dmitry V. Levin
Hi, On Wed, Jul 10, 2019 at 01:44:17PM +0800, Xi Ruoyao wrote: > Hello, > > When I try to build and run the latest mainline kernel, it Oops loading i915 > module: > > BUG: unable to handle page fault for address: 9edc1598 > #PF: supervisor write access in kernel mode > #PF: error_code(0x

Re: [Intel-gfx] [igt-dev] [PATCH V6 i-g-t 1/6] lib/igt_kms: Add writeback support

2019-07-10 Thread Ser, Simon
On Wed, 2019-06-12 at 23:16 -0300, Brian Starkey wrote: > Add support in igt_kms for writeback connectors, with the ability > to attach framebuffers. > > v5: Rebase and add DRM_CLIENT_CAP_WRITEBACK_CONNECTORS before > drmModeGetResources() > > Signed-off-by: Brian Starkey > [rebased and updated

Re: [Intel-gfx] [PATCH 04/11] drm/i915/gtt: Markup i915_ppgtt depth

2019-07-10 Thread Chris Wilson
Quoting Mika Kuoppala (2019-07-10 09:17:27) > Chris Wilson writes: > > > This will be useful to consolidate recursive code. > > > > Signed-off-by: Chris Wilson > > --- > > drivers/gpu/drm/i915/i915_gem_gtt.c | 3 +++ > > drivers/gpu/drm/i915/i915_gem_gtt.h | 1 + > > 2 files changed, 4 insertio

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Implement read-only support in whitelist selftest

2019-07-10 Thread Tvrtko Ursulin
On 03/07/2019 20:43, John Harrison wrote: On 7/3/2019 01:32, Chris Wilson wrote: Quoting john.c.harri...@intel.com (2019-07-03 03:06:04) From: John Harrison Newer hardware supports extra feature in the whitelist registers. This patch updates the selftest to test that entries marked as read on

Re: [Intel-gfx] [PATCH 04/11] drm/i915/gtt: Markup i915_ppgtt depth

2019-07-10 Thread Mika Kuoppala
Chris Wilson writes: > This will be useful to consolidate recursive code. > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/i915_gem_gtt.c | 3 +++ > drivers/gpu/drm/i915/i915_gem_gtt.h | 1 + > 2 files changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c >

Re: [Intel-gfx] [PATCH v9 1/6] drm: Add Content protection type property

2019-07-10 Thread Pekka Paalanen
On Tue, 9 Jul 2019 18:17:59 +0530 Ramalingam C wrote: > On 2019-07-09 at 17:31:10 +0300, Pekka Paalanen wrote: > > On Mon, 8 Jul 2019 16:51:11 +0530 > > Ramalingam C wrote: > > > > > This patch adds a DRM ENUM property to the selected connectors. > > > This property is used for mentioning th

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: add infrastructure to hold off preemption on a request

2019-07-10 Thread Patchwork
== Series Details == Series: drm/i915: add infrastructure to hold off preemption on a request URL : https://patchwork.freedesktop.org/series/63451/ State : success == Summary == CI Bug Log - changes from CI_DRM_6443_full -> Patchwork_13586_full =

Re: [Intel-gfx] [PATCH 01/14] drm/i915/execlists: Record preemption for selftests

2019-07-10 Thread Mika Kuoppala
Chris Wilson writes: > Put back the preemption counters lost in commit 22b7a426bbe1 > ("drm/i915/execlists: Preempt-to-busy") so that our selftests that > assert no preemption took place continue to function. > > v2: But a timeslice is only a "soft" preemption! > > Fixes: 22b7a426bbe1 ("drm/i915/

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/14] drm/i915/execlists: Record preemption for selftests

2019-07-10 Thread Patchwork
== Series Details == Series: series starting with [01/14] drm/i915/execlists: Record preemption for selftests URL : https://patchwork.freedesktop.org/series/63472/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6446 -> Patchwork_13596 ==

[Intel-gfx] ✓ Fi.CI.IGT: success for Modular FIA (rev3)

2019-07-10 Thread Patchwork
== Series Details == Series: Modular FIA (rev3) URL : https://patchwork.freedesktop.org/series/63175/ State : success == Summary == CI Bug Log - changes from CI_DRM_6443_full -> Patchwork_13585_full Summary --- **SUCCESS** No regr

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/14] drm/i915/execlists: Record preemption for selftests

2019-07-10 Thread Patchwork
== Series Details == Series: series starting with [01/14] drm/i915/execlists: Record preemption for selftests URL : https://patchwork.freedesktop.org/series/63472/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/execlists: Record preemption fo

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/14] drm/i915/execlists: Record preemption for selftests

2019-07-10 Thread Patchwork
== Series Details == Series: series starting with [01/14] drm/i915/execlists: Record preemption for selftests URL : https://patchwork.freedesktop.org/series/63472/ State : warning == Summary == $ dim checkpatch origin/drm-tip 33497b9b47fa drm/i915/execlists: Record preemption for selftests cd

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