== Series Details ==
Series: drm/i915/execlists: Skip over foreign requests on the context timeline
URL : https://patchwork.freedesktop.org/series/68600/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7192_full -> Patchwork_15003_full
===
== Series Details ==
Series: series starting with [1/5] drm/i915/selftests: Drop global engine
lookup for gt selftests
URL : https://patchwork.freedesktop.org/series/68623/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7196 -> Patchwork_15016
=
Iterate over all user-accessible render engines when checking whether
they can be adjusted for sseu.
Signed-off-by: Chris Wilson
---
.../drm/i915/gem/selftests/i915_gem_context.c | 127 +-
1 file changed, 61 insertions(+), 66 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/se
As we are inside the gt, we have a local gt->engine[] lookup we should
be using in preference over the i915->engine[] copy.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/
Use any blitter engine at random for prefilling the memory region.
Signed-off-by: Chris Wilson
---
.../drm/i915/selftests/intel_memory_region.c | 29 +--
1 file changed, 26 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/intel_memory_region.c
b/driver
Select a random user accessible engine for checking coherency results.
While we should check all engines, we use a random selection so that
over repeated runs we cover all.
Signed-off-by: Chris Wilson
---
.../i915/gem/selftests/i915_gem_coherency.c | 168 ++
1 file changed, 89
Check all user accessible engines that can blit work with our blitter
client.
Signed-off-by: Chris Wilson
---
.../i915/gem/selftests/i915_gem_client_blt.c | 30 ---
1 file changed, 26 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_
== Series Details ==
Series: series starting with [1/2] drm/i915/uc: define GuC and HuC binaries for
TGL
URL : https://patchwork.freedesktop.org/series/68595/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7191_full -> Patchwork_14996_full
=
Reviewed-by: Juha-Pekka Heikkila
On 8.10.2019 19.14, Ville Syrjala wrote:
From: Ville Syrjälä
Let's try to keep the pixel format arrays somewhat sorted:
1. RGB before YUV
2. smaller bpp before larger bpp
3. X before A
4. RGB before BGR
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915
Reviewed-by: Juha-Pekka Heikkila
On 8.10.2019 19.14, Ville Syrjala wrote:
From: Ville Syrjälä
Lots of redundant assignments inside intel_primary_plane_create().
Get rid of them.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 43 +++-
1 fil
== Series Details ==
Series: series starting with [1/5] drm/i915: Add two spaces before the SKL_DFSM
registers
URL : https://patchwork.freedesktop.org/series/68594/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7191_full -> Patchwork_14995_full
===
> > > @@ -216,6 +217,8 @@ static void nohangcheck_hostile(int i915)
> > >* we forcibly terminate that context.
> > >*/
> > >
> > > + hang = igt_allow_hang(i915, 0, 0);
> > > +
> >
> > why ctx = 0?
>
> Because I'm lazy and it didn't matter ;)
yes, sure :)
Acked-by: Andi Shy
== Series Details ==
Series: drm/i915/gt: Pull timeline initialise to intel_gt_init_early
URL : https://patchwork.freedesktop.org/series/68619/
State : failure
== Summary ==
Applying: drm/i915/gt: Pull timeline initialise to intel_gt_init_early
error: sha1 information is lacking or useless
(d
== Series Details ==
Series: drm/i915/gt: Tidy up rps irq handler to use intel_gt
URL : https://patchwork.freedesktop.org/series/68616/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7195 -> Patchwork_15014
Summary
---
Quoting Andi Shyti (2019-10-27 19:01:33)
> Hi Chris,
>
> > diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c
> > b/drivers/gpu/drm/i915/gt/intel_rps.c
> > index 30f56c786468..032a0c6389f9 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> > @@ -180
Our timelines are currently contained within an intel_gt, and we only
need to perform list/spinlock initialisation, so we can pull the
intel_timelines_init() into our intel_gt_init_early().
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_gt.c | 2 ++
drivers/gpu/drm/
Quoting Andi Shyti (2019-10-27 19:01:24)
> Hi Chris,
>
> > @@ -216,6 +217,8 @@ static void nohangcheck_hostile(int i915)
> >* we forcibly terminate that context.
> >*/
> >
> > + hang = igt_allow_hang(i915, 0, 0);
> > +
>
> why ctx = 0?
Imagine,
* we forcibly termi
Quoting Andi Shyti (2019-10-27 19:01:24)
> Hi Chris,
>
> > @@ -216,6 +217,8 @@ static void nohangcheck_hostile(int i915)
> >* we forcibly terminate that context.
> >*/
> >
> > + hang = igt_allow_hang(i915, 0, 0);
> > +
>
> why ctx = 0?
Because I'm lazy and it didn't matter
Hi Chris,
> @@ -216,6 +217,8 @@ static void nohangcheck_hostile(int i915)
>* we forcibly terminate that context.
>*/
>
> + hang = igt_allow_hang(i915, 0, 0);
> +
why ctx = 0?
Andi
___
Intel-gfx mailing list
Intel-gfx@lists.freedes
Hi Chris,
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c
> b/drivers/gpu/drm/i915/gt/intel_rps.c
> index 30f56c786468..032a0c6389f9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -180,8 +180,8 @@ static void gen5_rps_init(struct intel_rps *
Hi Chris,
On Sat, Oct 26, 2019 at 08:34:55PM +0100, Chris Wilson wrote:
> igt_allow_hang() checks that the GPU can be reset before allowing the
> test to cause a GPU hang (which would need the reset to recover).
> However, our checking for allowing a hang depends on i915.reset which we
> later res
== Series Details ==
Series: drm/i915/selftests: Drop global engine lookup for gt selftests
URL : https://patchwork.freedesktop.org/series/68615/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7195 -> Patchwork_15013
Summary
Since the rps is tied to its intel_gt, use that backpointer to find the
right engine rather than delving into i915.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_rps.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c
As we are inside the gt, we have a local gt->engine[] lookup we should
be using in preference over the i915->engine[] copy.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/
For this test, we need a laptop running on battery power so that we can
read the battery charge level before and after suspend. And then wait
long enough for a reliable measure.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111909
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
tes
== Series Details ==
Series: drm/i915: Put future HW and their uAPIs under STAGING & BROKEN
URL : https://patchwork.freedesktop.org/series/68612/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7194 -> Patchwork_15012
Summary
For this test, we need a laptop running on battery power so that we can
read the battery charge level before and after suspend. And then wait
long enough for a reliable measure.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111909
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
tes
== Series Details ==
Series: drm/i915: Put future HW and their uAPIs under STAGING & BROKEN
URL : https://patchwork.freedesktop.org/series/68612/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
82d234f598c6 drm/i915: Put future HW and their uAPIs under STAGING & BROKEN
-:56: WARN
== Series Details ==
Series: drm/i915/selftests: Check a few more fixed locations within the context
image
URL : https://patchwork.freedesktop.org/series/68611/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7194 -> Patchwork_15011
=
== Series Details ==
Series: drm/i915/selftests: Measure basic throughput of blit routines
URL : https://patchwork.freedesktop.org/series/68610/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7194 -> Patchwork_15010
Summary
We would like some freedom to break the user API/ABI for future HW but
yet still expose the driver for upstream development on that HW.
Currently, we have the i915.force_probe module parameter to avoid binding
to HW while the driver is under development, but that is still a little
too soft with res
== Series Details ==
Series: drm/i915/selftests: Measure basic throughput of blit routines
URL : https://patchwork.freedesktop.org/series/68610/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b5fd5010e156 drm/i915/selftests: Measure basic throughput of blit routines
-:158: ERROR
== Series Details ==
Series: drm/i915: Collect user engines at driver_register phase
URL : https://patchwork.freedesktop.org/series/68609/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7194 -> Patchwork_15009
Summary
--
As we use hard coded offsets for a few locations within the context
image, include those in the selftests to assert that they are valid.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 20
1 file changed, 20 insertions(+)
diff --g
We need to verify that our blitter routines perform as expected, so
measure it.
Signed-off-by: Chris Wilson
Cc: Matthew Auld
---
.../i915/gem/selftests/i915_gem_object_blt.c | 172 ++
1 file changed, 172 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_ob
Quoting Michal Wajdeczko (2019-10-27 14:22:28)
> There is no need to add engines to early uabi list one by one
> during engine setup, we can collect all engines while doing final
> renames at driver_register phase. This will also unblock us in
> case we would need to do some late modifications of t
There is no need to add engines to early uabi list one by one
during engine setup, we can collect all engines while doing final
renames at driver_register phase. This will also unblock us in
case we would need to do some late modifications of the engine
list after engine setup but before starting u
== Series Details ==
Series: drm/i915/pmu: Initialise the spinlock before registering
URL : https://patchwork.freedesktop.org/series/68576/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7188_full -> Patchwork_14989_full
Sum
== Series Details ==
Series: drm/i915/execlists: Simply walk back along request timeline on reset
(rev5)
URL : https://patchwork.freedesktop.org/series/68601/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7194 -> Patchwork_15008
===
== Series Details ==
Series: series starting with [CI,1/7] drm/i915: support creating LMEM objects
URL : https://patchwork.freedesktop.org/series/68575/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7187_full -> Patchwork_14988_full
The request's timeline will only contain requests from this context, in
order of execution. Therefore, we can simply look back along this
timeline to find the currently executing request.
If we do find that the current context has completed its last request,
that does not imply that all requests a
== Series Details ==
Series: drm/i915/execlists: Simply walk back along request timeline on reset
(rev4)
URL : https://patchwork.freedesktop.org/series/68601/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7194 -> Patchwork_15007
===
The request's timeline will only contain requests from this context, in
order of execution. Therefore, we can simply look back along this
timeline to find the currently executing request.
If we do find that the current context has completed its last request,
that does not imply that all requests a
== Series Details ==
Series: Update VSC SDP / HDR Metadata SDP states on pipe updates. (rev2)
URL : https://patchwork.freedesktop.org/series/68531/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7186_full -> Patchwork_14984_full
=
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