Hi, Daniel:
On Fri, 2019-11-15 at 10:21 +0100, Daniel Vetter wrote:
> Aside: There's a few other fb_create implementations which
> simply check for valid buffer format (or an approximation thereof),
> and then call drm_gem_fb_create. For atomic drivers at least we could
> walk all planes and make
== Series Details ==
Series: drm/i915: Use a ctor for TYPESAFE_BY_RCU i915_request (rev2)
URL : https://patchwork.freedesktop.org/series/69824/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7aea4369d8b2 drm/i915: Use a ctor for TYPESAFE_BY_RCU i915_request
-:51: WARNING:COMMIT_
== Series Details ==
Series: drm/i915: Add Gen/GT info to GPU error state
URL : https://patchwork.freedesktop.org/series/69793/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7394_full -> Patchwork_15366_full
Summary
---
== Series Details ==
Series: drm: mmap fixups (rev2)
URL : https://patchwork.freedesktop.org/series/69820/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7402 -> Patchwork_15388
Summary
---
**SUCCESS**
No regressio
Quoting Summers, Stuart (2019-11-22 01:58:49)
> On Thu, 2019-11-21 at 23:30 +, Chris Wilson wrote:
> > Use our more regular igt_flush_test() to bind the wait-for-idle and
> > error out instead of waiting around forever on critical failure.
> >
> > Signed-off-by: Chris Wilson
> > Cc: Tvrtko Ur
As we start peeking into requests for longer and longer, e.g.
incorporating use of spinlocks when only protected by an
rcu_read_lock(), we need to be careful in how we reset the request when
recycling and need to preserve any barriers that may still be in use as
the request is reset for reuse.
Quo
== Series Details ==
Series: drm: mmap fixups (rev2)
URL : https://patchwork.freedesktop.org/series/69820/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d9012f9c233a drm: call drm_gem_object_funcs.mmap with fake offset
-:10: ERROR:GIT_COMMIT_ID: Please use git commit descriptio
Tested on qemu, with bochs (vram helpers) and cirrus (shmem helpers).
Cc'ing intel-gfx for CI coverage.
Gerd Hoffmann (2):
drm: call drm_gem_object_funcs.mmap with fake offset
drm: share address space for dma bufs
include/drm/drm_gem.h | 4 +---
drivers/gpu/drm/amd/amdg
Use the shared address space of the drm device (see drm_open() in
drm_file.c) for dma-bufs too. That removes a difference betweem drm
device mmap vmas and dma-buf mmap vmas and fixes corner cases like
dropping ptes (using madvise(DONTNEED) for example) not working
properly.
Also remove amdgpu dri
The fake offset is going to stay, so change the calling convention for
drm_gem_object_funcs.mmap to include the fake offset. Update all users
accordingly.
Note that this reverts 83b8a6f242ea ("drm/gem: Fix mmap fake offset
handling for drm_gem_object_funcs.mmap") and on top then adds the fake
off
== Series Details ==
Series: drm/i915/uc: Extra info notice about FW version mis-match vs overrides
(rev2)
URL : https://patchwork.freedesktop.org/series/69791/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7394_full -> Patchwork_15365_full
===
On Thu, Nov 21, 2019 at 04:42:10PM +, Ruhl, Michael J wrote:
> >-Original Message-
> >From: Intel-gfx On Behalf Of Gerd
> >Hoffmann
> >Sent: Thursday, November 21, 2019 5:38 AM
> >To: dri-de...@lists.freedesktop.org
> >Cc: David Airlie ; intel-gfx@lists.freedesktop.org; open
> >list
>
== Series Details ==
Series: series starting with [1/3] drm/i915/bios: do not discard address space
URL : https://patchwork.freedesktop.org/series/69790/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7394_full -> Patchwork_15364_full
===
== Series Details ==
Series: Wa_1604555607 implementation and verification skip (rev6)
URL : https://patchwork.freedesktop.org/series/69763/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7402 -> Patchwork_15387
Summary
== Series Details ==
Series: drm/i915/guc: CTB improvements
URL : https://patchwork.freedesktop.org/series/69788/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7394_full -> Patchwork_15363_full
Summary
---
**SUCCESS*
Implements the Wa_1604555607 and skips its verification as the FF_MODE2
register is write only till TGL B0.
Michel Thierry (1):
drm/i915/tgl: Implement Wa_1604555607
drivers/gpu/drm/i915/gt/intel_workarounds.c | 34 ++---
drivers/gpu/drm/i915/i915_reg.h | 4 +++
2
From: Michel Thierry
Implement Wa_1604555607 (set the DS pairing timer to 128 cycles).
FF_MODE2 is part of the register state context, that's why it is
implemented here.
At TGL A0 stepping, FF_MODE2 register read back is broken, hence
disabling the WA verification.
v2: Rebased on top of the WA
Hi,
Yesterday Alex reported one windows guest failure with older windows
driver version that was missed in our validation, as newer windows
driver version doesn't use MI_ATOMIC to trigger the issue. This one
fixes the failure.
I'm not sure if this can still catch up 5.4, but it's cc stable anywa
On 2019-11-21 at 10:29:09 -0800, Lucas De Marchi wrote:
> On Thu, Nov 21, 2019 at 04:42:31PM +0530, Ramalingam C wrote:
> > + /* Wa_1604555607:tgl */
> > + val = intel_uncore_read(engine->uncore, FF_MODE2);
> > + val &= ~FF_MODE2_TDS_TIMER_MASK;
> > + val |= FF_MODE2_TDS_TIMER_128;
> > +
== Series Details ==
Series: series starting with [1/3] drm/i915/display: Refactor
intel_commit_modeset_disables()
URL : https://patchwork.freedesktop.org/series/69787/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7393_full -> Patchwork_15362_full
===
== Series Details ==
Series: drm/i915: Disable display interrupts during SDE IRQ handler
URL : https://patchwork.freedesktop.org/series/69786/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7393_full -> Patchwork_15361_full
On Thu, 2019-11-21 at 23:30 +, Chris Wilson wrote:
> Use our more regular igt_flush_test() to bind the wait-for-idle and
> error out instead of waiting around forever on critical failure.
>
> Signed-off-by: Chris Wilson
> Cc: Tvrtko Ursulin
Yeah, seems like a better approach here. Should we
On Thu, Nov 21, 2019 at 04:13:25PM -0800, Matthew Brost wrote:
On Thu, Nov 21, 2019 at 12:43:26PM +0100, Michal Wajdeczko wrote:
On Thu, 21 Nov 2019 00:56:02 +0100, wrote:
From: Matthew Brost
Add non blocking CTB send fuction, intel_guc_send_nb. In order to
support a non blocking CTB send f
On Thu, Nov 21, 2019 at 07:56:07AM -0800, Matthew Brost wrote:
On Thu, Nov 21, 2019 at 12:58:50PM +0100, Michal Wajdeczko wrote:
On Thu, 21 Nov 2019 00:56:03 +0100, wrote:
From: Matthew Brost
CTB writes are now in the path of command submission and should be
optimized for performance. Rathe
Reference:
https://bugs.freedesktop.org/show_bug.cgi?id=112126
The issue we hit is the GPU keeps very high load after running
the subtest min-max-config-loaded.
Some background of the issue:
Currently the rps is not fully enabled yet on TGL, and running
the subtest min-max-config-loaded will hit
On Thu, 2019-11-21 at 10:28 +0100, Daniel Vetter wrote:
> On Thu, Nov 21, 2019 at 9:26 AM Timo Aaltonen
> wrote:
> > On 9.10.2019 18.50, Daniel Vetter wrote:
> > > On Thu, Oct 03, 2019 at 11:31:25AM -0700, Juston Li wrote:
> > > > From: Daniel Stone
> > > >
> > > > getfb2 allows us to pass multi
== Series Details ==
Series: drm/i915/selftests: Always hold a reference on a waited upon request
(rev2)
URL : https://patchwork.freedesktop.org/series/69759/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7393_full -> Patchwork_15360_full
=
Quoting Patchwork (2019-11-22 00:50:24)
> == Series Details ==
>
> Series: drm/i915/selftests: add basic selftests for rc6 (rev2)
> URL : https://patchwork.freedesktop.org/series/69825/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_7401 -> Patchwork_15386
> =
== Series Details ==
Series: drm/i915/selftests: add basic selftests for rc6 (rev2)
URL : https://patchwork.freedesktop.org/series/69825/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7401 -> Patchwork_15386
Summary
---
Deferred rcu work is tricky to pin down and encourage to run, so try
again..
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112277
Signed-off-by: Chris Wilson
---
tests/i915/gem_ctx_persistence.c | 21 -
1 file changed, 12 insertions(+), 9 deletions(-)
diff --git a/t
On Thu, Nov 21, 2019 at 12:43:26PM +0100, Michal Wajdeczko wrote:
On Thu, 21 Nov 2019 00:56:02 +0100, wrote:
From: Matthew Brost
Add non blocking CTB send fuction, intel_guc_send_nb. In order to
support a non blocking CTB send fuction a spin lock is needed to
2x typos
protect the CTB des
Quoting Chris Wilson (2019-11-22 00:16:27)
> From: Andi Shyti
>
> Add three basic tests for rc6 power status:
>
> 1. live_rc6_basic - simply checks if rc6 works when it's enabled
>or stops when it's disabled.
>
> 2. live_rc6_threshold - rc6 should not work when the evaluation
>interval
== Series Details ==
Series: drm/i915/gem: Reduce flush_ggtt() from a wait-for-idle to a mere
barrier flush (rev3)
URL : https://patchwork.freedesktop.org/series/69752/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7393_full -> Patchwork_15357_full
===
From: Andi Shyti
Add three basic tests for rc6 power status:
1. live_rc6_basic - simply checks if rc6 works when it's enabled
or stops when it's disabled.
2. live_rc6_threshold - rc6 should not work when the evaluation
interval is less than the threshold and should work otherwise.
3. liv
== Series Details ==
Series: drm/i915/selftests: Shorten infinite wait for sseu
URL : https://patchwork.freedesktop.org/series/69853/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7401 -> Patchwork_15385
Summary
---
> -Original Message-
> From: Chris Wilson
> Sent: Thursday, November 21, 2019 3:45 PM
> To: Tang, CQ ; intel-gfx@lists.freedesktop.org
> Cc: igt-...@lists.freedesktop.org
> Subject: RE: [Intel-gfx] [PATCH i-g-t 5/9] i915/gem_ctx_isolation: Check
> engine relative registers
>
> Quoting T
Quoting Tang, CQ (2019-11-21 21:07:13)
>
>
> > -Original Message-
> > From: Intel-gfx On Behalf Of
> > Chris Wilson
> > Sent: Wednesday, November 13, 2019 4:53 AM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: igt-...@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH i-g-t 5/9] i915
Use our more regular igt_flush_test() to bind the wait-for-idle and
error out instead of waiting around forever on critical failure.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
== Series Details ==
Series: drm/i915: Extend reset modparam to domain resets
URL : https://patchwork.freedesktop.org/series/69773/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7393_full -> Patchwork_15354_full
Summary
---
== Series Details ==
Series: series starting with [1/3] drm/i915/display: Refactor
intel_commit_modeset_disables() (rev2)
URL : https://patchwork.freedesktop.org/series/69787/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7401 -> Patchwork_15384
==
On TGL the blending of all the streams have moved from DDI to
transcoder, so now every transcoder working over the same MST port must
send its stream to a master transcoder and master will send to DDI
respecting the time slots.
A previous approach was using the lowest pipe/transcoder as master
tra
> -Original Message-
> From: Intel-gfx On Behalf Of
> Chris Wilson
> Sent: Wednesday, November 13, 2019 4:53 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: igt-...@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH i-g-t 5/9] i915/gem_ctx_isolation: Check engine
> relative registers
>
== Series Details ==
Series: drm/i915: Disable display interrupts during SDE IRQ handler (rev3)
URL : https://patchwork.freedesktop.org/series/69786/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7401 -> Patchwork_15383
Sum
Quoting Michal Wajdeczko (2019-11-21 19:10:46)
> On Thu, 21 Nov 2019 19:05:25 +0100, Chris Wilson
> wrote:
>
> > Quoting Michal Wajdeczko (2019-11-21 17:58:50)
> >> Today VGT implements GGTT ballooning on its own, using some private
> >> static structure to hold info about reserved GGTT nodes a
From: Clint Taylor
During the Display Interrupt Service routine the Display Interrupt
Enable bit must be disabled, The interrupts handled, then the
Display Interrupt Enable bit must be set to prevent possible missed
interrupts.
Bspec: 49212
V2: Change Title to remove SDE reference.
V3: Fix TAB s
== Series Details ==
Series: Revert "drm/i915: disable set/get_tiling ioctl on gen12+"
URL : https://patchwork.freedesktop.org/series/69845/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7401 -> Patchwork_15382
Summary
Chris Wilson writes:
> Restore the DRI2/DRI3 uABI backchannel that was removed by ab016914984e
> ("drm/i915: disable set/get_tiling ioctl on gen12+") before the ABI
> change was agreed upon.
>
> Fixes: ab016914984e ("drm/i915: disable set/get_tiling ioctl on gen12+")
> Signed-off-by: Chris Wilson
On Thu, 21 Nov 2019 19:05:25 +0100, Chris Wilson
wrote:
Quoting Michal Wajdeczko (2019-11-21 17:58:50)
Today VGT implements GGTT ballooning on its own, using some private
static structure to hold info about reserved GGTT nodes and then
manually update vm.reserved size owned by i915_ggtt.
As
== Series Details ==
Series: Revert "drm/i915: disable set/get_tiling ioctl on gen12+"
URL : https://patchwork.freedesktop.org/series/69845/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
881605b45eb1 Revert "drm/i915: disable set/get_tiling ioctl on gen12+"
-:6: ERROR:GIT_COMMI
== Series Details ==
Series: drm/i915/ggtt: Move ballooning support to i915_ggtt
URL : https://patchwork.freedesktop.org/series/69844/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7401 -> Patchwork_15381
Summary
---
On Thu, Nov 21, 2019 at 03:09:03PM +0200, Jani Nikula wrote:
On Wed, 20 Nov 2019, Lucas De Marchi wrote:
The unaligned ioread32() will make us read byte by byte looking for the
vbt. We could just as well have done a ioread8() + a shift and avoid the
extra confusion on how we are looking for "$V
== Series Details ==
Series: drm/i915: Disable display interrupts during SDE IRQ handler (rev2)
URL : https://patchwork.freedesktop.org/series/69786/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7401 -> Patchwork_15380
Sum
On Thu, Nov 21, 2019 at 06:11:01PM +, Chris Wilson wrote:
Restore the DRI2/DRI3 uABI backchannel that was removed by ab016914984e
("drm/i915: disable set/get_tiling ioctl on gen12+") before the ABI
change was agreed upon.
Fixes: ab016914984e ("drm/i915: disable set/get_tiling ioctl on gen12+
On Thu, Nov 21, 2019 at 04:42:31PM +0530, Ramalingam C wrote:
+ /* Wa_1604555607:tgl */
+ val = intel_uncore_read(engine->uncore, FF_MODE2);
+ val &= ~FF_MODE2_TDS_TIMER_MASK;
+ val |= FF_MODE2_TDS_TIMER_128;
+ __wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_M
Restore the DRI2/DRI3 uABI backchannel that was removed by ab016914984e
("drm/i915: disable set/get_tiling ioctl on gen12+") before the ABI
change was agreed upon.
Fixes: ab016914984e ("drm/i915: disable set/get_tiling ioctl on gen12+")
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
---
driver
== Series Details ==
Series: drm/i915: Disable display interrupts during SDE IRQ handler (rev2)
URL : https://patchwork.freedesktop.org/series/69786/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d520597cf27d drm/i915: Disable display interrupts during display IRQ handler
-:30:
== Series Details ==
Series: series starting with [1/5] drm/i915: Use a ctor for TYPESAFE_BY_RCU
i915_request (rev2)
URL : https://patchwork.freedesktop.org/series/69834/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7401 -> Patchwork_15379
===
Quoting Michal Wajdeczko (2019-11-21 17:58:50)
> Today VGT implements GGTT ballooning on its own, using some private
> static structure to hold info about reserved GGTT nodes and then
> manually update vm.reserved size owned by i915_ggtt.
>
> As i915_ggtt already manages some custom reserved nodes
Today VGT implements GGTT ballooning on its own, using some private
static structure to hold info about reserved GGTT nodes and then
manually update vm.reserved size owned by i915_ggtt.
As i915_ggtt already manages some custom reserved nodes (like uc_fw)
move VGT ballooning support to i915_ggtt an
== Series Details ==
Series: series starting with [1/5] drm/i915: Use a ctor for TYPESAFE_BY_RCU
i915_request (rev2)
URL : https://patchwork.freedesktop.org/series/69834/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
07c0e3c04af1 drm/i915: Use a ctor for TYPESAFE_BY_RCU i915_r
From: Clint Taylor
During the Display Interrupt Service routine the Display Interrupt
Enable bit must be disabled, The interrupts handled, then the
Display Interrupt Enable bit must be set to prevent possible missed
interrupts.
Bspec: 49212
Cc: Lucas De Marchi
Cc: Aditya Swarup
Reviewed-by: M
== Series Details ==
Series: series starting with [1/2] drm/i915: Serialise with remote retirement
URL : https://patchwork.freedesktop.org/series/69757/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7390_full -> Patchwork_15347_full
In the next patch, we will introduce a new asynchronous retirement
worker, fed by execlists CS events. Here we may queue a retirement as
soon as a request is submitted to HW (and completes instantly), and we
also want to process that retirement as early as possible and cannot
afford to postpone (as
Quoting Patchwork (2019-11-21 17:00:02)
> == Series Details ==
>
> Series: series starting with [1/5] drm/i915: Use a ctor for TYPESAFE_BY_RCU
> i915_request
> URL : https://patchwork.freedesktop.org/series/69834/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_7400 -
== Series Details ==
Series: series starting with [1/5] drm/i915: Use a ctor for TYPESAFE_BY_RCU
i915_request
URL : https://patchwork.freedesktop.org/series/69834/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7400 -> Patchwork_15378
==
On Wed, Nov 20, 2019 at 03:40:20PM -0800, clinton.a.tay...@intel.com wrote:
> From: Clint Taylor
>
> During the Display Interrupt Service routine the Display Interrupt
> Enable bit must be disabled, The interrupts handled, then the
> Display Interrupt Enable bit must be set to prevent possible mi
Hi Dave and Daniel,
A special thanks to our CI and to Chris here.
https://intel-gfx-ci.01.org/tree/drm-intel-fixes/index.html
For finding and providing the quick fix for 5.4 on time to avoid
the bad corruption with fbdev mmap.
Plus other kernel oops and corruption fixes.
There was a conflict h
Quoting Tvrtko Ursulin (2019-11-21 16:30:08)
>
> On 21/11/2019 13:51, Chris Wilson wrote:
> > As we start peeking into requests for longer and longer, e.g.
> > incorporating use of spinlocks when only protected by an
> > rcu_read_lock(), we need to be careful in how we reset the request when
> > r
>-Original Message-
>From: Intel-gfx On Behalf Of Gerd
>Hoffmann
>Sent: Thursday, November 21, 2019 5:38 AM
>To: dri-de...@lists.freedesktop.org
>Cc: David Airlie ; intel-gfx@lists.freedesktop.org; open list
>; Maxime Ripard ; Gerd
>Hoffmann
>Subject: [Intel-gfx] [PATCH 2/2] drm: share ad
On 21/11/2019 16:24, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-11-21 16:17:59)
On 21/11/2019 14:53, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-11-21 14:42:56)
On 21/11/2019 13:51, Chris Wilson wrote:
In the next patch, we will introduce a new asynchronous retirement
worker, fe
On 21/11/2019 13:51, Chris Wilson wrote:
As we start peeking into requests for longer and longer, e.g.
incorporating use of spinlocks when only protected by an
rcu_read_lock(), we need to be careful in how we reset the request when
recycling and need to preserve any barriers that may still be in
Quoting Tvrtko Ursulin (2019-11-21 16:17:59)
>
> On 21/11/2019 14:53, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-11-21 14:42:56)
> >>
> >> On 21/11/2019 13:51, Chris Wilson wrote:
> >>> In the next patch, we will introduce a new asynchronous retirement
> >>> worker, fed by execlists CS e
On 21/11/2019 14:53, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-11-21 14:42:56)
On 21/11/2019 13:51, Chris Wilson wrote:
In the next patch, we will introduce a new asynchronous retirement
worker, fed by execlists CS events. Here we may queue a retirement as
soon as a request is submitte
On Thu, Nov 21, 2019 at 01:25:05PM +0100, Michal Wajdeczko wrote:
On Thu, 21 Nov 2019 00:56:04 +0100, wrote:
From: Matthew Brost
With the introduction of non-blocking CTBs more than one CTB can be in
flight at a time. Increasing the size of the CTBs should reduce how
often software hits the
== Series Details ==
Series: series starting with [1/5] drm/i915: Use a ctor for TYPESAFE_BY_RCU
i915_request
URL : https://patchwork.freedesktop.org/series/69834/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
0ed3e65f09c1 drm/i915: Use a ctor for TYPESAFE_BY_RCU i915_request
== Series Details ==
Series: drm/i915: Mark intel_wakeref_get() as a sleeper (rev3)
URL : https://patchwork.freedesktop.org/series/69776/
State : failure
== Summary ==
Applying: drm/i915: Mark intel_wakeref_get() as a sleeper
Using index info to reconstruct a base tree...
M drivers/gpu/d
On Thu, Nov 21, 2019 at 12:58:50PM +0100, Michal Wajdeczko wrote:
On Thu, 21 Nov 2019 00:56:03 +0100, wrote:
From: Matthew Brost
CTB writes are now in the path of command submission and should be
optimized for performance. Rather than reading CTB descriptor values
(e.g. head, tail, size) whi
== Series Details ==
Series: drm/i915/selftests: add basic selftests for rc6
URL : https://patchwork.freedesktop.org/series/69825/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boo
== Series Details ==
Series: drm/i915/selftests: add basic selftests for rc6
URL : https://patchwork.freedesktop.org/series/69825/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7400 -> Patchwork_15376
Summary
---
**F
Quoting Mika Kuoppala (2019-11-21 15:19:30)
> +static int is_platform_gen9(void)
> +{
> + const char * const id_file =
> + "/sys/bus/pci/drivers/i915/:00:02.0/device";
I still suggest we use I915_PARAM_CHIPSET_ID to avoid reliance on sysfs
here.
> + char idstr[32] =
Chris Wilson writes:
> Quoting Mika Kuoppala (2019-11-21 15:19:30)
>> +/*
>> + * Can be compiled with:
>> + * gcc -Wall -static -o cve-2019-0155 cve-2019-0155.c
>> +*/
>
> -pedantic ? :)
Seems to work if that's your thing! :)
-Mika
> -Chris
___
Intel-
Quoting Mika Kuoppala (2019-11-21 15:19:30)
> +/*
> + * Can be compiled with:
> + * gcc -Wall -static -o cve-2019-0155 cve-2019-0155.c
> +*/
-pedantic ? :)
-Chris
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== Series Details ==
Series: drm/i915: Use a ctor for TYPESAFE_BY_RCU i915_request
URL : https://patchwork.freedesktop.org/series/69824/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7400 -> Patchwork_15375
Summary
---
Add vulnerability checker for cve-2019-0155
v2: sync, bailout early if no parser (Chris)
Cc: Chris Wilson
Cc: Jon Bloomfield
Cc: Joonas Lahtinen
References: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2019-0155
References:
https://www.intel.com/content/www/us/en/security-center/advisory
== Series Details ==
Series: Wa_1604555607 implementation and verification skip (rev5)
URL : https://patchwork.freedesktop.org/series/69763/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7400 -> Patchwork_15374
Summary
Quoting Tvrtko Ursulin (2019-11-21 14:42:56)
>
> On 21/11/2019 13:51, Chris Wilson wrote:
> > In the next patch, we will introduce a new asynchronous retirement
> > worker, fed by execlists CS events. Here we may queue a retirement as
> > soon as a request is submitted to HW (and completes instant
On 21/11/2019 13:51, Chris Wilson wrote:
In the next patch, we will introduce a new asynchronous retirement
worker, fed by execlists CS events. Here we may queue a retirement as
soon as a request is submitted to HW (and completes instantly), and we
also want to process that retirement as early a
== Series Details ==
Series: Wa_1604555607 implementation and verification skip (rev5)
URL : https://patchwork.freedesktop.org/series/69763/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
efed46cc8be6 drm/i915/tgl: Implement Wa_1604555607
-:88: ERROR:SPACING: spaces required aro
On 21/11/2019 13:51, Chris Wilson wrote:
The major drawback of commit 7e34f4e4aad3 ("drm/i915/gen8+: Add RC6 CTX
corruption WA") is that it disables RC6 while Skylake (and friends) is
active, and we do not consider the GPU idle until all outstanding
requests have been retired and the engine swit
On Thu, Nov 21, 2019 at 02:52:59PM +0100, Daniel Vetter wrote:
> On Thu, Nov 21, 2019 at 11:38:06AM +0100, Gerd Hoffmann wrote:
> > The fake offset is going to stay, so change the calling convention for
> > drm_gem_object_funcs.mmap to include the fake offset. Update all users
> > accordingly.
>
On Thu, Nov 21, 2019 at 11:38:07AM +0100, Gerd Hoffmann wrote:
> Use the shared address space of the drm device (see drm_open() in
> drm_file.c) for dma-bufs too. That removes a difference betweem drm
> device mmap vmas and dma-buf mmap vmas and fixes corner cases like
> unmaps not working properl
On Thu, Nov 21, 2019 at 11:38:06AM +0100, Gerd Hoffmann wrote:
> The fake offset is going to stay, so change the calling convention for
> drm_gem_object_funcs.mmap to include the fake offset. Update all users
> accordingly.
Please add to the commit message:
Note that this reverts 83b8a6f242ea ("
Bonded request submission is designed to allow requests to execute in
parallel as laid out by the user. If the master request is already
finished before its bonded pair is submitted, the pair were not destined
to run in parallel and we lose the information about the master engine
to dictate selecti
Whenever we wait on a request, make sure we actually hold a reference to
it and that it cannot be retired/freed on another CPU!
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 87 +++---
1 file changed, 66 insertions(+), 21 deletions(-)
diff --git a/
The major drawback of commit 7e34f4e4aad3 ("drm/i915/gen8+: Add RC6 CTX
corruption WA") is that it disables RC6 while Skylake (and friends) is
active, and we do not consider the GPU idle until all outstanding
requests have been retired and the engine switched over to the kernel
context. If userspac
In the next patch, we will introduce a new asynchronous retirement
worker, fed by execlists CS events. Here we may queue a retirement as
soon as a request is submitted to HW (and completes instantly), and we
also want to process that retirement as early as possible and cannot
afford to postpone (as
As we start peeking into requests for longer and longer, e.g.
incorporating use of spinlocks when only protected by an
rcu_read_lock(), we need to be careful in how we reset the request when
recycling and need to preserve any barriers that may still be in use as
the request is reset for reuse.
Sig
== Series Details ==
Series: drm/i915: Enable second dbuf slice for ICL and TGL (rev6)
URL : https://patchwork.freedesktop.org/series/69124/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7389_full -> Patchwork_15346_full
Su
Quoting Lionel Landwerlin (2019-11-21 13:18:47)
> On 12/11/2019 11:28, Chris Wilson wrote:
> > Use the per-engine sysfs directory to let userspace discover the
> > mmio_base of each engine. Prior to recent generations, the user
> > accessible registers on each engine are at a fixed offset relative
Quoting Andi Shyti (2019-11-21 12:57:47)
> Add three basic tests for rc6 power status:
>
> 1. live_rc6_basic - simply checks if rc6 works when it's enabled
>or stops when it's disabled.
>
> 2. live_rc6_threshold - rc6 should not work when the evaluation
>interval is less than the threshol
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