Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Enable second DBuf slice for ICL and TGL (rev21)

2020-01-26 Thread Lisovskiy, Stanislav
Good morning :) Yet another gem related issue not caused by this patch.. Best Regards, Lisovskiy Stanislav Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo From: Patchwork Sent: Sunday, January 26, 2020 11:19:53 AM To: Lisovskiy,

Re: [Intel-gfx] [PATCH i-g-t] tests/dumb_buffer: Try to compute the largest possible dumb buffer

2020-01-26 Thread Ramalingam C
On 2020-01-23 at 12:27:11 +, Chris Wilson wrote: > For our threaded clear test, we want to create as many buffers as can > fit into the available memory. However, since we don't know the size of > that available memory, it can be easy to create too large or too many > buffers, and waste our

Re: [Intel-gfx] [PATCH] drm/i915/perf: Fix OA context id overlap with idle context id

2020-01-26 Thread Umesh Nerlige Ramappa
On Sat, Jan 25, 2020 at 03:37:38AM +0200, Lionel Landwerlin wrote: On 24/01/2020 03:37, Umesh Nerlige Ramappa wrote: Engine context pinned in perf OA was set to same context id as the idle context. Set the context id to an unused value. Clear the sw context id field in lrc descriptor before

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Flush engine parking before release

2020-01-26 Thread Patchwork
== Series Details == Series: drm/i915/gt: Flush engine parking before release URL : https://patchwork.freedesktop.org/series/72540/ State : success == Summary == CI Bug Log - changes from CI_DRM_7810_full -> Patchwork_16257_full Summary

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/vbt: Fix the timing parameters

2020-01-26 Thread Patchwork
== Series Details == Series: drm/i915/vbt: Fix the timing parameters URL : https://patchwork.freedesktop.org/series/72534/ State : success == Summary == CI Bug Log - changes from CI_DRM_7810_full -> Patchwork_16256_full Summary ---

Re: [Intel-gfx] [PATCH 2/7] drm/i915/guc: Kill USES_GUC_SUBMISSION macro

2020-01-26 Thread kbuild test robot
Hi Daniele, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [cannot apply to drm-tip/drm-tip v5.5-rc7 next-20200124] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: mass conversion to intel_de_*() register accessors

2020-01-26 Thread Patchwork
== Series Details == Series: drm/i915/display: mass conversion to intel_de_*() register accessors URL : https://patchwork.freedesktop.org/series/72533/ State : success == Summary == CI Bug Log - changes from CI_DRM_7809_full -> Patchwork_16255_full

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm: Release filp before global lock (rev2)

2020-01-26 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm: Release filp before global lock (rev2) URL : https://patchwork.freedesktop.org/series/72530/ State : success == Summary == CI Bug Log - changes from CI_DRM_7809_full -> Patchwork_16254_full

[Intel-gfx] [PATCH] drm/i915/display: Squelch kerneldoc complaints

2020-01-26 Thread Chris Wilson
drivers/gpu/drm/i915/display/intel_atomic.c:185: warning: Function parameter or member 'state' not described in 'intel_connector_needs_modeset' drivers/gpu/drm/i915/display/intel_atomic.c:185: warning: Function parameter or member 'connector' not described in 'intel_connector_needs_modeset'

[Intel-gfx] [PATCH] drm/i915: Restore the kernel context after verifying the w/a

2020-01-26 Thread Chris Wilson
As a safety net, flush the engine verifications and restore the kernel context. Closes: https://gitlab.freedesktop.org/drm/intel/issues/971 Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt.c | 4 1 file changed, 4 insertions(+) diff --git

[Intel-gfx] [PATCH] drm/i915: Restore the kernel context after verifying the w/a

2020-01-26 Thread Chris Wilson
As a safety net, flush the engine verifications and restore the kernel context. Closes: https://gitlab.freedesktop.org/drm/intel/issues/971 Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_gt.c | 4 drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 -- 2 files changed,

Re: [Intel-gfx] [PATCH] drm/i915/huc: Fix error reported by I915_PARAM_HUC_STATUS

2020-01-26 Thread Michal Wajdeczko
On Thu, 23 Jan 2020 16:51:58 +0100, Chris Wilson wrote: Quoting Michal Wajdeczko (2020-01-23 15:38:52) On Thu, 23 Jan 2020 16:02:17 +0100, Chris Wilson wrote: > Quoting Daniele Ceraolo Spurio (2020-01-22 23:52:33) >> >> >> On 1/22/20 11:48 AM, Michal Wajdeczko wrote: >> > From commit

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Tighten atomicity of i915_active_acquire vs i915_active_release

2020-01-26 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Tighten atomicity of i915_active_acquire vs i915_active_release URL : https://patchwork.freedesktop.org/series/72523/ State : success == Summary == CI Bug Log - changes from CI_DRM_7809_full -> Patchwork_16251_full

[Intel-gfx] [PATCH i-g-t 1/2] i915: Inject invalid CS into hanging spinners

2020-01-26 Thread Chris Wilson
Some spinners are used with the intent of never ending and being declared hung by the kernel. In some cases, these are being used to simulate invalid payloads and so we can use an invalid command to trigger a GPU hang. (Other cases, they are simulating infinite workloads that truly never end, but

[Intel-gfx] [PATCH i-g-t 2/2] i915_pm_rps: Be wary if RP0 == RPn

2020-01-26 Thread Chris Wilson
If the HW min/max frequencies are the same, there is not much range to deal with and a couple of our invalid tests become confused as they are actually no-ops. Error reporting in i915_pm_rps is rudimentary and we deserve better. Closes: https://gitlab.freedesktop.org/drm/intel/issues/1008

[Intel-gfx] ✗ Fi.CI.BUILD: warning for series starting with [1/6] drm/i915: Remove 'prefault_disable' modparam

2020-01-26 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915: Remove 'prefault_disable' modparam URL : https://patchwork.freedesktop.org/series/72586/ State : warning == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh CHK

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/6] drm/i915: Remove 'prefault_disable' modparam

2020-01-26 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915: Remove 'prefault_disable' modparam URL : https://patchwork.freedesktop.org/series/72586/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7814 -> Patchwork_16270

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915: Remove 'prefault_disable' modparam

2020-01-26 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915: Remove 'prefault_disable' modparam URL : https://patchwork.freedesktop.org/series/72586/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4c84192ef497 drm/i915: Remove 'prefault_disable' modparam be5725649262

[Intel-gfx] [PATCH 4/6] drm/i915/gt: Acquire ce->active before ce->pin_count/ce->pin_mutex

2020-01-26 Thread Chris Wilson
<0> [198.668822] gem_exec-12460 193899010us : timeline_advance: timeline_advance:387 GEM_BUG_ON(!atomic_read(>pin_count)) <0> [198.668859] - <4> [198.669619] [ cut here ] <2> [198.669621] kernel BUG at

[Intel-gfx] [PATCH 5/6] drm/i915/gt: Yield the timeslice if caught waiting on a user semaphore

2020-01-26 Thread Chris Wilson
If we find ourselves waiting on a MI_SEMAPHORE_WAIT, either within the user batch or in our own preamble, the engine raises a GT_WAIT_ON_SEMAPHORE interrupt. We can unmask that interrupt and so respond to a semaphore wait by yielding the timeslice, if we have another context to yield to! The only

[Intel-gfx] [PATCH 1/6] drm/i915: Remove 'prefault_disable' modparam

2020-01-26 Thread Chris Wilson
The 'prefault_disable' modparam was used by IGT to prevent a few prefaulting operations to make fault handling under struct_mutex more prominent. With the removal of struct_mutex, this is not as important any more and we have almost completely stopped using the parameter. The remaining use in

[Intel-gfx] [PATCH 6/6] drm/i915/gt: Hook up CS_MASTER_ERROR_INTERRUPT

2020-01-26 Thread Chris Wilson
Now that we have offline error capture and can reset an engine from inside an atomic context while also preserving the GPU state for post-mortem analysis, it is time to handle error interrupts thrown by the command parser. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin ---

[Intel-gfx] [PATCH 2/6] drm/i915: Check current i915_vma.pin_count status first on unbind

2020-01-26 Thread Chris Wilson
Do an early rejection of a i915_vma_unbind() attempt if the i915_vma is currently pinned, without waiting to see if the inflight operations may unpin it. We see this problem with the shrinker trying to unbind the active vma from inside its bind worker: <6> [472.618968] Workqueue: events_unbound

[Intel-gfx] [PATCH 3/6] drm/i915: Tighten atomicity of i915_active_acquire vs i915_active_release

2020-01-26 Thread Chris Wilson
As we use a mutex to serialise the first acquire (as it may be a lengthy operation), but only an atomic decrement for the release, we have to be careful in case a second thread races and completes both acquire/release as the first finishes its acquire. Thread AThread B

[Intel-gfx] ✗ Fi.CI.IGT: failure for Enable second DBuf slice for ICL and TGL (rev21)

2020-01-26 Thread Patchwork
== Series Details == Series: Enable second DBuf slice for ICL and TGL (rev21) URL : https://patchwork.freedesktop.org/series/70059/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7806_full -> Patchwork_16248_full Summary