== Series Details ==
Series: drm/i915/fbc: __intel_fbc_cleanup_cfb() may be called multiple times
URL : https://patchwork.freedesktop.org/series/72775/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7844_full -> Patchwork_16337_full
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915/tgl:
WaEnablePreemptionGranularityControlByUMD
URL : https://patchwork.freedesktop.org/series/72769/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7842_full -> Patchwork_16333_full
== Series Details ==
Series: drm/i915/execlists: Skip preemption-timeout for lite restores
URL : https://patchwork.freedesktop.org/series/72768/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7842_full -> Patchwork_16331_full
== Series Details ==
Series: drm/i915/display: conversion to drm_device based logging macros (rev2)
URL : https://patchwork.freedesktop.org/series/72760/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7842_full -> Patchwork_16330_full
== Series Details ==
Series: drm/i915: Move ringbuffer WAs to engine workaround list (rev3)
URL : https://patchwork.freedesktop.org/series/72864/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7854 -> Patchwork_16378
From: Daniele Ceraolo Spurio
Now that intel_engine_apply_workarounds is called on all gens, we can
use the engine workaround lists for pre-gen8 workarounds as well to be
consistent in the way we handle and dump the WAs.
v2: Ignore the sanity check of MI_MODE on Broadwater, for whatever reason
== Series Details ==
Series: drm/i915: Move ringbuffer WAs to engine workaround list (rev2)
URL : https://patchwork.freedesktop.org/series/72864/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7854 -> Patchwork_16377
Quoting Michal Wajdeczko (2020-02-01 13:52:31)
> void intel_guc_ct_init_early(struct intel_guc_ct *ct)
> {
> + int i;
> +
> spin_lock_init(>requests.lock);
> INIT_LIST_HEAD(>requests.pending);
> INIT_LIST_HEAD(>requests.incoming);
>
Quoting Jani Nikula (2020-02-01 12:36:46)
> On Sat, 01 Feb 2020, Chris Wilson wrote:
> > If the display is not driving any pipes, we cannot change the bclk and
> > doing so risks chasing NULL pointers:
>
> Does this mean we can't probe hda if there are no displays attached at
> boot on GLK?
We
== Series Details ==
Series: drm/mst: Fix possible NULL pointer dereference in
drm_dp_mst_process_up_req()
URL : https://patchwork.freedesktop.org/series/72752/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7840_full -> Patchwork_16326_full
== Series Details ==
Series: drm/i915/guc: Stop using mutex while sending CTB messages (rev2)
URL : https://patchwork.freedesktop.org/series/72827/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7854 -> Patchwork_16376
== Series Details ==
Series: drm/i915/guc: Stop using mutex while sending CTB messages (rev2)
URL : https://patchwork.freedesktop.org/series/72827/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b71663451270 drm/i915/guc: Stop using mutex while sending CTB messages
-:352:
While we are always using CT "send" buffer to send request messages
to GuC, we usually don't ask GuC to use CT "receive" buffer to send
back response messages, since almost all returned data can fit into
reserved bits in status dword inside CT descriptor. However, relying
on data modifications
On Fri, 31 Jan 2020, Gwan-gyeong Mun wrote:
> When receiving video it is very useful to be able to log DP VSC SDP.
> This greatly simplifies debugging.
Seems like a lot of the functions should really be in drm core.
BR,
Jani.
>
> Signed-off-by: Gwan-gyeong Mun
> ---
>
On Sat, 01 Feb 2020, Chris Wilson wrote:
> If the display is not driving any pipes, we cannot change the bclk and
> doing so risks chasing NULL pointers:
Does this mean we can't probe hda if there are no displays attached at
boot on GLK?
BR,
Jani.
>
> <6> [278.907105] snd_hda_intel
== Series Details ==
Series: drm/i915/display: Defer application of initial chv_phy_control
URL : https://patchwork.freedesktop.org/series/72865/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7854 -> Patchwork_16375
== Series Details ==
Series: drm/i915/display: Defer application of initial chv_phy_control
URL : https://patchwork.freedesktop.org/series/72865/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8990b6f1d100 drm/i915/display: Defer application of initial chv_phy_control
-:12:
== Series Details ==
Series: drm/i915: Move ringbuffer WAs to engine workaround list
URL : https://patchwork.freedesktop.org/series/72864/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7854 -> Patchwork_16374
Summary
== Series Details ==
Series: drm/i915/audio: Skip the cdclk modeset if no pipes attached
URL : https://patchwork.freedesktop.org/series/72863/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7854 -> Patchwork_16373
Summary
To write to the DISPLAY_PHY_CONTROL requires holding the powerwells,
which during early resume we have not yet acquired until later in
intel_display_power_init_hw(). So compute the initial chv_phy_control,
but leave the HW unset until we first acquire the powerwell.
<7> [120.055984] i915
== Series Details ==
Series: drm/i915/audio: Skip the cdclk modeset if no pipes attached
URL : https://patchwork.freedesktop.org/series/72863/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
74fe991ad914 drm/i915/audio: Skip the cdclk modeset if no pipes attached
-:9:
== Series Details ==
Series: series starting with [1/3] drm/i915: Initialise basic fence before
acquiring seqno
URL : https://patchwork.freedesktop.org/series/72862/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7854 -> Patchwork_16372
== Series Details ==
Series: drm/i915: add extra slice common debug registers
URL : https://patchwork.freedesktop.org/series/72735/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7838_full -> Patchwork_16318_full
Summary
From: Daniele Ceraolo Spurio
Now that intel_engine_apply_workarounds is called on all gens, we can
use the engine workaround lists for pre-gen8 workarounds as well to be
consistent in the way we handle and dump the WAs.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Chris Wilson
Cc: Tvrtko Ursulin
If the display is not driving any pipes, we cannot change the bclk and
doing so risks chasing NULL pointers:
<6> [278.907105] snd_hda_intel :00:0e.0: DSP detected with PCI
class/subclass/prog-if info 0x040100
<6> [278.909936] snd_hda_intel :00:0e.0: bound :00:02.0 (ops
Inside the intel_timeline_get_seqno(), we currently track the retirement
of the old cachelines by listening to the new request. This requires
that the new request is ready to be used and so requires a minimum bit
of initialisation prior to getting the new seqno.
Signed-off-by: Chris Wilson
Cc:
Exercise the seqno wrap paths on the kernel context to provide a small
amount of sanity checking and ensure that they are visible to lockdep.
Signed-off-by: Chris Wilson
Cc: Maarten Lankhorst
---
drivers/gpu/drm/i915/gt/selftest_timeline.c | 177
1 file changed, 177
On seqno rollover, we need to allocate ourselves a new cacheline. This
might incur grabbing a new page and pinning it into the GGTT, with some
rather unfortunate lockdep implications.
To avoid a mutex, and more specifically pinning in the GGTT from inside
the kernel context being used to flush
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