Re: [Intel-gfx] [PATCH] lib: Add a YAML emitter

2020-02-13 Thread Jani Nikula
On Thu, 13 Feb 2020, Chris Wilson wrote: > Provide a library to generate correct YAML for use in structured debugfs > or similar information dumps. This will be useful to pull our large > information dumps into a forwards compatible, parse-able file-format by > forcing some structure upon

Re: [Intel-gfx] [PATCH 16/28] drm: i915: Call cpu_latency_qos_*() instead of pm_qos_*()

2020-02-13 Thread Jani Nikula
On Wed, 12 Feb 2020, "Rafael J. Wysocki" wrote: > From: "Rafael J. Wysocki" > > Call cpu_latency_qos_add/update/remove_request() instead of > pm_qos_add/update/remove_request(), respectively, because the > latter are going to be dropped. > > No intentional functional impact. Heh, that's

Re: [Intel-gfx] [PATCH] drm/i915/mst: fix pipe and vblank enable

2020-02-13 Thread Jani Nikula
On Mon, 10 Feb 2020, Arkadiusz Hiler wrote: > As of the 3 days worth of queued shards: > > I agree that this is unacceptable, but we can do only so much from the > CI/infra side. The time has been creeping up steadily over the last year > or so and the machines are not getting any faster. I am

[Intel-gfx] ✓ Fi.CI.IGT: success for HDCP 2.2 Comp fixes

2020-02-13 Thread Patchwork
== Series Details == Series: HDCP 2.2 Comp fixes URL : https://patchwork.freedesktop.org/series/73323/ State : success == Summary == CI Bug Log - changes from CI_DRM_7919_full -> Patchwork_16528_full Summary --- **SUCCESS** No

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: move intel_csr.[ch] under display/

2020-02-13 Thread Jani Nikula
On Tue, 11 Feb 2020, Chris Wilson wrote: > Quoting Ville Syrjälä (2020-02-11 16:29:03) >> On Tue, Feb 11, 2020 at 06:14:50PM +0200, Jani Nikula wrote: >> > The DMC firmware is about display. Move the handling under display. No >> > functional changes. >> > >> > Cc: Ville Syrjälä >> >

Re: [Intel-gfx] [CI 1/2] drm/i915: register vga switcheroo later, unregister earlier

2020-02-13 Thread Jani Nikula
On Tue, 11 Feb 2020, Jani Nikula wrote: > Move vga switcheroo and dsm handler register later in > i915_driver_register(), and unregister in i915_driver_unregister(). The > dsm handler unregister is a nop, and is only added for completeness. > > My unsubstantiated suspicion is that the vga

Re: [Intel-gfx] [PATCH] drm/i915: Cast remain to unsigned long in eb_relocate_vma

2020-02-13 Thread Jani Nikula
On Thu, 13 Feb 2020, Nathan Chancellor wrote: > A recent commit in clang added -Wtautological-compare to -Wall, which is > enabled for i915 after -Wtautological-compare is disabled for the rest > of the kernel so we see the following warning on x86_64: > >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Cast remain to unsigned long in eb_relocate_vma

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915: Cast remain to unsigned long in eb_relocate_vma URL : https://patchwork.freedesktop.org/series/73440/ State : success == Summary == CI Bug Log - changes from CI_DRM_7936 -> Patchwork_16565 Summary

[Intel-gfx] [PATCH] drm/i915: Cast remain to unsigned long in eb_relocate_vma

2020-02-13 Thread Nathan Chancellor
A recent commit in clang added -Wtautological-compare to -Wall, which is enabled for i915 after -Wtautological-compare is disabled for the rest of the kernel so we see the following warning on x86_64: ../drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1433:22: warning: result of comparison of

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Avoid choosing zero for phys_sz

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Avoid choosing zero for phys_sz URL : https://patchwork.freedesktop.org/series/73320/ State : success == Summary == CI Bug Log - changes from CI_DRM_7918_full -> Patchwork_16527_full Summary

[Intel-gfx] ✓ Fi.CI.IGT: success for i915/gem_ctx_persistence: Race context closure with replace-engines

2020-02-13 Thread Patchwork
== Series Details == Series: i915/gem_ctx_persistence: Race context closure with replace-engines URL : https://patchwork.freedesktop.org/series/73339/ State : success == Summary == CI Bug Log - changes from CI_DRM_7918_full -> IGTPW_4135_full

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/psr: Force PSR probe only after full initialization

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915/psr: Force PSR probe only after full initialization URL : https://patchwork.freedesktop.org/series/73436/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7935 -> Patchwork_16564 Summary

[Intel-gfx] [PATCH] drm/i915/psr: Force PSR probe only after full initialization

2020-02-13 Thread José Roberto de Souza
Commit 60c6a14b489b ("drm/i915/display: Force the state compute phase once to enable PSR") was forcing the state compute too earlier causing errors because not everything was initialized, so here moving to i915_driver_register() when everything is ready and driver is registering into the rest of

Re: [Intel-gfx] [PATCH v3 06/10] drm/i915/uc: Improve tracking of uC init status

2020-02-13 Thread John Harrison
On 2/13/2020 16:21, Daniele Ceraolo Spurio wrote: On 2/13/20 4:04 PM, John Harrison wrote: On 2/13/2020 15:44, Daniele Ceraolo Spurio wrote: On 2/13/20 3:36 PM, John Harrison wrote: On 2/11/2020 16:31, Daniele Ceraolo Spurio wrote: To be able to setup GuC submission functions during engine

Re: [Intel-gfx] [PATCH] drm/i915/dsc: force full modeset whenever DSC is enabled at probe

2020-02-13 Thread Sasha Levin
Hi, [This is an automated email] This commit has been processed because it contains a -stable tag. The stable tag indicates that it's relevant for the following trees: all The bot has tested the following trees: v5.5.3, v5.4.19, v4.19.103, v4.14.170, v4.9.213, v4.4.213. v5.5.3: Failed to

[Intel-gfx] ✓ Fi.CI.BAT: success for lib: Add a YAML emitter

2020-02-13 Thread Patchwork
== Series Details == Series: lib: Add a YAML emitter URL : https://patchwork.freedesktop.org/series/73433/ State : success == Summary == CI Bug Log - changes from CI_DRM_7935 -> Patchwork_16563 Summary --- **SUCCESS** No

Re: [Intel-gfx] [PATCH] drm/mm: Break long searches in fragmented address spaces

2020-02-13 Thread Chris Wilson
Quoting Andi Shyti (2020-02-11 22:56:44) > Hi Chris, > > On Fri, Feb 07, 2020 at 03:17:20PM +, Chris Wilson wrote: > > We try hard to select a suitable hole in the drm_mm first time. But if > > that is unsuccessful, we then have to look at neighbouring nodes, and > > this requires traversing

Re: [Intel-gfx] [PATCH v3 06/10] drm/i915/uc: Improve tracking of uC init status

2020-02-13 Thread Daniele Ceraolo Spurio
On 2/13/20 4:04 PM, John Harrison wrote: On 2/13/2020 15:44, Daniele Ceraolo Spurio wrote: On 2/13/20 3:36 PM, John Harrison wrote: On 2/11/2020 16:31, Daniele Ceraolo Spurio wrote: To be able to setup GuC submission functions during engine init we need to commit to using GuC as soon as

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for lib: Add a YAML emitter

2020-02-13 Thread Patchwork
== Series Details == Series: lib: Add a YAML emitter URL : https://patchwork.freedesktop.org/series/73433/ State : warning == Summary == $ dim checkpatch origin/drm-tip c15f98144f75 lib: Add a YAML emitter -:19: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS

Re: [Intel-gfx] [PATCH v3 06/10] drm/i915/uc: Improve tracking of uC init status

2020-02-13 Thread John Harrison
On 2/13/2020 15:44, Daniele Ceraolo Spurio wrote: On 2/13/20 3:36 PM, John Harrison wrote: On 2/11/2020 16:31, Daniele Ceraolo Spurio wrote: To be able to setup GuC submission functions during engine init we need to commit to using GuC as soon as possible. Currently, the only thing that can

Re: [Intel-gfx] [PATCH v3 09/10] drm/i915/uc: consolidate firmware cleanup

2020-02-13 Thread Daniele Ceraolo Spurio
On 2/13/20 3:44 PM, John Harrison wrote: On 2/11/2020 16:31, Daniele Ceraolo Spurio wrote: We are quite trigger happy in cleaning up the firmware blobs, as we do so from several error/fini paths in GuC/HuC/uC code. We do have the __uc_cleanup_firmwares cleanup function, which unwinds

Re: [Intel-gfx] [PATCH v3 06/10] drm/i915/uc: Improve tracking of uC init status

2020-02-13 Thread Daniele Ceraolo Spurio
On 2/13/20 3:36 PM, John Harrison wrote: On 2/11/2020 16:31, Daniele Ceraolo Spurio wrote: To be able to setup GuC submission functions during engine init we need to commit to using GuC as soon as possible. Currently, the only thing that can stop us from using the microcontrollers once we've

Re: [Intel-gfx] [PATCH v3 09/10] drm/i915/uc: consolidate firmware cleanup

2020-02-13 Thread John Harrison
On 2/11/2020 16:31, Daniele Ceraolo Spurio wrote: We are quite trigger happy in cleaning up the firmware blobs, as we do so from several error/fini paths in GuC/HuC/uC code. We do have the __uc_cleanup_firmwares cleanup function, which unwinds __uc_fetch_firmwares and is already called both from

Re: [Intel-gfx] [PATCH v3 07/10] drm/i915/guc: Apply new uC status tracking to GuC submission as well

2020-02-13 Thread John Harrison
On 2/11/2020 16:31, Daniele Ceraolo Spurio wrote: To be able to differentiate the before and after of our commitment to GuC submission, which will be used in follow-up patches to early set-up the submission structures. v2: move functions to guc_submission.h (Michal) Signed-off-by: Daniele

Re: [Intel-gfx] [PATCH 2/2] drm/i915: switch vlv_suspend to use intel uncore register accessors

2020-02-13 Thread Chris Wilson
Quoting Jani Nikula (2020-02-12 14:40:58) > Prefer intel_uncore_* over I915_READ, I915_WRITE, and POSTING_READ. > > Signed-off-by: Jani Nikula A couple of older checkpatch errors that could be cleaned up (pure whitespacing). Both Reviewed-by: Chris Wilson Half this code should be removed as

Re: [Intel-gfx] [PATCH v3 06/10] drm/i915/uc: Improve tracking of uC init status

2020-02-13 Thread John Harrison
On 2/11/2020 16:31, Daniele Ceraolo Spurio wrote: To be able to setup GuC submission functions during engine init we need to commit to using GuC as soon as possible. Currently, the only thing that can stop us from using the microcontrollers once we've fetched the blobs is a fundamental error

Re: [Intel-gfx] [PATCH v2] drm/i915: Disable -Wtautological-constant-out-of-range-compare

2020-02-13 Thread Nathan Chancellor
On Thu, Feb 13, 2020 at 02:43:21PM -0800, Nick Desaulniers wrote: > On Wed, Feb 12, 2020 at 9:17 AM Michel Dänzer wrote: > > > > On 2020-02-12 6:07 p.m., Nathan Chancellor wrote: > > > On Wed, Feb 12, 2020 at 09:52:52AM +0100, Michel Dänzer wrote: > > >> On 2020-02-11 9:39 p.m., Nathan Chancellor

[Intel-gfx] [PATCH] lib: Add a YAML emitter

2020-02-13 Thread Chris Wilson
Provide a library to generate correct YAML for use in structured debugfs or similar information dumps. This will be useful to pull our large information dumps into a forwards compatible, parse-able file-format by forcing some structure upon ourselves! Originally from

Re: [Intel-gfx] [PATCH v2] drm/i915: Disable -Wtautological-constant-out-of-range-compare

2020-02-13 Thread Nick Desaulniers
On Wed, Feb 12, 2020 at 9:17 AM Michel Dänzer wrote: > > On 2020-02-12 6:07 p.m., Nathan Chancellor wrote: > > On Wed, Feb 12, 2020 at 09:52:52AM +0100, Michel Dänzer wrote: > >> On 2020-02-11 9:39 p.m., Nathan Chancellor wrote: > >>> On Tue, Feb 11, 2020 at 10:41:48AM +0100, Michel Dänzer wrote:

[Intel-gfx] ✗ Fi.CI.BAT: failure for tools/Android.mk: Add zlib support

2020-02-13 Thread Patchwork
== Series Details == Series: tools/Android.mk: Add zlib support URL : https://patchwork.freedesktop.org/series/2543/ State : failure == Summary == CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp_cm.o CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hubp.o CC

Re: [Intel-gfx] [PATCH 1/1] drm/i915: MCHBAR memory info registers are moved since GEN 12.

2020-02-13 Thread Matt Roper
On Tue, Feb 11, 2020 at 10:11:42AM -0800, Caz Yokoyama wrote: > From: "Yokoyama, Caz" > > MAD_INTER_CHANNEL_0_0_0_MCHBAR: > code nameoffset DRAM_DDR_TYPE > SKL 0x5000 1:0 DDR4/DDR3/LPDDR3 > TGL 0x6048/0x6248/0xd800

Re: [Intel-gfx] [PATCH v2] drm/i915: Disable -Wtautological-constant-out-of-range-compare

2020-02-13 Thread Jani Nikula
On Thu, 13 Feb 2020, Nathan Chancellor wrote: > On Thu, Feb 13, 2020 at 04:37:15PM +0200, Jani Nikula wrote: >> On Wed, 12 Feb 2020, Michel Dänzer wrote: >> > On 2020-02-12 6:07 p.m., Nathan Chancellor wrote: >> >> On Wed, Feb 12, 2020 at 09:52:52AM +0100, Michel Dänzer wrote: >> >>> On

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915: register vga switcheroo later, unregister earlier

2020-02-13 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: register vga switcheroo later, unregister earlier URL : https://patchwork.freedesktop.org/series/73317/ State : success == Summary == CI Bug Log - changes from CI_DRM_7917_full -> Patchwork_16526_full

Re: [Intel-gfx] [PATCH v2] drm/i915: Disable -Wtautological-constant-out-of-range-compare

2020-02-13 Thread Nathan Chancellor
On Thu, Feb 13, 2020 at 04:37:15PM +0200, Jani Nikula wrote: > On Wed, 12 Feb 2020, Michel Dänzer wrote: > > On 2020-02-12 6:07 p.m., Nathan Chancellor wrote: > >> On Wed, Feb 12, 2020 at 09:52:52AM +0100, Michel Dänzer wrote: > >>> On 2020-02-11 9:39 p.m., Nathan Chancellor wrote: > On Tue,

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Proper dbuf global state

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915: Proper dbuf global state URL : https://patchwork.freedesktop.org/series/73421/ State : success == Summary == CI Bug Log - changes from CI_DRM_7934 -> Patchwork_16562 Summary --- **SUCCESS**

Re: [Intel-gfx] [PATCH v1 2/3] drm/i915/dsc: force full modeset whenever DSC is enabled at probe

2020-02-13 Thread Jani Nikula
On Thu, 13 Feb 2020, Matt Roper wrote: > On Thu, Feb 13, 2020 at 11:03:29PM +0200, Jani Nikula wrote: >> On Thu, 13 Feb 2020, Matt Roper wrote: >> > On Thu, Feb 13, 2020 at 04:04:11PM +0200, Stanislav Lisovskiy wrote: >> >> From: Jani Nikula >> >> >> >> We lack full state readout of DSC

Re: [Intel-gfx] [igt-dev] [RFC PATCH i-g-t] tests/gem_userptr_blits: Refresh map-fixed-invalidate* subtests

2020-02-13 Thread Chris Wilson
Quoting Janusz Krzysztofik (2020-02-13 16:28:50) > Hi Michał, > > On Thursday, February 13, 2020 3:37:31 PM CET Michał Winiarski wrote: > > On Thu, Feb 13, 2020 at 01:46:41PM +0100, Janusz Krzysztofik wrote: > > > map-fixed-invalidate* subtests utilize gem_set_tiling() which may fail, > > > e.g.

Re: [Intel-gfx] [PATCH v1 3/3] drm/i915: Force state->modeset=true when distrust_bios_wm==true

2020-02-13 Thread Matt Roper
On Thu, Feb 13, 2020 at 04:04:12PM +0200, Stanislav Lisovskiy wrote: > From: Ville Syrjälä > > Currently when we load the driver we set distrust_bios_wm=true, which > will cause active_pipe_changes to get flagged even when we're not > toggling any pipes on/off. The reason being that we want to

Re: [Intel-gfx] [PATCH v1 2/3] drm/i915/dsc: force full modeset whenever DSC is enabled at probe

2020-02-13 Thread Matt Roper
On Thu, Feb 13, 2020 at 11:03:29PM +0200, Jani Nikula wrote: > On Thu, 13 Feb 2020, Matt Roper wrote: > > On Thu, Feb 13, 2020 at 04:04:11PM +0200, Stanislav Lisovskiy wrote: > >> From: Jani Nikula > >> > >> We lack full state readout of DSC config, which may lead to DSC enable > >> using a

Re: [Intel-gfx] [PATCH v1 2/3] drm/i915/dsc: force full modeset whenever DSC is enabled at probe

2020-02-13 Thread Jani Nikula
On Thu, 13 Feb 2020, Matt Roper wrote: > On Thu, Feb 13, 2020 at 04:04:11PM +0200, Stanislav Lisovskiy wrote: >> From: Jani Nikula >> >> We lack full state readout of DSC config, which may lead to DSC enable >> using a config that's all zeros, failing spectacularly. Force full >> modeset and

Re: [Intel-gfx] [PATCH v1 2/3] drm/i915/dsc: force full modeset whenever DSC is enabled at probe

2020-02-13 Thread Matt Roper
On Thu, Feb 13, 2020 at 04:04:11PM +0200, Stanislav Lisovskiy wrote: > From: Jani Nikula > > We lack full state readout of DSC config, which may lead to DSC enable > using a config that's all zeros, failing spectacularly. Force full > modeset and thus compute config at probe to get a sane state,

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Proper dbuf global state

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915: Proper dbuf global state URL : https://patchwork.freedesktop.org/series/73421/ State : warning == Summary == $ dim checkpatch origin/drm-tip 105574d3d6d9 drm/i915: Introduce proper dbuf state -:179: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should

Re: [Intel-gfx] [PATCH i-g-t] lib/i915/gem_engine_topology.c - intel_get_current_engine invalid result

2020-02-13 Thread Chris Wilson
Quoting Dale B Stimson (2020-02-13 19:26:06) > Function intel_get_current_engine() should return NULL (instead of > engine 0) if there are no engines. There should be some igt to put basic use of for_each_engine() though its paces. Nothing fancy, just complete a loop Andi, am I imagining

Re: [Intel-gfx] [PATCH v1 1/3] drm/i915: Ensure no conflicts with BIOS when updating Dbuf

2020-02-13 Thread Matt Roper
On Thu, Feb 13, 2020 at 04:04:10PM +0200, Stanislav Lisovskiy wrote: > TGL BIOS seems to enable both DBuf slices ocasionally, depending > how many displays are connected, while i915 according to BSpec > was powering on S1 DBuf slice, until a modeset was done. > > This was causing a brief flash

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915: move intel_csr.[ch] under display/

2020-02-13 Thread Patchwork
== Series Details == Series: series starting with [v2,1/2] drm/i915: move intel_csr.[ch] under display/ URL : https://patchwork.freedesktop.org/series/73313/ State : success == Summary == CI Bug Log - changes from CI_DRM_7916_full -> Patchwork_16524_full

[Intel-gfx] [PATCH i-g-t v3 2/3] i915/gem_ctx_isolation: Check engine relative registers

2020-02-13 Thread Dale B Stimson
From: Chris Wilson Some of the non-privileged registers are at the same offset on each engine. We can improve our coverage for unknown HW layout by using the reported engine->mmio_base for relative offsets. Signed-off-by: Chris Wilson Reviewed-by: Dale B Stimson ---

[Intel-gfx] [PATCH i-g-t v3 0/3] mmio_base via debugfs infrastructure + gem_ctx_isolation

2020-02-13 Thread Dale B Stimson
v3: - Remove v2 early-exit patches (previous 4/5 and 5/5). The underlying issue was addressed via a separately-submitted patch. v2: - Introduce and use igt_exit_early() so that a failed initialization (in igt_fixture) will not attempt to invoke the per-engine loop. - Initialize mmio_base db

[Intel-gfx] [PATCH i-g-t v3 3/3] i915/gem_ctx_isolation: Check engine relative registers - Part 2

2020-02-13 Thread Dale B Stimson
Modify previous i915/gem_ctx_isolation "Check engine relative registers" for modified mmio_base infrastructure. Signed-off-by: Dale B Stimson --- tests/i915/gem_ctx_isolation.c | 87 +++--- 1 file changed, 48 insertions(+), 39 deletions(-) diff --git

[Intel-gfx] [PATCH i-g-t v3 1/3] i915/gem_mmio_base.c - get mmio_base from debugfs (if possible)

2020-02-13 Thread Dale B Stimson
Signed-off-by: Dale B Stimson --- lib/Makefile.sources | 2 + lib/i915/gem_mmio_base.c | 353 +++ lib/i915/gem_mmio_base.h | 19 +++ lib/igt.h| 1 + lib/meson.build | 1 + 5 files changed, 376 insertions(+) create mode

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v2 5/5] i915/gem_ctx_isolation.c - If initialization fails, exit

2020-02-13 Thread Dale B Stimson
On 2020-02-13 10:29:55, Petri Latvala wrote: > On Wed, Feb 12, 2020 at 05:28:40PM -0800, Dale B Stimson wrote: > > At the start of igt_main, failure of the initial tests for successful > > initialization transfer control to the end of an igt_fixture block. > > From there, execution of the main

[Intel-gfx] [PATCH i-g-t] lib/i915/gem_engine_topology.c - intel_get_current_engine invalid result

2020-02-13 Thread Dale B Stimson
Function intel_get_current_engine() should return NULL (instead of engine 0) if there are no engines. Function intel_init_engine_list() should not store potential engine data in the output structure unless the engine is present. Function intel_init_engine_list() should arguably not filter the

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Sabotague the RING_HEAD

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Sabotague the RING_HEAD URL : https://patchwork.freedesktop.org/series/73308/ State : success == Summary == CI Bug Log - changes from CI_DRM_7916_full -> Patchwork_16523_full Summary ---

[Intel-gfx] [PATCH i-g-t] i915/gem_exec_flush: Forgo I915_EXEC_NORELOC

2020-02-13 Thread Chris Wilson
As we do not maintain the contents of the batch buffers as we reuse and may move the objects between cycles, the requirements for I915_EXEC_NORELOC are not met. Rely on natural reloc skipping instead, so long as the ioctl overhead is less than the GPU, it should not have any impact on the

[Intel-gfx] [PATCH 3/6] drm/i915: Unify the low level dbuf code

2020-02-13 Thread Ville Syrjala
From: Ville Syrjälä The low level dbuf slice code is rather inconsitent with its functiona naming and organization. Make it more consistent. Also share the enable/disable functions between all platforms since the same code works just fine for all of them. Cc: Stanislav Lisovskiy

[Intel-gfx] [PATCH 4/6] drm/i915: Nuke skl_ddb_get_hw_state()

2020-02-13 Thread Ville Syrjala
From: Ville Syrjälä skl_ddb_get_hw_state() is redundant and kinda called in thw wrong spot anyway. Just kill it. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 7 --- drivers/gpu/drm/i915/intel_pm.h | 1 - 2 files changed, 8 deletions(-) diff --git

[Intel-gfx] [PATCH 2/6] drm/i915: Polish some dbuf debugs

2020-02-13 Thread Ville Syrjala
From: Ville Syrjälä Polish some of the dbuf code to give more meaningful debug messages and whatnot. Also we can switch over to the per-device debugs/warns at the same time. Cc: Stanislav Lisovskiy Signed-off-by: Ville Syrjälä --- .../drm/i915/display/intel_display_power.c| 40

[Intel-gfx] [PATCH 5/6] drm/i915: Move the dbuf pre/post plane update

2020-02-13 Thread Ville Syrjala
From: Ville Syrjälä Encapsulate the dbuf state more by moving the pre/post plane functions out from intel_display.c. For now we stick them into intel_pm.c since that's where the rest of the code lives for now. Eventually we should add a new file for this stuff at which point we also need to

[Intel-gfx] [PATCH 6/6] drm/i915: Clean up dbuf debugs during .atomic_check()

2020-02-13 Thread Ville Syrjala
From: Ville Syrjälä Combine the two per-pipe dbuf debugs into one, and use the canonical [CRTC:%d:%s] style to identify the crtc. Also use the same style as the plane code uses for the ddb start/end, and prefix bitmask properly with 0x to make it clear they are in fact bitmasks. The "how many

[Intel-gfx] [PATCH 1/6] drm/i915: Introduce proper dbuf state

2020-02-13 Thread Ville Syrjala
From: Ville Syrjälä Add a global state to track the dbuf slices. Gets rid of all the nasty coupling between state->modeset and dbuf recompulation. Also we can now totally nuke state->active_pipe_changes. dev_priv->wm.distrust_bios_wm still remains, but should probably also get nuked from orbit

[Intel-gfx] [PATCH 0/6] drm/i915: Proper dbuf global state

2020-02-13 Thread Ville Syrjala
From: Ville Syrjälä Introduce a global state object for dbuf and polish up some surrounding stuff. Only lightly smoke tested on kbl, but hopefully the icl+ will just work (tm) as well. Immediate TODO: - Rebase on top of current dbuf fixes once they land Future TODO: - Relocate the whole thing

Re: [Intel-gfx] [PATCH] drm/i915/hdmi: prefer to_i915() over drm->dev_private to get at i915

2020-02-13 Thread Jani Nikula
On Tue, 11 Feb 2020, Wambui Karuga wrote: > On Tue, 11 Feb 2020, Jani Nikula wrote: > >> drm->dev_private is to be avoided. Use to_i915() on the struct >> drm_device pointer instead. Rename the affected local dev_priv variables >> to i915 while at it. >> > > Applies cleanly, and compiles. >

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gt: Ensure 'ENABLE_BOOT_FETCH' is enabled before ppGTT

2020-02-13 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/gt: Ensure 'ENABLE_BOOT_FETCH' is enabled before ppGTT URL : https://patchwork.freedesktop.org/series/73419/ State : success == Summary == CI Bug Log - changes from CI_DRM_7933 -> Patchwork_16561

Re: [Intel-gfx] [PATCH] drm/i915/gt: Ensure 'ENABLE_BOOT_FETCH' is enabled before ppGTT

2020-02-13 Thread Chris Wilson
Quoting Ville Syrjälä (2020-02-13 17:57:56) > On Thu, Feb 13, 2020 at 03:47:59PM +, Chris Wilson wrote: > > Cryptic notes in bspec say that "The MBC Driver Boot Enable bit in MBCTL > > register must be set before this register is written to upon boot up > > (including S3 exit)." > > > > We

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Don't leak non-persistent requests on changing engines (rev5)

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915/gem: Don't leak non-persistent requests on changing engines (rev5) URL : https://patchwork.freedesktop.org/series/73023/ State : success == Summary == CI Bug Log - changes from CI_DRM_7916_full -> Patchwork_16522_full

Re: [Intel-gfx] [PATCH] drm/i915/gt: Ensure 'ENABLE_BOOT_FETCH' is enabled before ppGTT

2020-02-13 Thread Ville Syrjälä
On Thu, Feb 13, 2020 at 03:47:59PM +, Chris Wilson wrote: > Cryptic notes in bspec say that "The MBC Driver Boot Enable bit in MBCTL > register must be set before this register is written to upon boot up > (including S3 exit)." > > We tried adding it to our list of verified workarounds, but

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Ensure 'ENABLE_BOOT_FETCH' is enabled before ppGTT

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915/gt: Ensure 'ENABLE_BOOT_FETCH' is enabled before ppGTT URL : https://patchwork.freedesktop.org/series/73416/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK

Re: [Intel-gfx] [PATCH 1/2] MAINTAINERS: Update drm/i915 bug filing URL

2020-02-13 Thread Sasha Levin
Hi, [This is an automated email] This commit has been processed because it contains a -stable tag. The stable tag indicates that it's relevant for the following trees: all The bot has tested the following trees: v5.5.3, v5.4.19, v4.19.103, v4.14.170, v4.9.213, v4.4.213. v5.5.3: Build OK!

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Update drm/i915 bug filing URL

2020-02-13 Thread Sasha Levin
Hi, [This is an automated email] This commit has been processed because it contains a -stable tag. The stable tag indicates that it's relevant for the following trees: all The bot has tested the following trees: v5.5.3, v5.4.19, v4.19.103, v4.14.170, v4.9.213, v4.4.213. v5.5.3: Build OK!

[Intel-gfx] ✓ Fi.CI.BAT: success for Fix modeset transitions related to DBuf

2020-02-13 Thread Patchwork
== Series Details == Series: Fix modeset transitions related to DBuf URL : https://patchwork.freedesktop.org/series/73414/ State : success == Summary == CI Bug Log - changes from CI_DRM_7932 -> Patchwork_16559 Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/hdmi: prefer to_i915() over drm->dev_private to get at i915

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915/hdmi: prefer to_i915() over drm->dev_private to get at i915 URL : https://patchwork.freedesktop.org/series/73297/ State : success == Summary == CI Bug Log - changes from CI_DRM_7916_full -> Patchwork_16521_full

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fix modeset transitions related to DBuf

2020-02-13 Thread Patchwork
== Series Details == Series: Fix modeset transitions related to DBuf URL : https://patchwork.freedesktop.org/series/73414/ State : warning == Summary == $ dim checkpatch origin/drm-tip 2ec3cae3ec8f drm/i915: Ensure no conflicts with BIOS when updating Dbuf 20b3246d036d drm/i915/dsc: force

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Exercise timeslice rewinding (rev2)

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Exercise timeslice rewinding (rev2) URL : https://patchwork.freedesktop.org/series/73198/ State : success == Summary == CI Bug Log - changes from CI_DRM_7932 -> Patchwork_16558 Summary

Re: [Intel-gfx] [RFC PATCH i-g-t] tests/gem_userptr_blits: Refresh map-fixed-invalidate* subtests

2020-02-13 Thread Janusz Krzysztofik
Hi Michał, On Thursday, February 13, 2020 3:37:31 PM CET Michał Winiarski wrote: > On Thu, Feb 13, 2020 at 01:46:41PM +0100, Janusz Krzysztofik wrote: > > map-fixed-invalidate* subtests utilize gem_set_tiling() which may fail, > > e.g. on hardware with no mappable aperture, due to missing fences.

[Intel-gfx] ✓ Fi.CI.BAT: success for Revert "drm/i915: Update dbuf slices only with full modeset"

2020-02-13 Thread Patchwork
== Series Details == Series: Revert "drm/i915: Update dbuf slices only with full modeset" URL : https://patchwork.freedesktop.org/series/73412/ State : success == Summary == CI Bug Log - changes from CI_DRM_7932 -> Patchwork_16557 Summary

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise timeslice rewinding (rev2)

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Exercise timeslice rewinding (rev2) URL : https://patchwork.freedesktop.org/series/73198/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9c851daea682 drm/i915/selftests: Exercise timeslice rewinding -:13:

[Intel-gfx] [PATCH 1/2] drm/i915/gt: Ensure 'ENABLE_BOOT_FETCH' is enabled before ppGTT

2020-02-13 Thread Chris Wilson
Cryptic notes in bspec say that "The MBC Driver Boot Enable bit in MBCTL register must be set before this register is written to upon boot up (including S3 exit)." We tried adding it to our list of verified workarounds, but our self checks spot that the bit does not stick. It's only meant to be

[Intel-gfx] [PATCH 2/2] drm/i915/gt: Compute PP_DIR_BASE explicitly

2020-02-13 Thread Chris Wilson
Since it was not obvious that 10 == (16 - 6), do it in a couple of steps to match up clearly with bspec. Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_ring_submission.c | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Poison rings after use

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915: Poison rings after use URL : https://patchwork.freedesktop.org/series/73294/ State : success == Summary == CI Bug Log - changes from CI_DRM_7916_full -> Patchwork_16520_full Summary ---

[Intel-gfx] [PATCH] drm/i915/gt: Ensure 'ENABLE_BOOT_FETCH' is enabled before ppGTT

2020-02-13 Thread Chris Wilson
Cryptic notes in bspec say that "The MBC Driver Boot Enable bit in MBCTL register must be set before this register is written to upon boot up (including S3 exit)." We tried adding it to our list of verified workarounds, but our self checks spot that the bit does not stick. It's only meant to be

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dsc: force full modeset whenever DSC is enabled at probe

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915/dsc: force full modeset whenever DSC is enabled at probe URL : https://patchwork.freedesktop.org/series/73410/ State : success == Summary == CI Bug Log - changes from CI_DRM_7932 -> Patchwork_16556

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsc: force full modeset whenever DSC is enabled at probe

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915/dsc: force full modeset whenever DSC is enabled at probe URL : https://patchwork.freedesktop.org/series/73410/ State : warning == Summary == $ dim checkpatch origin/drm-tip 042be97b4347 drm/i915/dsc: force full modeset whenever DSC is enabled at probe

[Intel-gfx] ✓ Fi.CI.BAT: success for Fix state transitions affecting DBuf

2020-02-13 Thread Patchwork
== Series Details == Series: Fix state transitions affecting DBuf URL : https://patchwork.freedesktop.org/series/73406/ State : success == Summary == CI Bug Log - changes from CI_DRM_7932 -> Patchwork_16554 Summary --- **SUCCESS**

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Call intel_edp_init_connector only for eDP.

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915: Call intel_edp_init_connector only for eDP. URL : https://patchwork.freedesktop.org/series/73290/ State : success == Summary == CI Bug Log - changes from CI_DRM_7916_full -> Patchwork_16518_full

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: dont retry stream management at seq_num_m roll over

2020-02-13 Thread Patchwork
== Series Details == Series: drm/i915: dont retry stream management at seq_num_m roll over URL : https://patchwork.freedesktop.org/series/73408/ State : failure == Summary == Applying: drm/i915: dont retry stream management at seq_num_m roll over Using index info to reconstruct a base tree...

Re: [Intel-gfx] [PATCH v2 1/8] drm/i915: Parametrize PFIT_PIPE

2020-02-13 Thread Ville Syrjälä
On Wed, Feb 12, 2020 at 07:43:51PM +0200, Jani Nikula wrote: > On Wed, 12 Feb 2020, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Make the PFIT_PIPE stuff less ugly via parametrization. > > > > Signed-off-by: Ville Syrjälä > > --- > > drivers/gpu/drm/i915/display/intel_panel.c | 3 +-- >

Re: [Intel-gfx] [RFC PATCH i-g-t] tests/gem_userptr_blits: Refresh map-fixed-invalidate* subtests

2020-02-13 Thread Michał Winiarski
On Thu, Feb 13, 2020 at 01:46:41PM +0100, Janusz Krzysztofik wrote: > map-fixed-invalidate* subtests utilize gem_set_tiling() which may fail, > e.g. on hardware with no mappable aperture, due to missing fences. > Skip those subtests if fences are not available. > > Moreover, those subtests use

Re: [Intel-gfx] [PATCH v2] drm/i915: Disable -Wtautological-constant-out-of-range-compare

2020-02-13 Thread Jani Nikula
On Wed, 12 Feb 2020, Michel Dänzer wrote: > On 2020-02-12 6:07 p.m., Nathan Chancellor wrote: >> On Wed, Feb 12, 2020 at 09:52:52AM +0100, Michel Dänzer wrote: >>> On 2020-02-11 9:39 p.m., Nathan Chancellor wrote: On Tue, Feb 11, 2020 at 10:41:48AM +0100, Michel Dänzer wrote: > On

[Intel-gfx] ✓ Fi.CI.BAT: success for Adding definitions for VRR registers and bitfields

2020-02-13 Thread Patchwork
== Series Details == Series: Adding definitions for VRR registers and bitfields URL : https://patchwork.freedesktop.org/series/73398/ State : success == Summary == CI Bug Log - changes from CI_DRM_7932 -> Patchwork_16553 Summary ---

[Intel-gfx] [PATCH v1 2/3] drm/i915/dsc: force full modeset whenever DSC is enabled at probe

2020-02-13 Thread Stanislav Lisovskiy
From: Jani Nikula We lack full state readout of DSC config, which may lead to DSC enable using a config that's all zeros, failing spectacularly. Force full modeset and thus compute config at probe to get a sane state, until we implement DSC state readout. Any fastset that did appear to work with

[Intel-gfx] [PATCH v1 0/3] Fix modeset transitions related to DBuf

2020-02-13 Thread Stanislav Lisovskiy
There are three existing issues, causing possible screen corruptions, being addressed with those patch series. They should go hand in hand, otherwise magic is not working. Jani Nikula (1): drm/i915/dsc: force full modeset whenever DSC is enabled at probe Stanislav Lisovskiy (1): drm/i915:

[Intel-gfx] [PATCH v1 3/3] drm/i915: Force state->modeset=true when distrust_bios_wm==true

2020-02-13 Thread Stanislav Lisovskiy
From: Ville Syrjälä Currently when we load the driver we set distrust_bios_wm=true, which will cause active_pipe_changes to get flagged even when we're not toggling any pipes on/off. The reason being that we want to fully redistribute the dbuf among the active pipes and ignore whatever state the

[Intel-gfx] [PATCH v1 1/3] drm/i915: Ensure no conflicts with BIOS when updating Dbuf

2020-02-13 Thread Stanislav Lisovskiy
TGL BIOS seems to enable both DBuf slices ocasionally, depending how many displays are connected, while i915 according to BSpec was powering on S1 DBuf slice, until a modeset was done. This was causing a brief flash during the boot as we were disabling slice, previously used by BIOS with that.

Re: [Intel-gfx] ivybridge gpu hang with 5.6-rc1

2020-02-13 Thread Jani Nikula
On Tue, 11 Feb 2020, Julian Wollrath wrote: > I got a gpu hang, see attached, and the syslog instructed me to report > it to bugs.freedesktop.org. Since it is not possible to report bugs > there anymore (and I do not have an account) I hope, that this e-mail > also reaches the right people.

[Intel-gfx] [CI] drm/i915/selftests: Exercise timeslice rewinding

2020-02-13 Thread Chris Wilson
Originally, I did not expect having to rewind a context upon timeslicing: the point was to replace the executing context with a non-executing one! However, given a second context that depends on requests from the first, we may have to split the requests along the first context to execute the

Re: [Intel-gfx] [PATCH v1] Revert "drm/i915: Update dbuf slices only with full modeset"

2020-02-13 Thread Jani Nikula
On Thu, 13 Feb 2020, Stanislav Lisovskiy wrote: > Most likely that change is not needed and would be wrong > to do, as we have already figured out the solution for regression. > However to be on safe side, lets have this build as well. > > This reverts commit

[Intel-gfx] [PATCH v1] Revert "drm/i915: Update dbuf slices only with full modeset"

2020-02-13 Thread Stanislav Lisovskiy
Most likely that change is not needed and would be wrong to do, as we have already figured out the solution for regression. However to be on safe side, lets have this build as well. This reverts commit 85487cf4a1670bc2ba95238aaf9f8bf28dc9e7ac. Signed-off-by: Stanislav Lisovskiy ---

[Intel-gfx] [PATCH] drm/i915/dsc: force full modeset whenever DSC is enabled at probe

2020-02-13 Thread Jani Nikula
We lack full state readout of DSC config, which may lead to DSC enable using a config that's all zeros, failing spectacularly. Force full modeset and thus compute config at probe to get a sane state, until we implement DSC state readout. Any fastset that did appear to work with DSC at probe,

[Intel-gfx] [PATCH v4] drm/i915: dont retry stream management at seq_num_m roll over

2020-02-13 Thread Ramalingam C
When roll over detected for seq_num_m, we shouldn't continue with stream management with rolled over value. So we are terminating the stream management retry, on roll over of the seq_num_m. v2: using drm_dbg_kms instead of DRM_DEBUG_KMS [Anshuman] v3: dev_priv is used as i915 [JaniN] v4:

Re: [Intel-gfx] [PATCH] drm/i915: Force state->modeset=true when distrust_bios_wm==true

2020-02-13 Thread Jani Nikula
On Wed, 12 Feb 2020, Ville Syrjala wrote: > From: Ville Syrjälä > > Currently when we load the driver we set distrust_bios_wm=true, which > will cause active_pipe_changes to get flagged even when we're not > toggling any pipes on/off. The reason being that we want to fully > redistribute the

[Intel-gfx] [PATCH v1 1/2] drm/i915: Ensure no conflicts with BIOS when updating Dbuf

2020-02-13 Thread Stanislav Lisovskiy
TGL BIOS seems to enable both DBuf slices ocasionally, depending how many displays are connected, while i915 according to BSpec was powering on S1 DBuf slice, until a modeset was done. This was causing a brief flash during the boot as we were disabling slice, previously used by BIOS with that.

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