Re: [Intel-gfx] ✓ Fi.CI.BAT: success for Security mitigation for Intel Gen7/7.5 HWs

2020-02-19 Thread Chris Wilson
Quoting Patchwork (2020-02-20 03:31:24) > Participating hosts (42 -> 36) > -- > > Additional (6): fi-bdw-5557u fi-glk-dsi fi-ilk-650 fi-snb-2520m > fi-cfl-8109u fi-bsw-kefka > Missing(12): fi-hsw-4770r fi-hsw-4200u fi-byt-j1900 fi-byt-squawks > fi-bsw-cyan fi

[Intel-gfx] [PATCH 3/6] drm/i915/gt: Prevent allocation on a banned context

2020-02-19 Thread Chris Wilson
If a context is banned even before we submit our first request to it, report the failure before we attempt to allocate any resources for the context. Signed-off-by: Chris Wilson Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/gt/intel_context.c | 5 + 1 file changed, 5 insertions(+) dif

[Intel-gfx] [PATCH 5/6] drm/i915/gt: Declare when we enabled timeslicing

2020-02-19 Thread Chris Wilson
Let userspace know if they can trust timeslicing by including it as part of the I915_PARAM_HAS_SCHEDULER::I915_SCHEDULER_CAP_TIMESLICING v2: Only declare timeslicing if we can safely preempt userspace. Fixes: 8ee36e048c98 ("drm/i915/execlists: Minimalistic timeslicing") Signed-off-by: Chris Wilso

[Intel-gfx] [PATCH 6/6] drm/i915/gt: Yield the timeslice if caught waiting on a user semaphore

2020-02-19 Thread Chris Wilson
If we find ourselves waiting on a MI_SEMAPHORE_WAIT, either within the user batch or in our own preamble, the engine raises a GT_WAIT_ON_SEMAPHORE interrupt. We can unmask that interrupt and so respond to a semaphore wait by yielding the timeslice, if we have another context to yield to! The only

[Intel-gfx] [PATCH 1/6] drm/i915/gt: Protect signaler walk with RCU

2020-02-19 Thread Chris Wilson
While we know that the waiters cannot disappear as we walk our list (only that they might be added), the same cannot be said for our signalers as they may be completed by the HW and retired as we process this request. Ergo we need to use rcu to protect the list iteration and remember to mark up the

[Intel-gfx] [PATCH 4/6] drm/i915/gem: Check that the context wasn't closed during setup

2020-02-19 Thread Chris Wilson
As setup takes a long time, the user may close the context during the construction of the execbuf. In order to make sure we correctly track all outstanding work with non-persistent contexts, we need to serialise the submission with the context closure and mop up any leaks. Signed-off-by: Chris Wil

[Intel-gfx] [PATCH 2/6] drm/i915/gem: Consolidate ctx->engines[] release

2020-02-19 Thread Chris Wilson
Use the same engine_idle_release() routine for cleaning all old ctx->engine[] state, closing any potential races with concurrent execbuf submission. Closes: https://gitlab.freedesktop.org/drm/intel/issues/1241 Signed-off-by: Chris Wilson --- Reorder set-closed/engine_idle_release to avoid prematu

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Distribute switch variables for initialization

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915: Distribute switch variables for initialization URL : https://patchwork.freedesktop.org/series/73690/ State : success == Summary == CI Bug Log - changes from CI_DRM_7970 -> Patchwork_16641 Summary -

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/6] drm/i915/gt: Show the cumulative context runtime in engine debug (rev3)

2020-02-19 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915/gt: Show the cumulative context runtime in engine debug (rev3) URL : https://patchwork.freedesktop.org/series/73567/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7961_full -> Patchwork_16598_full ==

[Intel-gfx] [PATCH] drm/i915: Distribute switch variables for initialization

2020-02-19 Thread Kees Cook
Variables declared in a switch statement before any case statements cannot be automatically initialized with compiler instrumentation (as they are not part of any execution flow). With GCC's proposed automatic stack variable initialization feature, this triggers a warning (and they don't get initia

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Add mechanism to submit a context WA on ring submission

2020-02-19 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Add mechanism to submit a context WA on ring submission URL : https://patchwork.freedesktop.org/series/73688/ State : success == Summary == CI Bug Log - changes from CI_DRM_7970 -> Patchwork_16640 ==

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915: Add mechanism to submit a context WA on ring submission

2020-02-19 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Add mechanism to submit a context WA on ring submission URL : https://patchwork.freedesktop.org/series/73688/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915: Add mechanism to s

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Add mechanism to submit a context WA on ring submission

2020-02-19 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Add mechanism to submit a context WA on ring submission URL : https://patchwork.freedesktop.org/series/73688/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6fa7e7f3fc3a drm/i915: Add mechanism to submit a contex

Re: [Intel-gfx] [PATCH v2-resend] drm/i915/psr: Force PSR probe only after full initialization

2020-02-19 Thread Anshuman Gupta
On 2020-02-18 at 23:53:28 +0530, José Roberto de Souza wrote: > Commit 60c6a14b489b ("drm/i915/display: Force the state compute phase > once to enable PSR") was forcing the state compute too earlier > causing errors because not everything was initialized, so here > moving to i915_driver_register()

[Intel-gfx] ✓ Fi.CI.BAT: success for Security mitigation for Intel Gen7/7.5 HWs

2020-02-19 Thread Patchwork
== Series Details == Series: Security mitigation for Intel Gen7/7.5 HWs URL : https://patchwork.freedesktop.org/series/73686/ State : success == Summary == CI Bug Log - changes from CI_DRM_7969 -> Patchwork_16639 Summary --- **SUCCES

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Security mitigation for Intel Gen7/7.5 HWs

2020-02-19 Thread Patchwork
== Series Details == Series: Security mitigation for Intel Gen7/7.5 HWs URL : https://patchwork.freedesktop.org/series/73686/ State : warning == Summary == $ dim checkpatch origin/drm-tip ffdac73cd979 drm/i915: Add mechanism to submit a context WA on ring submission d66eb25865a2 drm/i915/gen7:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ehl: Donot reuse icl get and put dplls (rev2)

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Donot reuse icl get and put dplls (rev2) URL : https://patchwork.freedesktop.org/series/73681/ State : success == Summary == CI Bug Log - changes from CI_DRM_7968 -> Patchwork_16638 Summary ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/ehl: Donot reuse icl get and put dplls (rev2)

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Donot reuse icl get and put dplls (rev2) URL : https://patchwork.freedesktop.org/series/73681/ State : warning == Summary == $ dim checkpatch origin/drm-tip 093d71af9e3f drm/i915/ehl: Donot reuse icl get and put dplls -:82: CHECK:LINE_SPACING: Please

[Intel-gfx] [drm-intel:topic/core-for-CI 18/21] init/Kconfig:77: symbol BROKEN is selected by DRM_I915_DEBUG

2020-02-19 Thread kbuild test robot
tree: git://anongit.freedesktop.org/drm-intel topic/core-for-CI head: 2a97892fdbae277a104d6ba0b90f8a47cbe53681 commit: 0db409f2a5a4ec41dba541c21d6fa294c8a4dfd4 [18/21] Revert "drm/i915: Don't select BROKEN" config: powerpc-ksi8560_defconfig compiler: powerpc-linux-gcc (GCC) 7.5.0 reproduce:

[Intel-gfx] [PATCH 4/4] tidy

2020-02-19 Thread Chris Wilson
--- drivers/gpu/drm/i915/gt/gen7_renderclear.c | 13 +++-- .../gt/{gen7_5_clearbuffer.h => hsw_clear_kernel.c} | 10 +- .../gt/{gen7_clearbuffer.h => ivb_clear_kernel.c} | 10 +- 3 files changed, 9 insertions(+), 24 deletions(-) rename drivers/gpu/drm/i915/gt/{g

[Intel-gfx] [PATCH 1/4] drm/i915: Add mechanism to submit a context WA on ring submission

2020-02-19 Thread Chris Wilson
From: Mika Kuoppala This patch adds framework to submit an arbitrary batchbuffer on each context switch to clear residual state for render engine on Gen7/7.5 devices. The idea of always emitting the context and vm setup around each request is primary to make reset recovery easy, and not require

[Intel-gfx] [PATCH 3/4] fix

2020-02-19 Thread Chris Wilson
--- drivers/gpu/drm/i915/gt/gen7_renderclear.c | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/gen7_renderclear.c b/drivers/gpu/drm/i915/gt/gen7_renderclear.c index 2c3aabc72b4e..beeb2e82c6fe 100644 --- a/drivers/gpu/drm/i915/gt/gen7_render

[Intel-gfx] [PATCH 2/4] drm/i915/gen7: Clear all EU/L3 residual contexts

2020-02-19 Thread Chris Wilson
From: Prathap Kumar Valsan On gen7 and gen7.5 devices, there could be leftover data residuals in EU/L3 from the retiring context. This patch introduces workaround to clear that residual contexts, by submitting a batch buffer with dedicated HW context to the GPU with ring allocation for each conte

[Intel-gfx] [PATCH v3 1/2] drm/i915: Add mechanism to submit a context WA on ring submission

2020-02-19 Thread Akeem G Abodunrin
From: Mika Kuoppala This patch adds framework to submit an arbitrary batchbuffer on each context switch to clear residual state for render engine on Gen7/7.5 devices. The idea of always emitting the context and vm setup around each request is primary to make reset recovery easy, and not require

[Intel-gfx] [PATCH v3 0/2] Security mitigation for Intel Gen7/7.5 HWs

2020-02-19 Thread Akeem G Abodunrin
Intel ID: PSIRT-TA-201910-001 CVEID: CVE-2019-14615 Summary of Vulnerability Insufficient control flow in certain data structures for some Intel(R) Processors with Intel Processor Graphics may allow an unauthenticated user to potentially enable information disclosure via l

[Intel-gfx] [PATCH v3 2/2] drm/i915/gen7: Clear all EU/L3 residual contexts

2020-02-19 Thread Akeem G Abodunrin
From: Prathap Kumar Valsan On gen7 and gen7.5 devices, there could be leftover data residuals in EU/L3 from the retiring context. This patch introduces workaround to clear that residual contexts, by submitting a batch buffer with dedicated HW context to the GPU with ring allocation for each conte

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hotplug: Use phy to get the hpd_pin instead of the port (rev4)

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915/hotplug: Use phy to get the hpd_pin instead of the port (rev4) URL : https://patchwork.freedesktop.org/series/72747/ State : success == Summary == CI Bug Log - changes from CI_DRM_7967 -> Patchwork_16637

[Intel-gfx] [PATCH v2] drm/i915/ehl: Donot reuse icl get and put dplls

2020-02-19 Thread Radhakrishna Sripada
Elkhartlake does not have as many PLL combinations as Icelake. Use a simpler get pll function and reuse intel_put_pll for ehl. v2: Fix the build error Suggested-by: Matt Roper Cc: Lucas De Marchi Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_display.c | 11 +++-

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Add Wa_22010178259:tgl (rev2)

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Add Wa_22010178259:tgl (rev2) URL : https://patchwork.freedesktop.org/series/73255/ State : success == Summary == CI Bug Log - changes from CI_DRM_7967 -> Patchwork_16634 Summary --- **SUCCE

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/ehl: Donot reuse icl get and put dplls

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Donot reuse icl get and put dplls URL : https://patchwork.freedesktop.org/series/73681/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/tgl: add Wa_1409085225, Wa_14010229206

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915/tgl: add Wa_1409085225, Wa_14010229206 URL : https://patchwork.freedesktop.org/series/73679/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Protect signaler walk with RCU (rev2)

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915/gt: Protect signaler walk with RCU (rev2) URL : https://patchwork.freedesktop.org/series/73601/ State : success == Summary == CI Bug Log - changes from CI_DRM_7967 -> Patchwork_16633 Summary ---

[Intel-gfx] [PATCH] drm/i915/ehl: Donot reuse icl get and put dplls

2020-02-19 Thread Radhakrishna Sripada
Elkhartlake does not have as many PLL combinations as Icelake. Use a simpler get pll function and reuse intel_put_pll for ehl. Suggested-by: Matt Roper Cc: Lucas De Marchi Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_display.c | 11 +++- drivers/gpu/drm/i915/disp

Re: [Intel-gfx] [PATCH] drm/i915/tgl: add Wa_1409085225, Wa_14010229206

2020-02-19 Thread Matt Roper
On Wed, Feb 19, 2020 at 02:05:29PM -0500, Matt Atwood wrote: > Disable Push Constant buffer addition, which can cause FIFO > underruns. > > Fix a minor white space issue while we're here. > > v2: typos, add additional Wa reference > > Bspec: 52890 > Cc: Rafael Antognolli > Signed-off-by: Matt A

[Intel-gfx] [PATCH] drm/i915/tgl: add Wa_1409085225, Wa_14010229206

2020-02-19 Thread Matt Atwood
Disable Push Constant buffer addition, which can cause FIFO underruns. Fix a minor white space issue while we're here. v2: typos, add additional Wa reference Bspec: 52890 Cc: Rafael Antognolli Signed-off-by: Matt Atwood --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 9 + drivers/gp

Re: [Intel-gfx] [PATCH v2] drm/i915/tgl: Add Wa_22010178259:tgl

2020-02-19 Thread Souza, Jose
On Wed, 2020-02-19 at 13:56 -0800, Matt Roper wrote: > We need to explicitly set the TLB Request Timer initial value in the > BW_BUDDY registers to 0x8 rather than relying on the hardware > default. > > v2: Apply missing REG_FIELD_PREP to ensure 0x8 is placed in the > correct > bits during the

[Intel-gfx] [PATCH v2] drm/i915/tgl: Add Wa_22010178259:tgl

2020-02-19 Thread Matt Roper
We need to explicitly set the TLB Request Timer initial value in the BW_BUDDY registers to 0x8 rather than relying on the hardware default. v2: Apply missing REG_FIELD_PREP to ensure 0x8 is placed in the correct bits during the rmw. (Jose) Bspec: 52890 Bspec: 50044 Cc: Stanislav Lisovskiy C

[Intel-gfx] [PATCH v2] drm/i915/gt: Protect signaler walk with RCU

2020-02-19 Thread Chris Wilson
While we know that the waiters cannot disappear as we walk our list (only that they might be added), the same cannot be said for our signalers as they may be completed by the HW and retired as we process this request. Ergo we need to use rcu to protect the list iteration and remember to mark up the

[Intel-gfx] ✓ Fi.CI.BAT: success for Adding YUV444 packed format support for skl+ (rev3)

2020-02-19 Thread Patchwork
== Series Details == Series: Adding YUV444 packed format support for skl+ (rev3) URL : https://patchwork.freedesktop.org/series/73020/ State : success == Summary == CI Bug Log - changes from CI_DRM_7966 -> Patchwork_16632 Summary ---

Re: [Intel-gfx] [PATCH] drm/i915/gt: Protect signaler walk with RCU

2020-02-19 Thread Chris Wilson
Quoting Matthew Auld (2020-02-19 19:02:36) > > @@ -497,7 +497,7 @@ void i915_sched_node_fini(struct i915_sched_node *node) > > GEM_BUG_ON(dep->signaler != node); > > GEM_BUG_ON(!list_empty(&dep->dfs_link)); > > > > - list_del(&dep->signal_link); > > +

Re: [Intel-gfx] [PATCH] drm/i915/tgl: Add Wa_22010178259:tgl

2020-02-19 Thread Souza, Jose
On Mon, 2020-02-10 at 12:28 -0800, Matt Roper wrote: > We need to explicitly set the TLB Request Timer initial value in the > BW_BUDDY registers to 0x8 rather than relying on the hardware > default. > > Bspec: 52890 > Bspec: 50044 > Cc: Stanislav Lisovskiy > Signed-off-by: Matt Roper > --- > dr

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Adding YUV444 packed format support for skl+ (rev3)

2020-02-19 Thread Patchwork
== Series Details == Series: Adding YUV444 packed format support for skl+ (rev3) URL : https://patchwork.freedesktop.org/series/73020/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6e576dd5ff36 drm/i915: Adding YUV444 packed format support for skl+ (V14) -:9: WARNING:COMMIT_LOG

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Put drm_display_mode on diet

2020-02-19 Thread Patchwork
== Series Details == Series: drm: Put drm_display_mode on diet URL : https://patchwork.freedesktop.org/series/73674/ State : success == Summary == CI Bug Log - changes from CI_DRM_7966 -> Patchwork_16631 Summary --- **SUCCESS** No

Re: [Intel-gfx] [PATCH 00/12] drm: Put drm_display_mode on diet

2020-02-19 Thread Ville Syrjälä
On Wed, Feb 19, 2020 at 10:35:32PM +0200, Ville Syrjala wrote: > - Eliminate the second list head somehow? I think we could just convert that to a boolean, or even just borrow eg. the one totally free mode->type bit for our internal use to tag the exposed modes. That would in fact get us down to 1

[Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V14)

2020-02-19 Thread Bob Paauwe
From: Stanislav Lisovskiy PLANE_CTL_FORMAT_AYUV is already supported, according to hardware specification. v2: Edited commit message, removed redundant whitespaces. v3: Fixed fallthrough logic for the format switch cases. v4: Yet again fixed fallthrough logic, to reuse code from other case

[Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+

2020-02-19 Thread Bob Paauwe
Test-with: 20200127192859.20029-1-bob.j.paa...@intel.com Stanislav Lisovskiy (1): drm/i915: Adding YUV444 packed format support for skl+ (V14) drivers/gpu/drm/i915/display/intel_display.c | 5 + drivers/gpu/drm/i915/display/intel_sprite.c | 6 ++ drivers/gpu/drm/i915/i915_reg.h

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Put drm_display_mode on diet

2020-02-19 Thread Patchwork
== Series Details == Series: drm: Put drm_display_mode on diet URL : https://patchwork.freedesktop.org/series/73674/ State : warning == Summary == $ dim checkpatch origin/drm-tip 1547c317f1a8 drm: Nuke mode->hsync 60d00db46691 drm/exynos: Use mode->clock instead of reverse calculating it from

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: make a gt sysfs group and move power management files (rev5)

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915/gt: make a gt sysfs group and move power management files (rev5) URL : https://patchwork.freedesktop.org/series/73190/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7966 -> Patchwork_16630 =

[Intel-gfx] [PATCH 11/12] drm: Shrink mode->private_flags

2020-02-19 Thread Ville Syrjala
From: Ville Syrjälä gma500 needs 4 bits (to store a pixel multiplier) in the mode->private_flags, i915 currently has three bits defined. No one else uses this. Reduce the size to u8. Signed-off-by: Ville Syrjälä --- include/drm/drm_modes.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[Intel-gfx] [PATCH 12/12] drm: pahole struct drm_display_mode

2020-02-19 Thread Ville Syrjala
From: Ville Syrjälä Reorganize drm_display_mode to eliminate all the holes. We'll put all the actual timings to the start of the struct and all the extra junk to the end. Gets the size down to 136 bytes on 64bit and 120 bytes on 32bit. With a bit more work we should be able to get this below the

[Intel-gfx] [PATCH 08/12] drm: Make mode->flags u32

2020-02-19 Thread Ville Syrjala
From: Ville Syrjälä The mode flags are direclty exposed in the uapi as u32. Use the same size type to store them internally. Signed-off-by: Ville Syrjälä --- include/drm/drm_modes.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/drm/drm_modes.h b/include/drm/drm_mo

[Intel-gfx] [PATCH 09/12] drm: Shrink drm_display_mode timings

2020-02-19 Thread Ville Syrjala
From: Ville Syrjälä Store the timings (apart from the clock) as u16. The uapi mode struct already uses u16 for everything so using something bigger internally doesn't really help us. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/drm_modes.c | 7 -- include/drm/drm_modes.h | 46

[Intel-gfx] [PATCH 10/12] drm: Flatten drm_mode_vrefresh()

2020-02-19 Thread Ville Syrjala
From: Ville Syrjälä Remove the pointless whole-function indentation. Also don't need to worry about negative values anymore since we switched everything to u16. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/drm_modes.c | 26 -- 1 file changed, 12 insertions(+), 14 de

[Intel-gfx] [PATCH 07/12] drm: Shrink mode->type to u8

2020-02-19 Thread Ville Syrjala
From: Ville Syrjälä We only have 7 bits defined for mode->type. Shrink the storage to u8. Signed-off-by: Ville Syrjälä --- include/drm/drm_modes.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h index 2bb2b1a8592a..5c20285cc

[Intel-gfx] [PATCH 06/12] drm: Shrink {width,height}_mm to u16

2020-02-19 Thread Ville Syrjala
From: Ville Syrjälä Instead of supporting ~2000km wide displayes let's limit ourselves to ~65m. That seems plenty big enough to me. Even with EDID_QUIRK_DETAILED_IN_CM EDIDs seem to be limited to 10*0xfff which fits into the 16 bits. Signed-off-by: Ville Syrjälä --- include/drm/drm_modes.h |

[Intel-gfx] [PATCH 01/12] drm: Nuke mode->hsync

2020-02-19 Thread Ville Syrjala
From: Ville Syrjälä Let's just calculate the hsync rate on demand. No point in wasting space storing it and risking the cached value getting out of sync with reality. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/drm_modes.c | 14 ++ drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH 05/12] drm/msm/dpu: Stop copying around mode->private_flags

2020-02-19 Thread Ville Syrjala
From: Ville Syrjälä The driver never sets mode->private_flags so copying it back and forth is entirely pointless. Stop doing it. Also drop private_flags from the tracepoint. Cc: Rob Clark Cc: Sean Paul Cc: linux-arm-...@vger.kernel.org Cc: freedr...@lists.freedesktop.org Signed-off-by: Ville

[Intel-gfx] [PATCH 03/12] drm/i915: Introduce some local intel_dp variables

2020-02-19 Thread Ville Syrjala
From: Ville Syrjälä The drrs code dereferences mode->vrefresh via some really long chain of structures/pointers. Couldn't get coccinelle to see through all that so let's add some local variables to help it. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dp.c | 18 +

[Intel-gfx] [PATCH 02/12] drm/exynos: Use mode->clock instead of reverse calculating it from the vrefresh

2020-02-19 Thread Ville Syrjala
From: Ville Syrjälä htotal*vtotal*vrefresh ~= clock. So just use say "clock" when we mean it. Cc: Inki Dae Cc: Joonyoung Shim Cc: Seung-Woo Kim Cc: Kyungmin Park Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/exynos/exynos7_drm_decon.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-

[Intel-gfx] [PATCH 00/12] drm: Put drm_display_mode on diet

2020-02-19 Thread Ville Syrjala
From: Ville Syrjälä struct drm_display_mode is extremely fat. Put it on diet. Some stats for the whole series: 64bit sizeof(struct drm_display_mode): 200 -> 136 bytes (-32%) 64bit bloat-o-meter -c drm.ko: add/remove: 1/0 grow/shrink: 29/47 up/down: 893/-1544 (-651) Function

Re: [Intel-gfx] [PATCH] drm/i915: Extend Wa_1606931601 for all steppings.

2020-02-19 Thread Matt Roper
On Tue, Feb 18, 2020 at 07:59:02PM -0800, Anusha Srivatsa wrote: > Previously known by the WA number - Wa_1607090982, extend > the WA (Disable Early Read and Src Swap (bit 14) by > setting the chicken register.) to all steppings. This description is a bit hard to follow; maybe something like this

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: make a gt sysfs group and move power management files (rev5)

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915/gt: make a gt sysfs group and move power management files (rev5) URL : https://patchwork.freedesktop.org/series/73190/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915/gt: make a gt sysfs group and move pow

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/7] dma-buf: add dynamic DMA-buf handling v15

2020-02-19 Thread Patchwork
== Series Details == Series: series starting with [1/7] dma-buf: add dynamic DMA-buf handling v15 URL : https://patchwork.freedesktop.org/series/73665/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7966 -> Patchwork_16629 S

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: make a gt sysfs group and move power management files (rev5)

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915/gt: make a gt sysfs group and move power management files (rev5) URL : https://patchwork.freedesktop.org/series/73190/ State : warning == Summary == $ dim checkpatch origin/drm-tip 1ad40388b0d2 drm/i915/gt: make a gt sysfs group and move power management

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/pmu: Avoid using globals for CPU hotplug state

2020-02-19 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/pmu: Avoid using globals for CPU hotplug state URL : https://patchwork.freedesktop.org/series/73663/ State : success == Summary == CI Bug Log - changes from CI_DRM_7966 -> Patchwork_16628

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] dma-buf: add dynamic DMA-buf handling v15

2020-02-19 Thread Patchwork
== Series Details == Series: series starting with [1/7] dma-buf: add dynamic DMA-buf handling v15 URL : https://patchwork.freedesktop.org/series/73665/ State : warning == Summary == $ dim checkpatch origin/drm-tip 49072c39a5b6 dma-buf: add dynamic DMA-buf handling v15 -:10: WARNING:COMMIT_LOG_

Re: [Intel-gfx] [PATCH 03/52] drm: add managed resources tied to drm_device

2020-02-19 Thread Daniel Vetter
On Wed, Feb 19, 2020 at 7:19 PM Greg Kroah-Hartman wrote: > > On Wed, Feb 19, 2020 at 07:36:52PM +0200, Laurent Pinchart wrote: > > Hi Greg, > > > > On Wed, Feb 19, 2020 at 06:00:46PM +0100, Greg Kroah-Hartman wrote: > > > On Wed, Feb 19, 2020 at 03:22:49PM +0100, Daniel Vetter wrote: > > > > On W

Re: [Intel-gfx] [PATCH 01/52] mm/sl[uo]b: export __kmalloc_track(_node)_caller

2020-02-19 Thread Andrew Morton
On Wed, 19 Feb 2020 11:20:31 +0100 Daniel Vetter wrote: > tracker in drm for stuff that's tied to the lifetime of a drm_device, > not the underlying struct device. Kinda like devres, but for drm. > > ... > > Ack for merging through drm trees very much appreciated. Acked-by: Andrew Morton _

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/pmu: Avoid using globals for CPU hotplug state

2020-02-19 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/pmu: Avoid using globals for CPU hotplug state URL : https://patchwork.freedesktop.org/series/73663/ State : warning == Summary == $ dim checkpatch origin/drm-tip c91c32fb10db drm/i915/pmu: Avoid using globals for CPU hotplug st

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: make dbuf configurations const

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915: make dbuf configurations const URL : https://patchwork.freedesktop.org/series/73659/ State : success == Summary == CI Bug Log - changes from CI_DRM_7966 -> Patchwork_16627 Summary --- **SUCCESS*

[Intel-gfx] [PATCH v5] drm/i915/gt: make a gt sysfs group and move power management files

2020-02-19 Thread Andi Shyti
The GT has its own properties and in sysfs they should be grouped in the 'gt/' directory. Create the 'gt/' directory in sysfs and move the power management related files. The new interfaces are: gt/gt_act_freq_mhz gt/gt_boost_freq_mhz gt/gt_cur_freq_mhz gt/gt_info gt/gt_max_freq_mhz gt/gt_min_fr

Re: [Intel-gfx] [PATCH v4] drm/i915/gt: make a gt sysfs group and move power management files

2020-02-19 Thread Andi Shyti
> drivers/gpu/drm/i915/Makefile|4 +- > drivers/gpu/drm/i915/gt/intel_gt.c |3 + > drivers/gpu/drm/i915/gt/intel_gt_types.h |1 + > drivers/gpu/drm/i915/gt/sysfs_gt.c | 79 ++ > drivers/gpu/drm/i915/gt/sysfs_gt.h | 22 + > drivers/gpu/drm/i915/gt/sysfs

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/pmu: Avoid using globals for per-device state

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915/pmu: Avoid using globals for per-device state URL : https://patchwork.freedesktop.org/series/73658/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7966 -> Patchwork_16626 Summary ---

[Intel-gfx] [PATCH v4] drm/i915/gt: make a gt sysfs group and move power management files

2020-02-19 Thread Andi Shyti
The GT has its own properties and in sysfs they should be grouped in the 'gt/' directory. Create the 'gt/' directory in sysfs and move the power management related files. The new interfaces are: gt/gt_act_freq_mhz gt/gt_boost_freq_mhz gt/gt_cur_freq_mhz gt/gt_info gt/gt_max_freq_mhz gt/gt_min_fr

Re: [Intel-gfx] [PATCH] drm/i915/gt: Protect signaler walk with RCU

2020-02-19 Thread Matthew Auld
On Tue, 18 Feb 2020 at 20:23, Chris Wilson wrote: > > While we know that the waiters cannot disappear as we walk our list > (only that they might be added), the same cannot be said for our > signalers as they may be completed by the HW and retired as we process > this request. Ergo we need to use

Re: [Intel-gfx] [PATCH v3 1/3] drm/i915/display: Deactive FBC in fastsets when disabled by parameter

2020-02-19 Thread Ville Syrjälä
On Wed, Feb 19, 2020 at 06:37:27PM +, Souza, Jose wrote: > On Wed, 2020-02-19 at 15:37 +0200, Ville Syrjälä wrote: > > On Tue, Feb 18, 2020 at 05:42:28PM -0800, José Roberto de Souza > > wrote: > > > Most of the kms_frontbuffer_tracking tests disables the feature > > > being > > > tested, draw,

Re: [Intel-gfx] [PATCH 11/52] drm/v3d: Use drmm_add_final_kfree

2020-02-19 Thread Eric Anholt
On Wed, Feb 19, 2020 at 2:21 AM Daniel Vetter wrote: > > With this we can drop the final kfree from the release function. > > I also noticed that the unwind code is wrong, after drm_dev_init the > drm_device owns the v3d allocation, so the kfree(v3d) is a double-free. > Reorder the setup to fix th

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/userptr: Activate MMU notifier only after pages are set

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915/userptr: Activate MMU notifier only after pages are set URL : https://patchwork.freedesktop.org/series/73652/ State : success == Summary == CI Bug Log - changes from CI_DRM_7966 -> Patchwork_16625 Summa

Re: [Intel-gfx] [PATCH v3 1/3] drm/i915/display: Deactive FBC in fastsets when disabled by parameter

2020-02-19 Thread Souza, Jose
On Wed, 2020-02-19 at 15:37 +0200, Ville Syrjälä wrote: > On Tue, Feb 18, 2020 at 05:42:28PM -0800, José Roberto de Souza > wrote: > > Most of the kms_frontbuffer_tracking tests disables the feature > > being > > tested, draw, get the CRC then enable the feature, draw again, get > > the > > CRC and

Re: [Intel-gfx] [PATCH 03/52] drm: add managed resources tied to drm_device

2020-02-19 Thread Greg Kroah-Hartman
On Wed, Feb 19, 2020 at 07:36:52PM +0200, Laurent Pinchart wrote: > Hi Greg, > > On Wed, Feb 19, 2020 at 06:00:46PM +0100, Greg Kroah-Hartman wrote: > > On Wed, Feb 19, 2020 at 03:22:49PM +0100, Daniel Vetter wrote: > > > On Wed, Feb 19, 2020 at 2:33 PM Greg Kroah-Hartman wrote: > > > > On Wed, Fe

Re: [Intel-gfx] [PATCH 27/52] drm: Manage drm_mode_config_init with drmm_

2020-02-19 Thread Daniel Vetter
On Wed, Feb 19, 2020 at 6:30 PM Noralf Trønnes wrote: > > > > Den 19.02.2020 17.23, skrev Daniel Vetter: > > On Wed, Feb 19, 2020 at 5:08 PM Laurent Pinchart > > wrote: > >> > >> Hi Daniel, > >> > >> On Wed, Feb 19, 2020 at 04:47:55PM +0100, Daniel Vetter wrote: > >>> On Wed, Feb 19, 2020 at 2:50

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: split i915_driver_modeset_probe() to pre/post irq install

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915: split i915_driver_modeset_probe() to pre/post irq install URL : https://patchwork.freedesktop.org/series/73649/ State : success == Summary == CI Bug Log - changes from CI_DRM_7966 -> Patchwork_16624 Su

Re: [Intel-gfx] [PATCH] drm/i915: make dbuf configurations const

2020-02-19 Thread Matt Roper
On Wed, Feb 19, 2020 at 05:45:42PM +0200, Jani Nikula wrote: > Ensure const data goes to rodata. > > Fixes: ff2cd8635e41 ("drm/i915: Correctly map DBUF slices to pipes") > Cc: Matt Roper > Cc: Stanislav Lisovskiy > Cc: Ville Syrjälä > Signed-off-by: Jani Nikula Reviewed-by: Matt Roper > ---

Re: [Intel-gfx] [PATCH 03/52] drm: add managed resources tied to drm_device

2020-02-19 Thread Laurent Pinchart
Hi Greg, On Wed, Feb 19, 2020 at 06:00:46PM +0100, Greg Kroah-Hartman wrote: > On Wed, Feb 19, 2020 at 03:22:49PM +0100, Daniel Vetter wrote: > > On Wed, Feb 19, 2020 at 2:33 PM Greg Kroah-Hartman wrote: > > > On Wed, Feb 19, 2020 at 03:28:47PM +0200, Laurent Pinchart wrote: > > > > On Wed, Feb 19

Re: [Intel-gfx] [PATCH 27/52] drm: Manage drm_mode_config_init with drmm_

2020-02-19 Thread Noralf Trønnes
Den 19.02.2020 17.23, skrev Daniel Vetter: > On Wed, Feb 19, 2020 at 5:08 PM Laurent Pinchart > wrote: >> >> Hi Daniel, >> >> On Wed, Feb 19, 2020 at 04:47:55PM +0100, Daniel Vetter wrote: >>> On Wed, Feb 19, 2020 at 2:50 PM Laurent Pinchart wrote: On Wed, Feb 19, 2020 at 11:20:57AM +0100,

Re: [Intel-gfx] [PATCH 04/52] drm: Set final_kfree in drm_dev_alloc

2020-02-19 Thread Oleksandr Andrushchenko
On 2/19/20 12:20 PM, Daniel Vetter wrote: > I also did a full review of all callers, and only the xen driver > forgot to call drm_dev_put in the failure path. Fix that up too. > > v2: I noticed that xen has a drm_driver.release hook, and uses > drm_dev_alloc(). We need to remove the kfree from > xe

Re: [Intel-gfx] [PATCH 03/52] drm: add managed resources tied to drm_device

2020-02-19 Thread Daniel Vetter
On Wed, Feb 19, 2020 at 6:02 PM Laurent Pinchart wrote: > > Hi Daniel, > > On Wed, Feb 19, 2020 at 05:53:59PM +0100, Daniel Vetter wrote: > > On Wed, Feb 19, 2020 at 5:46 PM Laurent Pinchart wrote: > > > On Wed, Feb 19, 2020 at 05:22:38PM +0100, Daniel Vetter wrote: > > >> On Wed, Feb 19, 2020 at

Re: [Intel-gfx] [PATCH 03/52] drm: add managed resources tied to drm_device

2020-02-19 Thread Laurent Pinchart
Hi Daniel, On Wed, Feb 19, 2020 at 05:53:59PM +0100, Daniel Vetter wrote: > On Wed, Feb 19, 2020 at 5:46 PM Laurent Pinchart wrote: > > On Wed, Feb 19, 2020 at 05:22:38PM +0100, Daniel Vetter wrote: > >> On Wed, Feb 19, 2020 at 5:09 PM Emil Velikov wrote: > >>> On Wed, 19 Feb 2020 at 14:23, Daniel

Re: [Intel-gfx] [PATCH 03/52] drm: add managed resources tied to drm_device

2020-02-19 Thread Greg Kroah-Hartman
On Wed, Feb 19, 2020 at 03:22:49PM +0100, Daniel Vetter wrote: > On Wed, Feb 19, 2020 at 2:33 PM Greg Kroah-Hartman > wrote: > > > > On Wed, Feb 19, 2020 at 03:28:47PM +0200, Laurent Pinchart wrote: > > > Hi Daniel, > > > > > > Thank you for the patch. > > > > > > On Wed, Feb 19, 2020 at 11:20:33A

[Intel-gfx] [PATCH 5/7] drm/amdgpu: implement amdgpu_gem_prime_move_notify v2

2020-02-19 Thread Christian König
Implement the importer side of unpinned DMA-buf handling. v2: update page tables immediately Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 66 - drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 6 ++ 2 files changed, 71 insertions(+), 1 delet

[Intel-gfx] [PATCH 1/7] dma-buf: add dynamic DMA-buf handling v15

2020-02-19 Thread Christian König
On the exporter side we add optional explicit pinning callbacks. Which are called when the importer doesn't implement dynamic handling, move notification or need the DMA-buf locked in place for its use case. On the importer side we add an optional move_notify callback. This callback is used by the

[Intel-gfx] [PATCH 6/7] dma-buf: drop dynamic_mapping flag

2020-02-19 Thread Christian König
Instead use the pin() callback to detect dynamic DMA-buf handling. Since amdgpu is now migrated it doesn't make much sense to keep the extra flag. Signed-off-by: Christian König --- drivers/dma-buf/dma-buf.c | 5 ++--- drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 1 - includ

[Intel-gfx] [PATCH 2/7] drm/ttm: remove the backing store if no placement is given

2020-02-19 Thread Christian König
Pipeline removal of the BOs backing store when no placement is given during validation. Signed-off-by: Christian König --- drivers/gpu/drm/ttm/ttm_bo.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c index 151edfd8de77

[Intel-gfx] [PATCH 4/7] drm/amdgpu: add amdgpu_dma_buf_pin/unpin v2

2020-02-19 Thread Christian König
This implements the exporter side of unpinned DMA-buf handling. v2: fix minor coding style issues Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 53 ++--- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 5 ++ 2 files changed, 51 insertions(+), 7

[Intel-gfx] [PATCH 3/7] drm/amdgpu: use allowed_domains for exported DMA-bufs

2020-02-19 Thread Christian König
Avoid that we ping/pong the buffers when we stop to pin DMA-buf exports by using the allowed domains for exported buffers. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/

[Intel-gfx] [PATCH 7/7] dma-buf: make move_notify mandatory if importer_ops are provided

2020-02-19 Thread Christian König
This makes the move_notify callback mandatory when the importer_ops are provided. Since amdgpu is now migrated it doesn't make much sense anymore to allow this. Signed-off-by: Christian König --- drivers/dma-buf/dma-buf.c | 15 +++ 1 file changed, 7 insertions(+), 8 deletions(-) dif

Re: [Intel-gfx] [PATCH 03/52] drm: add managed resources tied to drm_device

2020-02-19 Thread Daniel Vetter
On Wed, Feb 19, 2020 at 5:46 PM Laurent Pinchart wrote: > > Hi Daniel, > > On Wed, Feb 19, 2020 at 05:22:38PM +0100, Daniel Vetter wrote: > > On Wed, Feb 19, 2020 at 5:09 PM Emil Velikov wrote: > > > On Wed, 19 Feb 2020 at 14:23, Daniel Vetter wrote: > > >> On Wed, Feb 19, 2020 at 2:33 PM Greg Kro

Re: [Intel-gfx] [PATCH 03/52] drm: add managed resources tied to drm_device

2020-02-19 Thread Laurent Pinchart
Hi Daniel, On Wed, Feb 19, 2020 at 05:22:38PM +0100, Daniel Vetter wrote: > On Wed, Feb 19, 2020 at 5:09 PM Emil Velikov wrote: > > On Wed, 19 Feb 2020 at 14:23, Daniel Vetter wrote: > >> On Wed, Feb 19, 2020 at 2:33 PM Greg Kroah-Hartman wrote: > >>> On Wed, Feb 19, 2020 at 03:28:47PM +0200, Laur

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Do not attempt to reprogram IA/ring frequencies for dgfx

2020-02-19 Thread Patchwork
== Series Details == Series: drm/i915/gt: Do not attempt to reprogram IA/ring frequencies for dgfx URL : https://patchwork.freedesktop.org/series/73647/ State : success == Summary == CI Bug Log - changes from CI_DRM_7965 -> Patchwork_16623

Re: [Intel-gfx] [PATCH 03/52] drm: add managed resources tied to drm_device

2020-02-19 Thread Emil Velikov
On Wed, 19 Feb 2020 at 16:22, Daniel Vetter wrote: > > On Wed, Feb 19, 2020 at 5:09 PM Emil Velikov wrote: > > > > On Wed, 19 Feb 2020 at 14:23, Daniel Vetter wrote: > > > > > > On Wed, Feb 19, 2020 at 2:33 PM Greg Kroah-Hartman > > > wrote: > > > > > > > > On Wed, Feb 19, 2020 at 03:28:47PM +0

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