[Intel-gfx] ✓ Fi.CI.IGT: success for MAINTAINERS: adjust to reservation.h renaming

2020-03-04 Thread Patchwork
== Series Details == Series: MAINTAINERS: adjust to reservation.h renaming URL : https://patchwork.freedesktop.org/series/74262/ State : success == Summary == CI Bug Log - changes from CI_DRM_8063_full -> Patchwork_16815_full Summary --

[Intel-gfx] [PATCH] drm/i915/execlists: Enable timeslice on partial virtual engine dequeue

2020-03-04 Thread Chris Wilson
If we stop filling the ELSP due to an incompatible virtual engine request, check if we should enable the timeslice on behalf of the queue. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_lrc.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git

Re: [Intel-gfx] [PATCH 1/4] drm/i915/hdcp: Update CP as per the kernel internal state

2020-03-04 Thread Anshuman Gupta
On 2020-03-04 at 09:43:10 +0100, Maarten Lankhorst wrote: > Op 03-03-2020 om 17:35 schreef Anshuman Gupta: > > On 2020-03-03 at 15:36:37 +0100, Maarten Lankhorst wrote: > >> Op 05-02-2020 om 06:07 schreef Anshuman Gupta: > >>> On 2020-01-28 at 21:45:45 +0530, Anshuman Gupta wrote: > >>> Hi Jani , >

Re: [Intel-gfx] [PATCH 7/7] drm/i915/perf: add flushing ioctl

2020-03-04 Thread Dixit, Ashutosh
On Wed, 04 Mar 2020 00:52:34 -0800, Lionel Landwerlin wrote: > > On 04/03/2020 07:48, Dixit, Ashutosh wrote: > > On Tue, 03 Mar 2020 14:19:05 -0800, Umesh Nerlige Ramappa wrote: > >> From: Lionel Landwerlin > >> > >> With the currently available parameters for the i915-perf stream, > >> there are

[Intel-gfx] ✗ Fi.CI.IGT: failure for HDCP misc (rev3)

2020-03-04 Thread Patchwork
== Series Details == Series: HDCP misc (rev3) URL : https://patchwork.freedesktop.org/series/73345/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8063_full -> Patchwork_16814_full Summary --- **FAILURE** Serious u

Re: [Intel-gfx] [PATCH] drm/i915/edp: Ignore short pulse when panel powered off

2020-03-04 Thread Anshuman Gupta
On 2020-03-04 at 20:45:20 +0200, Ville Syrjälä wrote: > On Wed, Mar 04, 2020 at 03:33:03PM +0200, Jani Nikula wrote: > > On Wed, 04 Mar 2020, Anshuman Gupta wrote: > > > Few edp panels like Sharp is triggering short and long > > > hpd pulse after panel is getting powered off. > > > Currently drive

[Intel-gfx] [PATCH v6 3/3] drm/i915: Add support for integrated privacy screens

2020-03-04 Thread Rajat Jain
Certain laptops now come with panels that have integrated privacy screens on them. This patch adds support for such panels by adding a privacy-screen property to the intel_connector for the panel, that the userspace can then use to control and check the status. Identifying the presence of privacy

[Intel-gfx] [PATCH v6 3/3] drm/i915: Add support for integrated privacy screens

2020-03-04 Thread Rajat Jain
Certain laptops now come with panels that have integrated privacy screens on them. This patch adds support for such panels by adding a privacy-screen property to the intel_connector for the panel, that the userspace can then use to control and check the status. Identifying the presence of privacy

Re: [Intel-gfx] [PATCH 1/1] Revert "drm/i915/tgl: Add extra hdc flush workaround"

2020-03-04 Thread Lucas De Marchi
On Wed, Mar 4, 2020 at 2:33 PM Caz Yokoyama wrote: > > This reverts commit 36a6b5d964d995b536b1925ec42052ee40ba92c4. > Fixes: 36a6b5d964d9 ("drm/i915/tgl: Add extra hdc flush workaround") > > The commit takes care Wa_1604544889 which was fixed on a0 stepping based on > a0 replan. So no SW workarou

Re: [Intel-gfx] [PATCH] drm/i915: Fix documentation for intel_dpll_get_freq()

2020-03-04 Thread Souza, Jose
On Wed, 2020-03-04 at 17:09 +0200, Imre Deak wrote: > Fix the following kerneldoc warning and while at it also the doc for > the > corresponding vfunc hook. > > $ make htmldocs 2>&1 > /dev/null | grep i915 > ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: > Function parameter or memb

[Intel-gfx] [PATCH] drm/i915/hotplug: Use phy to get the hpd_pin instead of the port (v5)

2020-03-04 Thread Vivek Kasireddy
On some platforms such as Elkhart Lake, although we may use DDI D to drive a connector, we have to use PHY A (Combo Phy PORT A) to detect the hotplug interrupts as per the spec because there is no one-to-one mapping between DDIs and PHYs. Therefore, use the function intel_port_to_phy() which contai

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Fix doclinks

2020-03-04 Thread Souza, Jose
On Tue, 2020-03-03 at 09:20 +, Chris Wilson wrote: > Update locations for > > ./drivers/gpu/drm/i915/i915_vma.h:1: warning: 'Virtual Memory > Address' not found > ./drivers/gpu/drm/i915/i915_gem_gtt.c:1: warning: 'Global GTT views' > not found Reviewed-by: José Roberto de Souza > > Signed-

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tgl: Make wa_1606700617 permanent

2020-03-04 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Make wa_1606700617 permanent URL : https://patchwork.freedesktop.org/series/74240/ State : success == Summary == CI Bug Log - changes from CI_DRM_8061_full -> Patchwork_16813_full Summary ---

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Don't check for wm changes until we've compute the wms fully

2020-03-04 Thread Souza, Jose
On Wed, 2020-03-04 at 13:46 +0200, Ville Syrjälä wrote: > On Wed, Mar 04, 2020 at 12:21:01AM +, Souza, Jose wrote: > > On Fri, 2020-02-28 at 22:35 +0200, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > Currently we're comparing the watermarks between the old and new > > > states >

[Intel-gfx] [PATCH 1/1] Revert "drm/i915/tgl: Add extra hdc flush workaround"

2020-03-04 Thread Caz Yokoyama
This reverts commit 36a6b5d964d995b536b1925ec42052ee40ba92c4. Fixes: 36a6b5d964d9 ("drm/i915/tgl: Add extra hdc flush workaround") The commit takes care Wa_1604544889 which was fixed on a0 stepping based on a0 replan. So no SW workaround is required on any stepping now. Reviewed-by: Matt Roper S

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Apply i915_request_skip() on submission

2020-03-04 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Apply i915_request_skip() on submission URL : https://patchwork.freedesktop.org/series/74235/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8061_full -> Patchwork_16812_full

Re: [Intel-gfx] [PATCH 1/1] Revert "drm/i915/tgl: Add extra hdc flush workaround"

2020-03-04 Thread Matt Roper
On Wed, Mar 04, 2020 at 08:52:25AM -0800, Caz Yokoyama wrote: > This reverts commit 36a6b5d964d995b536b1925ec42052ee40ba92c4. > > The commit takes care Wa_1604544889 which was fixed on a0 stepping based on > a0 replan. So no SW workaround is required on any stepping now. > > Signed-off-by: Caz Yo

Re: [Intel-gfx] [PATCH] drm/i915/dmc: Use firmware v2.06 for TGL

2020-03-04 Thread Daniele Ceraolo Spurio
On 3/3/20 1:29 AM, Jani Nikula wrote: On Fri, 28 Feb 2020, "Sharma, Swati2" wrote: On 28-Feb-20 12:49 PM, Jani Nikula wrote: On Thu, 27 Feb 2020, José Roberto de Souza wrote: New firmware contains minor fixes around context restore. Please get the firmware in linux-firmware and CI first:

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gvt: Inlcude intel_gvt.h where needed

2020-03-04 Thread Patchwork
== Series Details == Series: drm/i915/gvt: Inlcude intel_gvt.h where needed URL : https://patchwork.freedesktop.org/series/74234/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8061_full -> Patchwork_16811_full Summary -

[Intel-gfx] PR - i915 firmware updates (TGL HuC 7.0.12 and DMC 2.06)

2020-03-04 Thread Daniele Ceraolo Spurio
Hi, Kindly add the below i915 changes to linux-firmware.git The following changes since commit 0148cfefcbf98898ca65bb26d9d7d638b30e211d: Merge https://github.com/rjliao-qca/qca-btfw (2020-03-02 08:08:15 -0500) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-fi

[Intel-gfx] [PATCH] drm/i915/gem: Limit struct_mutex to eb_reserve

2020-03-04 Thread Chris Wilson
We only need to serialise the multiple pinning during the eb_reserve phase. Ideally this would be using the vm->mutex as an outer lock, or using a composite global mutex (ww_mutex), but at the moment we are using struct_mutex for the group. Fixes: 003d8b9143a6 ("drm/i915/gem: Only call eb_lookup_v

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Tweak scheduler's kick_submission()

2020-03-04 Thread Patchwork
== Series Details == Series: drm/i915: Tweak scheduler's kick_submission() URL : https://patchwork.freedesktop.org/series/74279/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8066 -> Patchwork_16824 Summary --- **FAI

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Replace zero-length array with flexible-array member

2020-03-04 Thread Patchwork
== Series Details == Series: drm/i915: Replace zero-length array with flexible-array member URL : https://patchwork.freedesktop.org/series/74226/ State : success == Summary == CI Bug Log - changes from CI_DRM_8061_full -> Patchwork_16810_full ===

[Intel-gfx] [PATCH] i915/gem_exec_params: add test_invalid_batch_start

2020-03-04 Thread Matthew Auld
Sanity check that kernel rejects too large batch_start_offset. Signed-off-by: Matthew Auld Cc: Chris Wilson --- tests/i915/gem_exec_params.c | 20 1 file changed, 20 insertions(+) diff --git a/tests/i915/gem_exec_params.c b/tests/i915/gem_exec_params.c index cf7ea306..afc8

[Intel-gfx] [PATCH] drm/i915: properly sanity check batch_start_offset

2020-03-04 Thread Matthew Auld
Check the edge case where batch_start_offset sits exactly on the batch size. Testcase: igt/gem_exec_params/invalid-batch-start-offset Fixes: 0b5372727be3 ("drm/i915/cmdparser: Use cached vmappings") Signed-off-by: Matthew Auld Cc: Chris Wilson --- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Fix uninitialized variable

2020-03-04 Thread Jani Nikula
On Wed, 04 Mar 2020, Jani Nikula wrote: > On Tue, 03 Mar 2020, Matt Roper wrote: >> On Tue, Mar 03, 2020 at 05:25:21PM +0200, Jani Nikula wrote: >>> On Tue, 03 Mar 2020, Aditya Swarup wrote: >>> > - struct lrc_timestamp data; >>> > + struct lrc_timestamp data = { 0 }; >>> >>> {} is preferred ov

[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Tweak scheduler's kick_submission()

2020-03-04 Thread Patchwork
== Series Details == Series: drm/i915: Tweak scheduler's kick_submission() URL : https://patchwork.freedesktop.org/series/74279/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or membe

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/1] Revert "drm/i915/tgl: Add extra hdc flush workaround"

2020-03-04 Thread Patchwork
== Series Details == Series: series starting with [1/1] Revert "drm/i915/tgl: Add extra hdc flush workaround" URL : https://patchwork.freedesktop.org/series/74277/ State : success == Summary == CI Bug Log - changes from CI_DRM_8066 -> Patchwork_16823 ==

[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/1] Revert "drm/i915/tgl: Add extra hdc flush workaround"

2020-03-04 Thread Patchwork
== Series Details == Series: series starting with [1/1] Revert "drm/i915/tgl: Add extra hdc flush workaround" URL : https://patchwork.freedesktop.org/series/74277/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: w

[Intel-gfx] ✓ Fi.CI.IGT: success for drm: i915_drm.h: Replace zero-length array with flexible-array member

2020-03-04 Thread Patchwork
== Series Details == Series: drm: i915_drm.h: Replace zero-length array with flexible-array member URL : https://patchwork.freedesktop.org/series/74225/ State : success == Summary == CI Bug Log - changes from CI_DRM_8061_full -> Patchwork_16809_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Cancel banned contexts after GT reset

2020-03-04 Thread Patchwork
== Series Details == Series: drm/i915/gt: Cancel banned contexts after GT reset URL : https://patchwork.freedesktop.org/series/74276/ State : success == Summary == CI Bug Log - changes from CI_DRM_8066 -> Patchwork_16822 Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/perf: add OA interrupt support (rev5)

2020-03-04 Thread Patchwork
== Series Details == Series: drm/i915/perf: add OA interrupt support (rev5) URL : https://patchwork.freedesktop.org/series/54280/ State : success == Summary == CI Bug Log - changes from CI_DRM_8061_full -> Patchwork_16808_full Summary -

[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/gt: Cancel banned contexts after GT reset

2020-03-04 Thread Patchwork
== Series Details == Series: drm/i915/gt: Cancel banned contexts after GT reset URL : https://patchwork.freedesktop.org/series/74276/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: WaDisableGPGPUMidThreadPreemption

2020-03-04 Thread Patchwork
== Series Details == Series: drm/i915/tgl: WaDisableGPGPUMidThreadPreemption URL : https://patchwork.freedesktop.org/series/74274/ State : success == Summary == CI Bug Log - changes from CI_DRM_8066 -> Patchwork_16821 Summary --- **S

Re: [Intel-gfx] [PATCH] drm/i915/tgl: Make wa_1606700617 permanent

2020-03-04 Thread Souza, Jose
The change look good, it is just missing some commit description. I know that there is no much to talk about but it is kind of a rule to always have a description on kernel patches, something like will do: Previously the issue that Wa_1606700617 was fixing would be fixed in B0 hardware but hardwar

[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/tgl: WaDisableGPGPUMidThreadPreemption

2020-03-04 Thread Patchwork
== Series Details == Series: drm/i915/tgl: WaDisableGPGPUMidThreadPreemption URL : https://patchwork.freedesktop.org/series/74274/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or mem

Re: [Intel-gfx] [PATCH] drm/i915/edp: Ignore short pulse when panel powered off

2020-03-04 Thread Ville Syrjälä
On Wed, Mar 04, 2020 at 03:33:03PM +0200, Jani Nikula wrote: > On Wed, 04 Mar 2020, Anshuman Gupta wrote: > > Few edp panels like Sharp is triggering short and long > > hpd pulse after panel is getting powered off. > > Currently driver is already ignoring long pulse for eDP > > panel but in order

[Intel-gfx] [CI 1/2] drm/i915: Add mechanism to submit a context WA on ring submission

2020-03-04 Thread Chris Wilson
From: Mika Kuoppala This patch adds framework to submit an arbitrary batchbuffer on each context switch to clear residual state for render engine on Gen7/7.5 devices. The idea of always emitting the context and vm setup around each request is primary to make reset recovery easy, and not require

[Intel-gfx] [CI 2/2] drm/i915/gen7: Clear all EU/L3 residual contexts

2020-03-04 Thread Chris Wilson
From: Prathap Kumar Valsan On gen7 and gen7.5 devices, there could be leftover data residuals in EU/L3 from the retiring context. This patch introduces workaround to clear that residual contexts, by submitting a batch buffer with dedicated HW context to the GPU with ring allocation for each conte

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix documentation for intel_dpll_get_freq()

2020-03-04 Thread Patchwork
== Series Details == Series: drm/i915: Fix documentation for intel_dpll_get_freq() URL : https://patchwork.freedesktop.org/series/74272/ State : success == Summary == CI Bug Log - changes from CI_DRM_8066 -> Patchwork_16820 Summary ---

Re: [Intel-gfx] [PATCH v3] drm/dp: Add function to parse EDID descriptors for adaptive sync limits

2020-03-04 Thread Ville Syrjälä
On Wed, Mar 04, 2020 at 09:36:06AM -0800, Manasi Navare wrote: > On Tue, Mar 03, 2020 at 03:42:12PM +0200, Ville Syrjälä wrote: > > On Mon, Mar 02, 2020 at 04:08:59PM -0800, Manasi Navare wrote: > > > Adaptive Sync is a VESA feature so add a DRM core helper to parse > > > the EDID's detailed descri

Re: [Intel-gfx] [PATCH v2 07/20] drm/i915: Unify the low level dbuf code

2020-03-04 Thread Ville Syrjälä
On Wed, Mar 04, 2020 at 05:23:05PM +, Lisovskiy, Stanislav wrote: > > >- /* If 2nd DBuf slice required, enable it here */ > >if (INTEL_GEN(dev_priv) >= 11 && slices_union != hw_enabled_slices) > >- icl_dbuf_slices_update(dev_priv, slices_union); > >+ g

Re: [Intel-gfx] [PATCH v2 06/20] drm/i915: Polish some dbuf debugs

2020-03-04 Thread Ville Syrjälä
On Wed, Mar 04, 2020 at 04:29:47PM +, Lisovskiy, Stanislav wrote: > On Tue, 2020-02-25 at 19:11 +0200, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Polish some of the dbuf code to give more meaningful debug > > messages and whatnot. Also we can switch over to the per-device > > debugs

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/2] drm/i915: Add mechanism to submit a context WA on ring submission

2020-03-04 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: Add mechanism to submit a context WA on ring submission URL : https://patchwork.freedesktop.org/series/74266/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8066 -> Patchwork_16818 ===

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: HDCP: fix Ri prime and R0 checks during auth

2020-03-04 Thread Patchwork
== Series Details == Series: drm/i915: HDCP: fix Ri prime and R0 checks during auth URL : https://patchwork.freedesktop.org/series/74271/ State : failure == Summary == Applying: drm/i915: HDCP: fix Ri prime and R0 checks during auth Using index info to reconstruct a base tree... M driver

[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [CI,1/2] drm/i915: Add mechanism to submit a context WA on ring submission

2020-03-04 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: Add mechanism to submit a context WA on ring submission URL : https://patchwork.freedesktop.org/series/74266/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dp

[Intel-gfx] [PATCH] drm/i915: Tweak scheduler's kick_submission()

2020-03-04 Thread Chris Wilson
Skip useless priority bumping on adding a new dependency, but otherwise prevent tasklet scheduling until we have completed all the potential rescheduling. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_scheduler.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/edp: Ignore short pulse when panel powered off

2020-03-04 Thread Patchwork
== Series Details == Series: drm/i915/edp: Ignore short pulse when panel powered off URL : https://patchwork.freedesktop.org/series/74265/ State : success == Summary == CI Bug Log - changes from CI_DRM_8066 -> Patchwork_16817 Summary --

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915: Add mechanism to submit a context WA on ring submission

2020-03-04 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: Add mechanism to submit a context WA on ring submission URL : https://patchwork.freedesktop.org/series/74266/ State : warning == Summary == $ dim checkpatch origin/drm-tip 077cea8a78dd drm/i915: Add mechanism to submit a con

Re: [Intel-gfx] [PATCH v3] drm/dp: Add function to parse EDID descriptors for adaptive sync limits

2020-03-04 Thread Manasi Navare
On Tue, Mar 03, 2020 at 03:42:12PM +0200, Ville Syrjälä wrote: > On Mon, Mar 02, 2020 at 04:08:59PM -0800, Manasi Navare wrote: > > Adaptive Sync is a VESA feature so add a DRM core helper to parse > > the EDID's detailed descritors to obtain the adaptive sync monitor range. > > Store this info as

Re: [Intel-gfx] [PATCH i-g-t] tests/i915/query: Do not assert engine info rsvd being zero

2020-03-04 Thread Brian Welty
On 3/4/2020 1:29 AM, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > These are not input fields and i915 currently leaves them untouched. > > In the spirit of trusting the query as the authoritative source of > information, stop asserting these output only reserved fields are zero. > > This

[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/edp: Ignore short pulse when panel powered off

2020-03-04 Thread Patchwork
== Series Details == Series: drm/i915/edp: Ignore short pulse when panel powered off URL : https://patchwork.freedesktop.org/series/74265/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function paramete

Re: [Intel-gfx] [PATCH v2 07/20] drm/i915: Unify the low level dbuf code

2020-03-04 Thread Lisovskiy, Stanislav
>- /* If 2nd DBuf slice required, enable it here */ >if (INTEL_GEN(dev_priv) >= 11 && slices_union != hw_enabled_slices) >- icl_dbuf_slices_update(dev_priv, slices_union); >+ gen9_dbuf_slices_update(dev_priv, slices_union); >} > static void icl_dbuf_slice

Re: [Intel-gfx] [PATCH v2 07/20] drm/i915: Unify the low level dbuf code

2020-03-04 Thread Lisovskiy, Stanislav
>- /* If 2nd DBuf slice required, enable it here */ >if (INTEL_GEN(dev_priv) >= 11 && slices_union != hw_enabled_slices) >- icl_dbuf_slices_update(dev_priv, slices_union); >+ gen9_dbuf_slices_update(dev_priv, slices_union); >} > static void icl_dbuf_slice_

[Intel-gfx] [PATCH 1/1] Revert "drm/i915/tgl: Add extra hdc flush workaround"

2020-03-04 Thread Caz Yokoyama
This reverts commit 36a6b5d964d995b536b1925ec42052ee40ba92c4. The commit takes care Wa_1604544889 which was fixed on a0 stepping based on a0 replan. So no SW workaround is required on any stepping now. Signed-off-by: Caz Yokoyama --- drivers/gpu/drm/i915/gt/intel_lrc.c | 20

Re: [Intel-gfx] [PATCH] drm/i915/tgl: WaDisableGPGPUMidThreadPreemption

2020-03-04 Thread Jason Ekstrand
On Wed, Mar 4, 2020 at 11:01 AM Rafael Antognolli wrote: > > On Wed, Mar 04, 2020 at 04:24:13PM +, Tvrtko Ursulin wrote: > > > > On 04/03/2020 16:02, Rafael Antognolli wrote: > > > On Wed, Mar 04, 2020 at 03:31:44PM +, Tvrtko Ursulin wrote: > > > > From: Tvrtko Ursulin > > > > > > > > Ena

Re: [Intel-gfx] [PATCH] drm/i915/tgl: WaDisableGPGPUMidThreadPreemption

2020-03-04 Thread Rafael Antognolli
On Wed, Mar 04, 2020 at 04:24:13PM +, Tvrtko Ursulin wrote: > > On 04/03/2020 16:02, Rafael Antognolli wrote: > > On Wed, Mar 04, 2020 at 03:31:44PM +, Tvrtko Ursulin wrote: > > > From: Tvrtko Ursulin > > > > > > Enable FtrPerCtxtPreemptionGranularityControl bit and select thread- > > >

[Intel-gfx] [PATCH] drm/i915/gt: Cancel banned contexts after GT reset

2020-03-04 Thread Chris Wilson
As we started marking the ce->gem_context as NULL on closure, we can no longer use that to carry closure information. Instead, we can look at whether the context was killed on closure instead. Fixes: 130a95e9098e ("drm/i915/gem: Consolidate ctx->engines[] release") Closes: https://gitlab.freedeskt

Re: [Intel-gfx] [PATCH v2 06/20] drm/i915: Polish some dbuf debugs

2020-03-04 Thread Lisovskiy, Stanislav
On Tue, 2020-02-25 at 19:11 +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Polish some of the dbuf code to give more meaningful debug > messages and whatnot. Also we can switch over to the per-device > debugs/warns at the same time. > > Cc: Stanislav Lisovskiy > Signed-off-by: Ville Syrj

Re: [Intel-gfx] [PATCH] drm/i915/tgl: WaDisableGPGPUMidThreadPreemption

2020-03-04 Thread Tvrtko Ursulin
On 04/03/2020 16:02, Rafael Antognolli wrote: On Wed, Mar 04, 2020 at 03:31:44PM +, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Enable FtrPerCtxtPreemptionGranularityControl bit and select thread- group as the default preemption level. v2: * Remove register whitelisting (Rafael, Tony).

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Apply a heavy handed flush to i915_active

2020-03-04 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Apply a heavy handed flush to i915_active URL : https://patchwork.freedesktop.org/series/74223/ State : success == Summary == CI Bug Log - changes from CI_DRM_8059_full -> Patchwork_16807_full

Re: [Intel-gfx] [PATCH] drm/i915/tgl: WaDisableGPGPUMidThreadPreemption

2020-03-04 Thread Rafael Antognolli
On Wed, Mar 04, 2020 at 03:31:44PM +, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Enable FtrPerCtxtPreemptionGranularityControl bit and select thread- > group as the default preemption level. > > v2: > * Remove register whitelisting (Rafael, Tony). > > Signed-off-by: Tvrtko Ursulin >

Re: [Intel-gfx] [PATCH] drm/i915/dp: Add dpcd link_rate quirk for Apple 15" MBP 2017

2020-03-04 Thread Jani Nikula
On Sat, 29 Feb 2020, Mario Kleiner wrote: > This fixes a problem found on the MacBookPro 2017 Retina panel. > > The panel reports 10 bpc color depth in its EDID, and the > firmware chooses link settings at boot which support enough > bandwidth for 10 bpc (324000 kbit/sec = multiplier 0xc), > but t

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/dp, i915: eDP DPCD backlight control detection fixes (rev4)

2020-03-04 Thread Patchwork
== Series Details == Series: drm/dp, i915: eDP DPCD backlight control detection fixes (rev4) URL : https://patchwork.freedesktop.org/series/72991/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8059_full -> Patchwork_16806_full ==

[Intel-gfx] [PATCH] drm/i915/tgl: WaDisableGPGPUMidThreadPreemption

2020-03-04 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Enable FtrPerCtxtPreemptionGranularityControl bit and select thread- group as the default preemption level. v2: * Remove register whitelisting (Rafael, Tony). Signed-off-by: Tvrtko Ursulin Cc: Michał Winiarski Cc: Joonas Lahtinen Cc: piotr.zdunow...@intel.com Cc: michal

Re: [Intel-gfx] [PATCH resend 1/2] drm/i915: panel: Use intel_panel_compute_brightness() from pwm_setup_backlight()

2020-03-04 Thread Jani Nikula
On Tue, 03 Mar 2020, Hans de Goede wrote: > Hi All, > > On 2/21/20 6:29 PM, Hans de Goede wrote: >> Use intel_panel_compute_brightness() from pwm_setup_backlight() so that >> we correctly take i915_modparams.invert_brightness and/or >> QUIRK_INVERT_BRIGHTNESS into account when setting + getting th

[Intel-gfx] [PATCH] drm/i915: Fix documentation for intel_dpll_get_freq()

2020-03-04 Thread Imre Deak
Fix the following kerneldoc warning and while at it also the doc for the corresponding vfunc hook. $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' Signed-

Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/perf: introduce global sseu pinning

2020-03-04 Thread Lionel Landwerlin
On 04/03/2020 16:20, Tvrtko Ursulin wrote: On 03/03/2020 09:16, Lionel Landwerlin wrote: On Gen11 powergating half the execution units is a functional requirement when using the VME samplers. Not fullfilling this requirement can lead to hangs. This unfortunately plays fairly poorly with the NO

[Intel-gfx] [PATCH] drm/i915: HDCP: fix Ri prime and R0 checks during auth

2020-03-04 Thread Oliver Barta
From: Oliver Barta Including HDCP_STATUS_ENC bit in the checks is pointless. It is simply not set at this point. Signed-off-by: Oliver Barta Fixes: ee5e5e7a5e0f ("drm/i915: Add HDCP framework + base implementation") --- drivers/gpu/drm/i915/display/intel_hdcp.c | 4 ++-- 1 file changed, 2 inse

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915: Apply i915_request_skip() on submission

2020-03-04 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: Apply i915_request_skip() on submission URL : https://patchwork.freedesktop.org/series/74264/ State : success == Summary == CI Bug Log - changes from CI_DRM_8063 -> Patchwork_16816 ===

Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/perf: introduce global sseu pinning

2020-03-04 Thread Tvrtko Ursulin
On 03/03/2020 09:16, Lionel Landwerlin wrote: On Gen11 powergating half the execution units is a functional requirement when using the VME samplers. Not fullfilling this requirement can lead to hangs. This unfortunately plays fairly poorly with the NOA requirements. NOA requires a stable power

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ehl: Check PHY type before reading DPLL frequency (rev2)

2020-03-04 Thread Matt Roper
On Wed, Mar 04, 2020 at 09:55:17AM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/ehl: Check PHY type before reading DPLL frequency (rev2) > URL : https://patchwork.freedesktop.org/series/74214/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_8057_

[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [CI,1/2] drm/i915: Apply i915_request_skip() on submission

2020-03-04 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: Apply i915_request_skip() on submission URL : https://patchwork.freedesktop.org/series/74264/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: wa

Re: [Intel-gfx] [PATCH] drm/i915/edp: Ignore short pulse when panel powered off

2020-03-04 Thread Jani Nikula
On Wed, 04 Mar 2020, Anshuman Gupta wrote: > Few edp panels like Sharp is triggering short and long > hpd pulse after panel is getting powered off. > Currently driver is already ignoring long pulse for eDP > panel but in order to process the short pulse, it turns on > the VDD which requires panel

[Intel-gfx] ✓ Fi.CI.BAT: success for MAINTAINERS: adjust to reservation.h renaming

2020-03-04 Thread Patchwork
== Series Details == Series: MAINTAINERS: adjust to reservation.h renaming URL : https://patchwork.freedesktop.org/series/74262/ State : success == Summary == CI Bug Log - changes from CI_DRM_8063 -> Patchwork_16815 Summary --- **SUC

[Intel-gfx] [PATCH i-g-t] gem_wsim: Fix calibration for default and virtual engine

2020-03-04 Thread Tvrtko Ursulin
From: Tvrtko Ursulin When providing engine calibrations on the command line, we need to apply the one given for RCS to DEFAULT as well. Also when load balancing is used we need to get calibration from one of the real engines from the map which should provide a better match. Signed-off-by: Tvrtk

[Intel-gfx] ✗ Fi.CI.DOCS: warning for MAINTAINERS: adjust to reservation.h renaming

2020-03-04 Thread Patchwork
== Series Details == Series: MAINTAINERS: adjust to reservation.h renaming URL : https://patchwork.freedesktop.org/series/74262/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or membe

[Intel-gfx] [CI 1/2] drm/i915: Add mechanism to submit a context WA on ring submission

2020-03-04 Thread Chris Wilson
From: Mika Kuoppala This patch adds framework to submit an arbitrary batchbuffer on each context switch to clear residual state for render engine on Gen7/7.5 devices. The idea of always emitting the context and vm setup around each request is primary to make reset recovery easy, and not require

[Intel-gfx] [CI 2/2] drm/i915/gen7: Clear all EU/L3 residual contexts

2020-03-04 Thread Chris Wilson
From: Prathap Kumar Valsan On gen7 and gen7.5 devices, there could be leftover data residuals in EU/L3 from the retiring context. This patch introduces workaround to clear that residual contexts, by submitting a batch buffer with dedicated HW context to the GPU with ring allocation for each conte

[Intel-gfx] [PATCH] drm/i915/edp: Ignore short pulse when panel powered off

2020-03-04 Thread Anshuman Gupta
Few edp panels like Sharp is triggering short and long hpd pulse after panel is getting powered off. Currently driver is already ignoring long pulse for eDP panel but in order to process the short pulse, it turns on the VDD which requires panel power_cycle_delay + panel_power_on_delay these delay o

[Intel-gfx] [CI 2/2] drm/i915/gt: Propagate change in error status to children on unhold

2020-03-04 Thread Chris Wilson
As we release the head requests back into the queue, propagate any change in error status that may have occurred while the requests were temporarily suspended. Closes: https://gitlab.freedesktop.org/drm/intel/issues/1277 Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Mika Kuoppala

[Intel-gfx] [CI 1/2] drm/i915: Apply i915_request_skip() on submission

2020-03-04 Thread Chris Wilson
Trying to use i915_request_skip() prior to i915_request_add() causes us to try and fill the ring upto request->postfix, which has not yet been set, and so may cause us to memset() past the end of the ring. Instead of skipping the request immediately, just flag the error on the request (only accept

[Intel-gfx] [Fwd: ✓ Fi.CI.IGT: success for gem_userptr_blits: Refresh other now MMAP_GTT dependent subtests]

2020-03-04 Thread Janusz Krzysztofik
Hi, Here are results from Trybot examination of the same IGT patches but with the kernel patch that introduced lockdep loop preventive failures for non-GTT mapping types reverted. Thanks, Janusz https://lists.freedesktop.org/archives/intel-gfx-trybot/2020-March/087235.html Forwarded

Re: [Intel-gfx] [PATCH] MAINTAINERS: adjust to reservation.h renaming

2020-03-04 Thread Christian König
Am 04.03.20 um 13:07 schrieb Lukas Bulwahn: Commit 52791eeec1d9 ("dma-buf: rename reservation_object to dma_resv") renamed include/linux/reservation.h to include/linux/dma-resv.h, but missed the reference in the MAINTAINERS entry. Since then, ./scripts/get_maintainer.pl --self-test complains:

[Intel-gfx] [PATCH] MAINTAINERS: adjust to reservation.h renaming

2020-03-04 Thread Lukas Bulwahn
Commit 52791eeec1d9 ("dma-buf: rename reservation_object to dma_resv") renamed include/linux/reservation.h to include/linux/dma-resv.h, but missed the reference in the MAINTAINERS entry. Since then, ./scripts/get_maintainer.pl --self-test complains: warning: no file matches F: include/linux/res

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Propagate change in error status to children on unhold

2020-03-04 Thread Mika Kuoppala
Chris Wilson writes: > As we release the head requests back into the queue, propagate any > change in error status that may have occurred while the requests were > temporarily suspended. > > Closes: https://gitlab.freedesktop.org/drm/intel/issues/1277 > Signed-off-by: Chris Wilson > Cc: Tvrtko U

Re: [Intel-gfx] [PATCH v2 3/9] drm/i915: Split i9xx_read_lut_8() to gmch vs. ilk variants

2020-03-04 Thread Ville Syrjälä
> https://github.com/0day-ci/linux/commits/Ville-Syrjala/drm-i915-Gamma-cleanups/20200304-043847 > base: git://anongit.freedesktop.org/drm-intel for-linux-next > > If you fix the issue, kindly add following tag > Reported-by: kbuild test robot > > New smatch warnings: &g

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Don't check for wm changes until we've compute the wms fully

2020-03-04 Thread Ville Syrjälä
On Wed, Mar 04, 2020 at 12:21:01AM +, Souza, Jose wrote: > On Fri, 2020-02-28 at 22:35 +0200, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Currently we're comparing the watermarks between the old and new > > states > > before we've fully computed the new watermarks. In particular > >

[Intel-gfx] ✓ Fi.CI.BAT: success for HDCP misc (rev3)

2020-03-04 Thread Patchwork
== Series Details == Series: HDCP misc (rev3) URL : https://patchwork.freedesktop.org/series/73345/ State : success == Summary == CI Bug Log - changes from CI_DRM_8063 -> Patchwork_16814 Summary --- **SUCCESS** No regressions foun

[Intel-gfx] ✗ Fi.CI.DOCS: warning for HDCP misc (rev3)

2020-03-04 Thread Patchwork
== Series Details == Series: HDCP misc (rev3) URL : https://patchwork.freedesktop.org/series/73345/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Apply i915_request_skip() on submission

2020-03-04 Thread Mika Kuoppala
Chris Wilson writes: > Trying to use i915_request_skip() prior to i915_request_add() causes us > to try and fill the ring upto request->postfix, which has not yet been > set, and so may cause us to memset() past the end of the ring. > > Instead of skipping the request immediately, just flag the e

[Intel-gfx] [PATCH i-g-t] i915/i915_pm_rpm: Flush pm-idle before waiting for suspend

2020-03-04 Thread Chris Wilson
After we may have deliberately woken the device up for reading the debugfs/sysfs file, we then wait for the system to suspend again before trying the next. Speed up the wait by first flushing the pm-idle. "Slowest file + suspend: /sys/kernel/debug/dri/0/i915_forcewake_user took 3951.33ms!" Signed

[Intel-gfx] [PATCH v3 2/2] drm/i915: dont retry stream management at seq_num_m roll over

2020-03-04 Thread Ramalingam C
When roll over detected for seq_num_m, we shouldn't continue with stream management with rolled over value. So we are terminating the stream management retry, on roll over of the seq_num_m. v2: using drm_dbg_kms instead of DRM_DEBUG_KMS [Anshuman] v3: dev_priv is used as i915 [JaniN] v4: ro

[Intel-gfx] [PATCH v3 1/2] drm/i915: terminate reauth at stream management failure

2020-03-04 Thread Ramalingam C
As per the HDCP2.2 compliance test 1B-10 expectation, when stream management for a repeater fails, we retry thrice and when it fails in all retries, HDCP2.2 reauthentication aborted at kernel. v2: seq_num_m++ is extended for steam management failures too.[Anshuman] v3: use drm_dbg_kms instead

[Intel-gfx] [PATCH v3 0/2] HDCP misc

2020-03-04 Thread Ramalingam C
Some left out HDCP2.2 compliance fixes. Ramalingam C (2): drm/i915: terminate reauth at stream management failure drm/i915: dont retry stream management at seq_num_m roll over drivers/gpu/drm/i915/display/intel_hdcp.c | 89 ++- 1 file changed, 56 insertions(+), 33 deletio

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/3] drm/i915: Drop inspection of execbuf flags during evict

2020-03-04 Thread Patchwork
== Series Details == Series: series starting with [CI,1/3] drm/i915: Drop inspection of execbuf flags during evict URL : https://patchwork.freedesktop.org/series/74217/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8057_full -> Patchwork_16804_full ===

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Fix uninitialized variable

2020-03-04 Thread Jani Nikula
On Tue, 03 Mar 2020, Matt Roper wrote: > On Tue, Mar 03, 2020 at 05:25:21PM +0200, Jani Nikula wrote: >> On Tue, 03 Mar 2020, Aditya Swarup wrote: >> > - struct lrc_timestamp data; >> > + struct lrc_timestamp data = { 0 }; >> >> {} is preferred over {0}. > > Is there a reference for this (e.g.

[Intel-gfx] [PATCH i-g-t 1/3] tests/gem_userptr_blits: More effectively set pages before invalidation

2020-03-04 Thread Janusz Krzysztofik
It has been observed that mmap-offset-invalidate@wb subtest has never triggered a lockdep loop complain. To fix it, don't use the ->domain field of a mapping type being examined, always set read and write domains to I915_GEM_DOMAIN_GTT instead. Signed-off-by: Janusz Krzysztofik --- tests/i915/g

[Intel-gfx] [RFC PATCH i-g-t 3/3] tests/gem_userptr_blits: Add active variant of mmap-offset-invalidate

2020-03-04 Thread Janusz Krzysztofik
Add a variant that also attaches a igt_spin_t to the userptr, waits for it to start executing, call igt_spin_set_timeout and then do the munmap. Suggested-by: Chris Wilson Signed-off-by: Janusz Krzysztofik --- tests/i915/gem_userptr_blits.c | 33 - 1 file changed

[Intel-gfx] [PATCH i-g-t 2/3] tests/gem_userptr_blits: More exact detection of lockdep loop prevention

2020-03-04 Thread Janusz Krzysztofik
If mmap-offset over userptr fails, skip with respective message about lockdep loop preventive failure occurrence only if ENODEV, fail otherwise. Signed-off-by: Janusz Krzysztofik --- tests/i915/gem_userptr_blits.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/tests/i915

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