== Series Details ==
Series: HAX timer: Describe the delayed_work for a freed timer (rev2)
URL : https://patchwork.freedesktop.org/series/75740/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8283_full -> Patchwork_17268_full
On 2020.04.10 00:58:16 +0300, Jani Nikula wrote:
> On Fri, 10 Apr 2020, Masahiro Yamada wrote:
> > Including subdirectory Makefile from the driver main Makefile does not
> > buy us much because this is not real isolation.
>
> The isolation it does buy us is that gvt/ subdirectory is developed and
== Series Details ==
Series: i915 lpsp support for lpsp igt (rev7)
URL : https://patchwork.freedesktop.org/series/74648/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8281_full -> Patchwork_17264_full
Summary
---
**W
== Series Details ==
Series: series starting with [01/23] perf/core: Only copy-to-user after
completely unlocking all locks, v3.
URL : https://patchwork.freedesktop.org/series/75668/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8275_full -> Patchwork_17253_full
=
On Fri, 10 Apr 2020, Masahiro Yamada wrote:
> Including subdirectory Makefile from the driver main Makefile does not
> buy us much because this is not real isolation.
The isolation it does buy us is that gvt/ subdirectory is developed and
maintained on a separate mailing list and separate git rep
Hi Ville.
> > > > > index 264d7ad004b4..9e88a37f55e9 100644
> > > > > --- a/drivers/gpu/drm/gma500/psb_intel_sdvo.c
> > > > > +++ b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
> > > > > @@ -132,6 +132,8 @@ struct psb_intel_sdvo {
> > > > > /* DDC bus used by this SDVO encoder */
> > > > >
Hi Chris,
On Wed, Apr 08, 2020 at 01:59:46PM +0100, Chris Wilson wrote:
> Sometimes the bg_load only wakes up once or twice in 3s. That's
> just unbelievable, so include some measurements to see how long the
> load spends in submission & waiting.
>
> Signed-off-by: Chris Wilson
Reviewed-by: And
On Thu, Apr 09, 2020 at 10:49:52PM +0300, Ville Syrjälä wrote:
> On Tue, Apr 07, 2020 at 09:35:37PM +0200, Sam Ravnborg wrote:
> > On Tue, Apr 07, 2020 at 10:08:00PM +0300, Ville Syrjälä wrote:
> > > On Tue, Apr 07, 2020 at 08:56:53PM +0200, Sam Ravnborg wrote:
> > > > Hi Ville.
> > > >
> > > > On
On Tue, Apr 07, 2020 at 09:35:37PM +0200, Sam Ravnborg wrote:
> On Tue, Apr 07, 2020 at 10:08:00PM +0300, Ville Syrjälä wrote:
> > On Tue, Apr 07, 2020 at 08:56:53PM +0200, Sam Ravnborg wrote:
> > > Hi Ville.
> > >
> > > On Fri, Apr 03, 2020 at 11:40:06PM +0300, Ville Syrjala wrote:
> > > > From:
Quoting Colin King (2020-04-09 14:31:07)
> From: Colin Ian King
>
> The variable err is being initialized with a value that is never read
> and it is being updated later with a new value. The initialization is
> redundant and can be removed.
>
> Addresses-Coverity: ("Unused value")
> Signed-off
On Thu, Apr 09, 2020 at 05:14:01PM +0300, Kai Vehmanen wrote:
> Hey,
>
> On Mon, 30 Mar 2020, Kai Vehmanen wrote:
>
> > Replace the TGL/ICL specific platform checks with a more generic check
> > using INTEL_GEN(). Fixes bug with broken audio after S3 resume on JSL
> > platforms.
>
> I would be (
== Series Details ==
Series: SAGV support for Gen12+ (rev14)
URL : https://patchwork.freedesktop.org/series/75129/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8285 -> Patchwork_17271
Summary
---
**SUCCESS**
No r
== Series Details ==
Series: SAGV support for Gen12+ (rev14)
URL : https://patchwork.freedesktop.org/series/75129/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915: Start passing latency as parameter
Okay!
Commit: drm/i915: Eliminate magic numb
On Wed, Apr 08, 2020 at 07:52:27PM +0530, Kishore Kadiyala wrote:
> Currently the plane property doesn't have support for YCBCR_BT2020,
> which enables the corresponding color conversion mode on plane CSC.
> Enabling the plane property for the planes for GLK & ICL+ platforms.
>
> V2: Enabling supp
== Series Details ==
Series: SAGV support for Gen12+ (rev14)
URL : https://patchwork.freedesktop.org/series/75129/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
db3bb77d347e drm/i915: Start passing latency as parameter
39684149a1cb drm/i915: Eliminate magic numbers "0" and "1"
== Series Details ==
Series: series starting with [1/2] drm/i915: remove unneeded ccflags-y from
gvt/Makefile
URL : https://patchwork.freedesktop.org/series/75756/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8284 -> Patchwork_17270
==
On 4/9/20 7:03 AM, Michal Wajdeczko wrote:
On 09.04.2020 02:56, Daniele Ceraolo Spurio wrote:
We stopped using the parameter in commit dd18cedfa36f
("drm/i915/guc: Move the pin bias value from GuC to GGTT"),
so we can safely remove it.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Matthew Bro
On Wed, Apr 08, 2020 at 07:18:11PM +0300, Lisovskiy, Stanislav wrote:
> On Wed, Apr 08, 2020 at 06:54:09PM +0300, Lisovskiy, Stanislav wrote:
> > On Wed, Apr 08, 2020 at 05:55:02PM +0300, Ville Syrjälä wrote:
> > > On Wed, Apr 08, 2020 at 10:58:04AM +0300, Lisovskiy, Stanislav wrote:
> > > > On Tue
== Series Details ==
Series: series starting with [1/2] drm/i915: remove unneeded ccflags-y from
gvt/Makefile
URL : https://patchwork.freedesktop.org/series/75756/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915: remove unneeded ccflags-y from
That is a preparation patch before next one where we
introduce old_bw_state and a bunch of other changes
as well.
In a review comment it was suggested to split out
at least that renaming into a separate patch, what
is done here.
v2: Removed spurious space
Reviewed-by: Ville Syrjälä
Signed-off-by
According to BSpec 53998, we should try to
restrict qgv points, which can't provide
enough bandwidth for desired display configuration.
Currently we are just comparing against all of
those and take minimum(worst case).
v2: Fixed wrong PCode reply mask, removed hardcoded
values.
v3: Forbid si
Flip the switch and enable SAGV support
for Gen12 also.
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/intel_pm.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 238793243fd9..56e1b208bead 100644
--- a/dr
== Series Details ==
Series: series starting with [1/2] drm/i915: remove unneeded ccflags-y from
gvt/Makefile
URL : https://patchwork.freedesktop.org/series/75756/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b7e9f445aafa drm/i915: remove unneeded ccflags-y from gvt/Makefile
Future platforms require per-crtc SAGV evaluation
and serializing global state when those are changed
from different commits.
Signed-off-by: Stanislav Lisovskiy
Cc: Ville Syrjälä
Cc: James Ausmus
---
drivers/gpu/drm/i915/display/intel_bw.h | 6 +++
drivers/gpu/drm/i915/intel_pm.c | 63
Starting from TGL we need to have a separate wm0
values for SAGV and non-SAGV which affects
how calculations are done.
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/display/intel_display.c | 8 +-
.../drm/i915/display/intel_display_types.h| 3 +
drivers/gpu/drm/i915/intel_
We need a new PCode request commands and reply codes
to be added as a prepartion patch for QGV points
restricting for new SAGV support.
v2: - Extracted those changes into separate patch
(Ville Syrjälä)
v3: - Moved new PCode masks to another place from
PCode commands(Ville)
Signed-off
Introduce platform dependent SAGV checking in
combination with bandwidth state pipe SAGV mask.
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/intel_pm.c | 71 ++---
1 file changed, 57 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel
Lets have a unified way to handle SAGV changes,
espoecially considering the upcoming Gen12 changes.
Current "standard" way of doing this in commit_tail
is pre/post plane updates, when everything which
has to be forbidden and not supported in new config
has to be restricted before update and relaxe
According to many computer science sources - magic values
in code _are_ _bad_. For many reasons: the reason is that "0"
or "1" or whatever magic values confuses and doesn't give any
info why this parameter is this value and what it's meaning
is.
I renamed "0" to COLOR_PLANE_Y and "1" to COLOR_PLANE
Addressing one of the comments, recommending to extract platform
specific code from intel_can_enable_sagv as a preparation, before
we are going to add support for tgl+.
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/intel_pm.c | 67 +++--
1 file changed,
Add correspondent helpers to be able to get old/new bandwidth
global state object.
v2: - Fixed typo in function call
v3: - Changed new functions naming to use convention proposed
by Jani Nikula, i.e intel_bw_* in intel_bw.c file.
v4: - Change function naming back to intel_atomic* pattern,
We need to start passing memory latency as a
parameter when calculating plane wm levels,
as latency can get changed in different
circumstances(for example with or without SAGV).
So we need to be more flexible on that matter.
v2: Changed latency type from u32 to unsigned int(Ville Syrjälä)
Reviewe
For future Gen12 SAGV implementation we need to
seemlessly alter wm levels calculated, depending
on whether we are allowed to enable SAGV or not.
So this accessor will give additional flexibility
to do that.
Currently this accessor is still simply working
as "pass-through" function. This will be
For Gen11+ platforms BSpec suggests disabling specific
QGV points separately, depending on bandwidth limitations
and current display configuration. Thus it required adding
a new PCode request for disabling QGV points and some
refactoring of already existing SAGV code.
Also had to refactor intel_can
== Series Details ==
Series: drm/i915: remove redundant assignment to variable err
URL : https://patchwork.freedesktop.org/series/75747/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8284 -> Patchwork_17269
Summary
---
Including subdirectory Makefile from the driver main Makefile does not
buy us much because this is not real isolation.
Having a single Makefile at the top of the module is clearer, and
it is what this driver almost does.
Move all gvt objects to the i915 main Makefile.
Signed-off-by: Masahiro Yam
When CONFIG_DRM_I915_GVT=y, the same include path is added twice.
drivers/gpu/drm/i915/Makefile specifies:
subdir-ccflags-y += -I$(srctree)/$(src)
drivers/gpu/drm/i915/gvt/Makefile adds the second '-I $(srctree)/$(src)',
which is redundant.
The include path '-I $(srctree)/$(src)/$(GVT_DIR)/'
== Series Details ==
Series: uC code cleanups
URL : https://patchwork.freedesktop.org/series/75719/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8281_full -> Patchwork_17262_full
Summary
---
**SUCCESS**
No regres
Hey,
On Mon, 30 Mar 2020, Kai Vehmanen wrote:
> Replace the TGL/ICL specific platform checks with a more generic check
> using INTEL_GEN(). Fixes bug with broken audio after S3 resume on JSL
> platforms.
I would be (gently) beaten with a stick on alsa-devel for sending this
type of content free
On 09.04.2020 02:56, Daniele Ceraolo Spurio wrote:
> We stopped using the parameter in commit dd18cedfa36f
> ("drm/i915/guc: Move the pin bias value from GuC to GGTT"),
> so we can safely remove it.
>
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Matthew Brost
> Cc: Michal Wajdeczko
> Cc: Jo
== Series Details ==
Series: HAX timer: Describe the delayed_work for a freed timer (rev2)
URL : https://patchwork.freedesktop.org/series/75740/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8283 -> Patchwork_17268
Summary
Hi Dave, Daniel,
Here's this week round of drm-misc-next-fixes
Maxime
drm-misc-next-fixes-2020-04-09:
A few DMA-related fixes, an OOB fix for virtio and a probe-related fix for
analogix_dp
The following changes since commit 0e7e6198af28c1573267aba1be33dd0b7fb35691:
Merge branch 'ttm-transhuge
Since the PWM framework is switching struct pwm_state.duty_cycle's
datatype to u64, prepare for this transition by using DIV_ROUND_UP_ULL
to handle a 64-bit dividend.
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: David Airlie
Cc: Daniel Vetter
Cc: Chris Wilson
Cc: "Ville Syrjälä"
Cc: intel-gfx@lis
Extend initial check for support of MMAP_GTT mapping to userptr with
equivalent checks for each MMAP_OFFSET mapping type supported by i915
driver. Based on that, extend coverage of process-exit-gtt* subtests
over non-GTT mapping types. In case of dmabuf-* subtests, use first
supported mapping typ
Refresh subtests which are still using pre-v4 MMAP_GTT API.
v2: Patch 2/2: clear 'map' before reuse (Zbigniew).
v3: Patch 2/2: kill out-of-context errno check (Chris).
Janusz Krzysztofik (2):
tests/gem_userptr_blits: Refresh readonly-mmap-unsync exercise
tests/gem_userptr_blits: Refresh other
Upgrade the subtest to use MMAP_GTT API v4 (aka MMAP_OFFSET),
dynamically examine each mapping type supported by i915 driver.
Signed-off-by: Janusz Krzysztofik
Reviewed-by: Zbigniew Kempczyński
---
tests/i915/gem_userptr_blits.c | 21 -
1 file changed, 16 insertions(+), 5 de
Quoting Lionel Landwerlin (2020-04-09 12:16:48)
> On 09/04/2020 13:52, Chris Wilson wrote:
> > Quoting Lionel Landwerlin (2020-04-08 21:00:59)
> >> On 03/04/2020 12:12, Chris Wilson wrote:
> >>> Whenever we walk along the dma-fence-chain, we prune signaled links to
> >>> keep the chain nice and tid
From: Colin Ian King
The variable err is being initialized with a value that is never read
and it is being updated later with a new value. The initialization is
redundant and can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/i915/gem/selfte
== Series Details ==
Series: HAX timer: Describe the delayed_work for a freed timer (rev2)
URL : https://patchwork.freedesktop.org/series/75740/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
05d26e5da5b7 HAX timer: Describe the delayed_work for a freed timer
-:8: WARNING:COMMIT
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: re-enable ARAT expired
interrupt when using GuC
URL : https://patchwork.freedesktop.org/series/75715/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8281_full -> Patchwork_17261_full
== Series Details ==
Series: series starting with [1/3] dma-buf: Prettify typecasts for
dma-fence-chain
URL : https://patchwork.freedesktop.org/series/75743/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8283 -> Patchwork_17267
From: Janusz Krzysztofik
There is a test which verifies unloading of i915 driver module but no
test exists that checks how a driver behaves when it gets unbound from
a device or when the device gets unplugged. Implement such test using
sysfs interface.
Two minimalistic subtests - "unbind-rebind
== Series Details ==
Series: series starting with [v5,1/4] drm/i915/perf: break OA config buffer
object in 2
URL : https://patchwork.freedesktop.org/series/75741/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8283 -> Patchwork_17266
===
== Series Details ==
Series: series starting with [1/3] dma-buf: Prettify typecasts for
dma-fence-chain
URL : https://patchwork.freedesktop.org/series/75743/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5fe27cc9dd40 dma-buf: Prettify typecasts for dma-fence-chain
38f765418273
Improve upon the
<3> [310.437368] ODEBUG: free active (active state 0) object type: timer_list
hint: delayed_work_timer_fn+0x0/0x10
by describing what delayed_work was queued instead.
Signed-off-by: Chris Wilson
---
kernel/time/timer.c | 9 -
1 file changed, 8 insertions(+), 1 deletio
== Series Details ==
Series: HAX timer: Describe the delayed_work for a freed timer
URL : https://patchwork.freedesktop.org/series/75740/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/comp
On 09/04/2020 13:52, Chris Wilson wrote:
Quoting Lionel Landwerlin (2020-04-08 21:00:59)
On 03/04/2020 12:12, Chris Wilson wrote:
Whenever we walk along the dma-fence-chain, we prune signaled links to
keep the chain nice and tidy. This leads to situations where we can
prune a link and report th
Whenever we walk along the dma-fence-chain, we prune signaled links to
keep the chain nice and tidy. This leads to situations where we can
prune a link and report the earlier fence as the target seqno --
violating our own consistency checks that the seqno is not more advanced
than the last element
A few very simple testcases to exercise the dma-fence-chain API.
Signed-off-by: Chris Wilson
Reviewed-by: Venkata Sandeep Dhanalakota
---
drivers/dma-buf/Makefile | 3 +-
drivers/dma-buf/selftests.h | 1 +
drivers/dma-buf/st-dma-fence-chain.c | 713 +
Inside dma-fence-chain, we use a cmpxchg on an RCU-protected pointer. To
avoid the sparse warning for using the RCU pointer directly, we have to
cast away the __rcu annotation. However, we don't need to use void*
everywhere and can stick to the dma_fence*.
Signed-off-by: Chris Wilson
Reviewed-by:
Quoting Lionel Landwerlin (2020-04-08 21:00:59)
> On 03/04/2020 12:12, Chris Wilson wrote:
> > Whenever we walk along the dma-fence-chain, we prune signaled links to
> > keep the chain nice and tidy. This leads to situations where we can
> > prune a link and report the earlier fence as the target s
We want to enable performance monitoring on multiple contexts to cover
the Iris use case of using 2 GEM contexts (3D & compute).
So start by breaking the OA configuration BO which contains global &
per context register writes.
NOA muxes & OA configurations are global, while FLEXEU register
config
Add 2 new properties to the i915-perf open ioctl to specify an array
of GEM context handles as well as the length of the array.
This can be used by drivers using multiple GEM contexts to implement a
single GL context.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 58 ++
Make all the internal necessary changes before we flip the switch.
v2: Use an unlimited number of intel contexts (Chris)
v3: Handle GEM context with multiple RCS0 logical contexts (Chris)
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 556 +++-
Chris doesn't like that.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 152 +++--
drivers/gpu/drm/i915/i915_perf_types.h | 10 +-
2 files changed, 104 insertions(+), 58 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/
Improve upon the
<3> [310.437368] ODEBUG: free active (active state 0) object type: timer_list
hint: delayed_work_timer_fn+0x0/0x10
by describing what delayed_work was queued instead.
Signed-off-by: Chris Wilson
---
kernel/time/timer.c | 9 -
1 file changed, 8 insertions(+), 1 deletio
== Series Details ==
Series: i915 lpsp support for lpsp igt (rev7)
URL : https://patchwork.freedesktop.org/series/74648/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8281 -> Patchwork_17264
Summary
---
**SUCCESS**
67 matches
Mail list logo
