[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Add per ctx batchbuffer wa for timestamp

== Series Details == Series: series starting with [1/3] drm/i915: Add per ctx batchbuffer wa for timestamp URL : https://patchwork.freedesktop.org/series/76102/ State : success == Summary == CI Bug Log - changes from CI_DRM_8319_full -> Patchwork_17353_full ===

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/2] drm/i915/selftests: Move gpu energy measurement into its own little lib

== Series Details == Series: series starting with [CI,1/2] drm/i915/selftests: Move gpu energy measurement into its own little lib URL : https://patchwork.freedesktop.org/series/76103/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8319_full -> Patchwork_17354_full ===

[Intel-gfx] [CI 3/3] drm/i915/selftests: Check RPS controls

Check that the GPU does respond to our RPS frequency requests by setting our desired frequency. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 1 + drivers/gpu/drm/i915/gt/selftest_rps.c | 196 --- drivers/gpu/drm/i915/gt/selftest_rps.h | 1

[Intel-gfx] [CI 2/3] drm/i915/selftests: Skip energy consumption tests if not controlling freq

If we can not manipulate the frequency with RPS, then comparing min/max power consumption is pointless / misleading. We will leave the warning about not being able to control the frequency selection via RPS to other tests so as not to confuse this more specialised check. Signed-off-by: Chris Wilso

[Intel-gfx] [CI 1/3] drm/i915/selftests: Verify frequency scaling with RPS

One of the core tenents of reclocking the GPU is that its throughput scales with the clock frequency. We can observe this by incrementing a loop counter on the GPU, and compare the different execution rates at the notional RPS frequencies. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/

[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [CI,1/3] drm/i915/selftests: Verify frequency scaling with RPS

== Series Details == Series: series starting with [CI,1/3] drm/i915/selftests: Verify frequency scaling with RPS URL : https://patchwork.freedesktop.org/series/76156/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 /home/cidrm/kernel/Documentation/gpu/i915.rst:610:

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/3] drm/i915/selftests: Verify frequency scaling with RPS

== Series Details == Series: series starting with [CI,1/3] drm/i915/selftests: Verify frequency scaling with RPS URL : https://patchwork.freedesktop.org/series/76156/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8323 -> Patchwork_17370 ===

[Intel-gfx] [CI 4/4] drm/i915/gt: Convert gen9+ frequency range to 50MHz increments

The RPS bins are in units of 33MHz, so if we want 50MHz increments, we need 2/3, not 1/3! Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_llc.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_llc.c b/drivers/gpu/drm/i915/gt/i

[Intel-gfx] [CI 1/4] drm/i915/selftests: Verify frequency scaling with RPS

One of the core tenents of reclocking the GPU is that its throughput scales with the clock frequency. We can observe this by incrementing a loop counter on the GPU, and compare the different execution rates at the notional RPS frequencies. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/

[Intel-gfx] [CI 2/4] drm/i915/selftests: Skip energy consumption tests if not controlling freq

If we can not manipulate the frequency with RPS, then comparing min/max power consumption is pointless / misleading. We will leave the warning about not being able to control the frequency selection via RPS to other tests so as not to confuse this more specialised check. Signed-off-by: Chris Wilso

[Intel-gfx] [CI 3/4] drm/i915/selftests: Check RPS controls

Check that the GPU does respond to our RPS frequency requests by setting our desired frequency. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 1 + drivers/gpu/drm/i915/gt/selftest_rps.c | 196 --- drivers/gpu/drm/i915/gt/selftest_rps.h | 1

[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [CI,1/4] drm/i915/selftests: Verify frequency scaling with RPS

== Series Details == Series: series starting with [CI,1/4] drm/i915/selftests: Verify frequency scaling with RPS URL : https://patchwork.freedesktop.org/series/76157/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 /home/cidrm/kernel/Documentation/gpu/i915.rst:610:

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/4] drm/i915/selftests: Verify frequency scaling with RPS

== Series Details == Series: series starting with [CI,1/4] drm/i915/selftests: Verify frequency scaling with RPS URL : https://patchwork.freedesktop.org/series/76157/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8323 -> Patchwork_17371 ===

[Intel-gfx] [CI 3/4] drm/i915/selftests: Check RPS controls

Check that the GPU does respond to our RPS frequency requests by setting our desired frequency. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 1 + drivers/gpu/drm/i915/gt/selftest_rps.c | 196 --- drivers/gpu/drm/i915/gt/selftest_rps.h | 1

[Intel-gfx] [CI 1/4] drm/i915/selftests: Verify frequency scaling with RPS

One of the core tenents of reclocking the GPU is that its throughput scales with the clock frequency. We can observe this by incrementing a loop counter on the GPU, and compare the different execution rates at the notional RPS frequencies. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/

[Intel-gfx] [CI 2/4] drm/i915/selftests: Skip energy consumption tests if not controlling freq

If we can not manipulate the frequency with RPS, then comparing min/max power consumption is pointless / misleading. We will leave the warning about not being able to control the frequency selection via RPS to other tests so as not to confuse this more specialised check. Signed-off-by: Chris Wilso

[Intel-gfx] [CI 4/4] drm/i915/selftests: Split RPS frequency measurement

Split the frequency measurement into two modes, so that we can judge the impact of the llc setup on top of the pure CS frequency scaling. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 3 +- drivers/gpu/drm/i915/gt/selftest_rps.c | 156 ++- dri

[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [CI,1/4] drm/i915/selftests: Verify frequency scaling with RPS

== Series Details == Series: series starting with [CI,1/4] drm/i915/selftests: Verify frequency scaling with RPS URL : https://patchwork.freedesktop.org/series/76158/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 /home/cidrm/kernel/Documentation/gpu/i915.rst:610:

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/4] drm/i915/selftests: Verify frequency scaling with RPS

== Series Details == Series: series starting with [CI,1/4] drm/i915/selftests: Verify frequency scaling with RPS URL : https://patchwork.freedesktop.org/series/76158/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8323 -> Patchwork_17372 ===

Re: [Intel-gfx] [PATCH i-g-t] i915/gem_exec_balancer: Kick tasklets harder

HI Chris , As Discussed , are you planning to change the load %age for full-* subtests ? igt_assert_f(load > 0.90 to 66 % ? Thanks Arjun M -Original Message- From: Chris Wilson Sent: Friday, April 17, 2020 6:27 PM To: intel-gfx@lists.freedesktop.org Cc: igt-...@lists.freedesktop.org

[Intel-gfx] [PATCH v2] drm/i915: store HW tagging information into tracepoints

In Gpuvis [1] we added matching of the OA report tags against i915 tracepoints fields to figure what workload was submitted by what process. It doesn't matter much whether HW tags get reused for a single request, as it gets preempted for example. All we need is link between the OA report and seqno/

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: store HW tagging information into tracepoints (rev2)

== Series Details == Series: drm/i915: store HW tagging information into tracepoints (rev2) URL : https://patchwork.freedesktop.org/series/75849/ State : warning == Summary == $ dim checkpatch origin/drm-tip be955ab0bea3 drm/i915: store HW tagging information into tracepoints -:14: ERROR:GIT_C

[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: store HW tagging information into tracepoints (rev2)

== Series Details == Series: drm/i915: store HW tagging information into tracepoints (rev2) URL : https://patchwork.freedesktop.org/series/75849/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 /home/cidrm/kernel/Documentation/gpu/i915.rst:610: WARNING: duplicate lab

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: store HW tagging information into tracepoints (rev2)

== Series Details == Series: drm/i915: store HW tagging information into tracepoints (rev2) URL : https://patchwork.freedesktop.org/series/75849/ State : success == Summary == CI Bug Log - changes from CI_DRM_8324 -> Patchwork_17373 Summary

Re: [Intel-gfx] [PATCH v2] drm/i915: store HW tagging information into tracepoints

Quoting Lionel Landwerlin (2020-04-19 14:46:27) > In Gpuvis [1] we added matching of the OA report tags against i915 > tracepoints fields to figure what workload was submitted by what > process. It doesn't matter much whether HW tags get reused for a > single request, as it gets preempted for examp

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Refactor dma mask usage to a common helper

== Series Details == Series: drm/i915: Refactor dma mask usage to a common helper URL : https://patchwork.freedesktop.org/series/76104/ State : success == Summary == CI Bug Log - changes from CI_DRM_8322_full -> Patchwork_17355_full Summary

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Flatten intel_dp_check_mst_status() a bit

== Series Details == Series: series starting with [1/2] drm/i915: Flatten intel_dp_check_mst_status() a bit URL : https://patchwork.freedesktop.org/series/76105/ State : success == Summary == CI Bug Log - changes from CI_DRM_8322_full -> Patchwork_17356_full ==

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: remove redundant assignment to variable test_result

== Series Details == Series: drm/i915: remove redundant assignment to variable test_result URL : https://patchwork.freedesktop.org/series/76108/ State : success == Summary == CI Bug Log - changes from CI_DRM_8322_full -> Patchwork_17357_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Add ICL PG3 PW ID for EHL

== Series Details == Series: drm/i915: Add ICL PG3 PW ID for EHL URL : https://patchwork.freedesktop.org/series/76109/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8322_full -> Patchwork_17358_full Summary --- **FAI

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Refactor setting dma info to a common helper (rev2)

== Series Details == Series: drm/i915: Refactor setting dma info to a common helper (rev2) URL : https://patchwork.freedesktop.org/series/76112/ State : success == Summary == CI Bug Log - changes from CI_DRM_8322_full -> Patchwork_17359_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: Poison residual state [HWSP] across resume. (rev2)

== Series Details == Series: drm/i915/gt: Poison residual state [HWSP] across resume. (rev2) URL : https://patchwork.freedesktop.org/series/76100/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8322_full -> Patchwork_17360_full ==

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Remove object_is_locked assertion from unpin_from_display_plane

== Series Details == Series: drm/i915/gem: Remove object_is_locked assertion from unpin_from_display_plane URL : https://patchwork.freedesktop.org/series/76120/ State : success == Summary == CI Bug Log - changes from CI_DRM_8322_full -> Patchwork_17361_full ===

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tgl: Wa_14011059788 (rev3)

== Series Details == Series: drm/i915/tgl: Wa_14011059788 (rev3) URL : https://patchwork.freedesktop.org/series/75990/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8322_full -> Patchwork_17363_full Summary --- **FAI

Re: [Intel-gfx] [PATCH xf86-video-intel v2] Sync i915_pciids upto 8717c6b7414f

On 04/17/2020 09:45 PM, Chris Wilson wrote: >> diff --git a/src/intel_module.c b/src/intel_module.c >> > index a71c2e40b774..e0b94c190254 100644 >> > --- a/src/intel_module.c >> > +++ b/src/intel_module.c >> > @@ -357,7 +357,7 @@ static const struct pci_id_match intel_device_match[] >> > = { >>

[Intel-gfx] linux-next: build failure after merge of the drm-misc tree

Hi all, After merging the drm-misc tree, today's linux-next build (powerpc allyesconfig) failed like this: drivers/video/fbdev/controlfb.c: In function 'controlfb_mmap': drivers/video/fbdev/controlfb.c:756:23: error: implicit declaration of function 'pgprot_cached_wthru'; did you mean 'pgprot_ca

[Intel-gfx] [drm-intel:topic/core-for-CI 18/20] init/Kconfig:80: symbol BROKEN is selected by DRM_I915_DEBUG

tree: git://anongit.freedesktop.org/drm-intel topic/core-for-CI head: d0435a9b45070b945578c093dcd363b6b73a502c commit: 198db0fc276cdf8e1bb66a4a03473dbea1400d18 [18/20] Revert "drm/i915: Don't select BROKEN" config: powerpc-mvme5100_defconfig compiler: powerpc-linux-gcc (GCC) 9.3.0 reproduce:

Re: [Intel-gfx] [PATCH] drm/i915: fix Sphinx build duplicate label warning

On Fri, 17 Apr 2020, Chris Wilson wrote: > Quoting Jani Nikula (2020-04-17 14:01:09) >> Fix the warning caused by enabling the autosectionlabel extension in the >> kernel Sphinx build: >> >> Documentation/gpu/i915.rst:610: WARNING: duplicate label >> gpu/i915:layout, other instance in Documentati