== Series Details ==
Series: drm/i915/tgl: Fix Combo PHY DPLL fractional divider for 38.4MHz ref
clock
URL : https://patchwork.freedesktop.org/series/82173/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9068 -> Patchwork_18586
=
== Series Details ==
Series: drm/i915/tgl: Fix Combo PHY DPLL fractional divider for 38.4MHz ref
clock
URL : https://patchwork.freedesktop.org/series/82173/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked sep
== Series Details ==
Series: drm/i915/display/ehl: Limit eDP to HBR2 (rev2)
URL : https://patchwork.freedesktop.org/series/82162/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9066_full -> Patchwork_18583_full
Summary
-
This patchset replaces [1], adding also a workaround for TGL BIOSes that
don't apply Display WA #22010492432. The first patch fixes an incorrect
BIOS PDIV programming I noticed while testing this patchset on an ASUS/SKL
system.
[1] https://patchwork.freedesktop.org/series/79486/
Imre Deak (5):
Apply Display WA #22010492432 for combo PHY PLLs too. This should fix a
problem where the PLL output frequency is slightly off with the current
PLL fractional divider value.
I haven't seen an actual case where this causes a problem, but let's
follow the spec. It's also needed on some EHL platforms
When selecting the WRPLL dividers for a given port clock/PLL freq, the
hard-coded PLL freq in a table entry can be calculated using the rest of
parameters in the same entry. Cross-check if the hard coded values match
what we calculate with the formula.
Signed-off-by: Imre Deak
---
drivers/gpu/dr
The TGL A stepping and some B stepping (display C stepping) BIOSes
program the combo PHY DPLL fractional divider value incorrectly, not
applying the Display #22010492432 workaround.
Add a workaround for such BIOS versions, so that the driver selects the
correct WRPLL parameter entry correctly (sel
The BIOS of at least one ASUS-Z170M system with an SKL I have programs
the 101b WRPLL PDIV divider value, which is the encoding for PDIV=7 with
bit#0 incorrectly set.
This happens with the
"3840x2160": 30 262750 3840 3888 3920 4000 2160 2163 2168 2191 0x48 0x9
HDMI mode (scaled from a 1024x768 s
The WRPLL parameter -> frequency formula is the same for all platforms
starting with SKL. Factor out the helper for this for clarity and so
that we can use the same formula when selecting the ICL WRPLL dividers
for DP mode in an upcoming patch (to cross-check the frequency
calculated using the form
Hi Tvrtko,
On 9/28/20 5:44 PM, Tvrtko Ursulin wrote:
On 27/09/2020 07:34, Lu Baolu wrote:
Hi,
The previous post of this series could be found here.
https://lore.kernel.org/linux-iommu/20200912032200.11489-1-baolu...@linux.intel.com/
This version introduce a new patch [4/7] to fix an issu
== Series Details ==
Series: series starting with [CI,1/3] drm/i915: Cancel outstanding work after
disabling heartbeats on an engine
URL : https://patchwork.freedesktop.org/series/82167/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9067 -> Patchwork_18585
===
On Tue, Mar 24, 2020 at 1:45 PM Chris Wilson wrote:
>
> Measure and compare the energy consumed, as reported by the rapl MSR,
> by the GPU while in RC0 and RC6 states. Throw an error if RC6 does not
> at least halve the energy consumption of RC0, as this more than likely
> means we failed to enter
== Series Details ==
Series: series starting with [CI,1/3] drm/i915: Cancel outstanding work after
disabling heartbeats on an engine
URL : https://patchwork.freedesktop.org/series/82167/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, ea
From: Thomas Gleixner
CONFIG_PREEMPT_COUNT is now unconditionally enabled and will be
removed. Cleanup the leftovers before doing so.
Signed-off-by: Thomas Gleixner
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: David Airlie
Cc: Daniel Vetter
Cc: intel-gfx@lists.freedesktop.org
C
== Series Details ==
Series: drm/i915: Avoid mixing integer types during batch copies
URL : https://patchwork.freedesktop.org/series/82165/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9067 -> Patchwork_18584
Summary
-
On Mon, Sep 28, 2020 at 04:07:39PM -0700, Lucas De Marchi wrote:
> On Mon, Sep 28, 2020 at 08:15:29PM +0300, Jani Nikula wrote:
> > On Mon, 28 Sep 2020, "Surendrakumar Upadhyay, TejaskumarX"
> > wrote:
> > > This is a good example of a potential trap that having
> > > IS_ELKHARTLAKE() cover both
On Mon, Sep 28, 2020 at 08:15:29PM +0300, Jani Nikula wrote:
On Mon, 28 Sep 2020, "Surendrakumar Upadhyay, TejaskumarX"
wrote:
This is a good example of a potential trap that having
IS_ELKHARTLAKE() cover both ELK and JSP creates. An unsuspecting coder
might change the if ladder to have IS_
We only allow persistent requests to remain on the GPU past the closure
of their containing context (and process) so long as they are continuously
checked for hangs or allow other requests to preempt them, as we need to
ensure forward progress of the system. If we allow persistent contexts
to remai
Verify that if a context is active at the time it is closed, that it is
either persistent and preemptible (with hangcheck running) or it shall
be removed from execution.
Fixes: 9a40bddd47ca ("drm/i915/gt: Expose heartbeat interval via sysfs")
Testcase: igt/gem_ctx_persistence/heartbeat-close
Signe
Currently, we check we can send a pulse prior to disabling the
heartbeat to verify that we can change the heartbeat, but since we may
re-evaluate execution upon changing the heartbeat interval we need another
pulse afterwards to refresh execution.
v2: Tvrtko asked if we could reduce the double pul
Be consistent and use unsigned long throughout the chunk copies to
avoid the inherent clumsiness of mixing integer types of different
widths and signs. Failing to take acount of a wider unsigned type when
using min_t can lead to treating it as a negative, only for it flip back
to a large unsigned v
Simply check that we support parsing of batches as large as the uAPI
allows.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
tests/i915/gen9_exec_parse.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/tests/i915/gen9_exec_parse.c b/tests/i915/gen9_exec_parse.
== Series Details ==
Series: drm/i915/display/ehl: Limit eDP to HBR2 (rev2)
URL : https://patchwork.freedesktop.org/series/82162/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9066 -> Patchwork_18583
Summary
---
**SU
Recent update in documentation defeatured eDP HBR3 for EHL and JSL.
v2:
- Remove dead code in ehl_get_combo_buf_trans()
BSpec: 32247
Cc: Matt Roper
Cc: Vidya Srinivas
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_ddi.c | 9 ++---
drivers/gpu/drm/i915/display
Recent update in documentation defeatured eDP HBR3 for EHL and JSL.
BSpec: 32247
Cc: Matt Roper
Cc: Vidya Srinivas
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_dp.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i9
On Mon, 28 Sep 2020, Matt Roper wrote:
> Why are we adding IS_JASPERLAKE at all? EHL/JSL are documented as the
> same graphics IP, but are paired with different PCHs in the final SoCs,
> which is what causes the minor differences in programming. My
> understanding is that the voltage programming
From: Matt Roper
Sent: Monday, September 28, 2020 10:54 PM
To: Jani Nikula
Cc: Surendrakumar Upadhyay, TejaskumarX
; Vivi, Rodrigo
; airl...@linux.ie ; dan...@ffwll.ch
; intel-gfx@lists.freedesktop.org
; dri-de...@lists.freedesktop.org
; linux-ker...@vger.k
On Mon, Sep 28, 2020 at 08:14:02PM +0300, Jani Nikula wrote:
> On Mon, 28 Sep 2020, "Surendrakumar Upadhyay, TejaskumarX"
> wrote:
> >
> > From: Jani Nikula
> > Sent: Monday, September 28, 2020 7:07 PM
> > To: Surendrakumar Upadhyay, TejaskumarX
> > ; Vivi, Rodr
On Mon, 28 Sep 2020, Ville Syrjälä wrote:
> On Mon, Sep 28, 2020 at 07:15:43AM -0700, James Ausmus wrote:
>> On Mon, Sep 28, 2020 at 04:43:11PM +0300, Jani Nikula wrote:
>> > On Mon, 28 Sep 2020, Tejas Upadhyay
>> > wrote:
>> > > JSL has update in vswing table for eDP
>> >
>> > I've thought the
On Mon, 28 Sep 2020, "Surendrakumar Upadhyay, TejaskumarX"
wrote:
> This is a good example of a potential trap that having
> IS_ELKHARTLAKE() cover both ELK and JSP creates. An unsuspecting coder
> might change the if ladder to have IS_ELKHARTLAKE() first, and the
> subsequent IS_JASPERLAKE(
On Mon, 28 Sep 2020, "Surendrakumar Upadhyay, TejaskumarX"
wrote:
>
> From: Jani Nikula
> Sent: Monday, September 28, 2020 7:07 PM
> To: Surendrakumar Upadhyay, TejaskumarX
> ; Vivi, Rodrigo
> ; airl...@linux.ie ;
> dan...@ffwll.ch ; intel-gfx@lists.freedeskto
On Thu, 24 Sep 2020, Vandita Kulkarni wrote:
> This series contain interrupt handling part of cmd mode.
> Configuration patches were merged already.
Thanks for the patches and review, pushed the series.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
___
From: Jani Nikula
Sent: Monday, September 28, 2020 7:13 PM
To: Surendrakumar Upadhyay, TejaskumarX
; Vivi, Rodrigo
; airl...@linux.ie ; dan...@ffwll.ch
; intel-gfx@lists.freedesktop.org
; dri-de...@lists.freedesktop.org
; linux-ker...@vger.kernel.org
; Ausm
From: Jani Nikula
Sent: Monday, September 28, 2020 7:07 PM
To: Surendrakumar Upadhyay, TejaskumarX
; Vivi, Rodrigo
; airl...@linux.ie ; dan...@ffwll.ch
; intel-gfx@lists.freedesktop.org
; dri-de...@lists.freedesktop.org
; linux-ker...@vger.kernel.org
; Ausm
Re-reported.
From: Kulkarni, Vandita
Sent: Monday, September 28, 2020 8:42 AM
To: Vudum, Lakshminarayana
Cc: intel-gfx@lists.freedesktop.org
Subject: RE: ✗ Fi.CI.IGT: failure for Add support for mipi dsi cmd mode (rev15)
Hi Lakshmi,
This issue doesn’t seem to be related to this series, can you
== Series Details ==
Series: Add support for mipi dsi cmd mode (rev15)
URL : https://patchwork.freedesktop.org/series/69290/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9062_full -> Patchwork_18581_full
Summary
---
Hi Lakshmi,
This issue doesn’t seem to be related to this series, can you please check and
report it if this is not reported.
Thanks,
Vandita
From: Patchwork
Sent: Monday, September 28, 2020 8:57 PM
To: Kulkarni, Vandita
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.IGT: failure for Add
== Series Details ==
Series: Add support for mipi dsi cmd mode (rev15)
URL : https://patchwork.freedesktop.org/series/69290/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9062_full -> Patchwork_18581_full
Summary
---
On Mon, Sep 28, 2020 at 07:15:43AM -0700, James Ausmus wrote:
> On Mon, Sep 28, 2020 at 04:43:11PM +0300, Jani Nikula wrote:
> > On Mon, 28 Sep 2020, Tejas Upadhyay
> > wrote:
> > > JSL has update in vswing table for eDP
> >
> > I've thought the TLA for Jasper Lake is JSP, not JSL. At least we h
On 28/09/2020 13:12, Chris Wilson wrote:
Currently, we check we can send a pulse prior to disabling the
heartbeat to verify that we can change the heartbeat, but since we may
re-evaluate execution upon changing the heartbeat interval we need another
pulse afterwards to refresh execution.
v2: T
== Series Details ==
Series: series starting with [v2,1/3] drm/i915: Cancel outstanding work after
disabling heartbeats on an engine
URL : https://patchwork.freedesktop.org/series/82153/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9064 -> Patchwork_18582
===
== Series Details ==
Series: series starting with [v2,1/3] drm/i915: Cancel outstanding work after
disabling heartbeats on an engine
URL : https://patchwork.freedesktop.org/series/82153/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, ea
On Mon, Sep 28, 2020 at 04:43:11PM +0300, Jani Nikula wrote:
> On Mon, 28 Sep 2020, Tejas Upadhyay
> wrote:
> > JSL has update in vswing table for eDP
>
> I've thought the TLA for Jasper Lake is JSP, not JSL. At least we have
> PCH_JSP for Jasper Lake PCH.
JSP == Point (the PCH), JSL == Lake
-
On Mon, Sep 28, 2020 at 12:35:07PM +0200, Jason A. Donenfeld wrote:
> It seems likely this block was pasted from internal_get_user_pages_fast,
> which is not passed an mm struct and therefore uses current's. But
> __get_user_pages_locked is passed an explicit mm, and current->mm is not
> always val
On Mon, 28 Sep 2020, Tejas Upadhyay
wrote:
> JSL has update in vswing table for eDP
I've thought the TLA for Jasper Lake is JSP, not JSL. At least we have
PCH_JSP for Jasper Lake PCH.
>
> BSpec: 21257
> Signed-off-by: Tejas Upadhyay
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 67 ++
On Mon, 28 Sep 2020, Tejas Upadhyay
wrote:
> Split the basic platform definition, macros, and PCI IDs to
> differentiate between EHL and JSL platforms.
>
> Signed-off-by: Tejas Upadhyay
> ---
> drivers/gpu/drm/i915/i915_drv.h | 4 +++-
> drivers/gpu/drm/i915/i915_pci.c | 9 +++
On Mon, Sep 28, 2020 at 01:13:38PM +0300, Joonas Lahtinen wrote:
> I think we have a gap that after splitting the drm-intel-next pull requests
> into
> two the drm-intel/for-linux-next branch is now missing material from
> drm-intel/drm-intel-gt-next.
>
> I think a simple course of action might b
On Mon, Sep 21, 2020 at 04:32:02PM +0530, Karthik B S wrote:
> Without async flip support in the kernel, fullscreen apps where game
> resolution is equal to the screen resolution, must perform an extra blit
> per frame prior to flipping.
>
> Asynchronous page flips will also boost the FPS of Mesa
== Series Details ==
Series: drm/i915/jsl: Update JasperLake Voltage swing table
URL : https://patchwork.freedesktop.org/series/82150/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9061_full -> Patchwork_18580_full
Summary
Currently, we check we can send a pulse prior to disabling the
heartbeat to verify that we can change the heartbeat, but since we may
re-evaluate execution upon changing the heartbeat interval we need another
pulse afterwards to refresh execution.
v2: Tvrtko asked if we could reduce the double pul
Verify that if a context is active at the time it is closed, that it is
either persistent and preemptible (with hangcheck running) or it shall
be removed from execution.
Fixes: 9a40bddd47ca ("drm/i915/gt: Expose heartbeat interval via sysfs")
Testcase: igt/gem_ctx_persistence/heartbeat-close
Signe
We only allow persistent requests to remain on the GPU past the closure
of their containing context (and process) so long as they are continuously
checked for hangs or allow other requests to preempt them, as we need to
ensure forward progress of the system. If we allow persistent contexts
to remai
== Series Details ==
Series: Add support for mipi dsi cmd mode (rev15)
URL : https://patchwork.freedesktop.org/series/69290/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9062 -> Patchwork_18581
Summary
---
**SUCCESS
Am 28.09.20 um 09:37 schrieb Thomas Zimmermann:
Hi
Am 28.09.20 um 08:50 schrieb Christian König:
Am 27.09.20 um 21:16 schrieb Sam Ravnborg:
Hi Thomas.
struct simap {
union {
void __iomem *vaddr_iomem;
void *vaddr;
};
bool is_iomem;
In TE Gate mode or TE NO_GATE mode on every flip
we need to set the frame update request bit.
After this bit is set transcoder hardware will
automatically send the frame data to the panel
in case of TE NO_GATE mode, where it sends after
it receives the TE event in case of TE_GATE mode.
Once the fr
Quoting Chris Wilson (2020-08-03 13:14:58)
> Mix in a modicum of generic userptr thrashing for a quick (1s) BAT pass,
> as we have currently no coverage of userptr at all in BAT.
>
> Signed-off-by: Chris Wilson
Definitely makes sense as there was a reported userptr regression.
Reviewed-by: Joon
Quoting Jason A. Donenfeld (2020-09-28 11:35:07)
> It seems likely this block was pasted from internal_get_user_pages_fast,
> which is not passed an mm struct and therefore uses current's. But
> __get_user_pages_locked is passed an explicit mm, and current->mm is not
> always valid. This was hit wh
In TE Gate mode or TE NO_GATE mode on every flip
we need to set the frame update request bit.
After this bit is set transcoder hardware will
automatically send the frame data to the panel
in case of TE NO_GATE mode, where it sends after
it receives the TE event in case of TE_GATE mode.
Once the fr
> -Original Message-
> From: Ville Syrjälä
> Sent: Monday, September 28, 2020 3:48 PM
> To: Kulkarni, Vandita
> Cc: intel-gfx@lists.freedesktop.org; Nikula, Jani
> Subject: Re: [V14 4/5] drm/i915/dsi: Initiate frame request in cmd mode
>
> On Thu, Sep 24, 2020 at 06:12:08PM +0530, Vandi
On Thu, Sep 24, 2020 at 06:12:08PM +0530, Vandita Kulkarni wrote:
> In TE Gate mode or TE NO_GATE mode on every flip
> we need to set the frame update request bit.
> After this bit is set transcoder hardware will
> automatically send the frame data to the panel
> in case of TE NO_GATE mode, where
+ Dave and Daniel
+ Stephen
Quoting Christoph Hellwig (2020-09-26 09:29:59)
> On Fri, Sep 25, 2020 at 07:43:49PM -0700, Andrew Morton wrote:
> > On Thu, 24 Sep 2020 15:58:42 +0200 Christoph Hellwig wrote:
> >
> > > this series removes alloc_vm_area, which was left over from the big
> > > vmalloc
On 27/09/2020 07:34, Lu Baolu wrote:
Hi,
The previous post of this series could be found here.
https://lore.kernel.org/linux-iommu/20200912032200.11489-1-baolu...@linux.intel.com/
This version introduce a new patch [4/7] to fix an issue reported here.
https://lore.kernel.org/linux-iommu/51a
== Series Details ==
Series: drm/i915/jsl: Update JasperLake Voltage swing table
URL : https://patchwork.freedesktop.org/series/82150/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9061 -> Patchwork_18580
Summary
---
Hi Jani,
> On Jul 10, 2020, at 23:48, Kai-Heng Feng wrote:
>
>
>
>> On Jun 30, 2020, at 16:37, Kai-Heng Feng wrote:
>>
>>
>>> On Jun 10, 2020, at 15:55, Kai-Heng Feng
>>> wrote:
>>>
>>> On HP 800 G4 DM, if HDMI cable isn't plugged before boot, the HDMI port
>>> becomes useless and never
== Series Details ==
Series: drm/i915/jsl: Update JasperLake Voltage swing table
URL : https://patchwork.freedesktop.org/series/82150/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu
== Series Details ==
Series: drm/i915/jsl: Update JasperLake Voltage swing table
URL : https://patchwork.freedesktop.org/series/82150/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7785c9b4e203 drm/i915/jsl: Split EHL/JSL platform info and PCI ids
-:20: CHECK:MACRO_ARG_REUSE: M
JSL has update in vswing table for eDP
BSpec: 21257
Signed-off-by: Tejas Upadhyay
---
drivers/gpu/drm/i915/display/intel_ddi.c | 67 ++--
1 file changed, 64 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/in
Split the basic platform definition, macros, and PCI IDs to
differentiate between EHL and JSL platforms.
Signed-off-by: Tejas Upadhyay
---
drivers/gpu/drm/i915/i915_drv.h | 4 +++-
drivers/gpu/drm/i915/i915_pci.c | 9 +
drivers/gpu/drm/i915/intel_device_info.c | 1 +
dr
Patch series covers following things:
1. Split and differentiate between EhlkhartLake and
JasperLake platfrom
2. Update voltage swing table for eDP on JasperLake platform
BSpec: 21257
Tejas Upadhyay (2):
drm/i915/jsl: Split EHL/JSL platform info and PCI ids
drm/i915/edp/jsl: Update vswing
Hi
Am 28.09.20 um 08:50 schrieb Christian König:
> Am 27.09.20 um 21:16 schrieb Sam Ravnborg:
>> Hi Thomas.
>>
struct simap {
union {
void __iomem *vaddr_iomem;
void *vaddr;
};
bool is_iomem;
};
Wh
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