> -Original Message-
> From: Anshuman Gupta
> Sent: Thursday, November 5, 2020 12:12 PM
> To: Shankar, Uma
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915/display/tgl: Disable FBC with
> PSR2
>
> On 2020-11-05 at 01:26:03 +0530, Uma Shankar
On 11/2/20 10:22 AM, Thomas Hellström wrote:
On 11/2/20 9:48 AM, Maarten Lankhorst wrote:
Op 30-10-2020 om 16:08 schreef Thomas Hellström:
On 10/16/20 12:44 PM, Maarten Lankhorst wrote:
Pin in the caller, not in the work itself. This should also
work better for dma-fence annotations.
On 2020-11-05 at 01:26:03 +0530, Uma Shankar wrote:
> There are some corner cases wrt underrun when we enable
> FBC with PSR2 on TGL. Recommendation from hardware is to
> keep this combination disabled.
>
> Signed-off-by: Uma Shankar
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 6 ++
>
On 2020-11-03 at 17:06:42 -0500, Rodrigo Vivi wrote:
> On Fri, Oct 30, 2020 at 11:46:58AM +0530, Anshuman Gupta wrote:
> > From: Bob Paauwe
> >
> > The WA specifies that we need to toggle a SDE chicken bit on and then
> > off as the final step in preparation for s0ix entry.
> >
> > Bspec:
On Wed, 04 Nov 2020 16:21:24 -0800, Chris Wilson wrote:
>
> Use gem_reopen_driver() to always reopen the same device without relying
> on the filtering in drm_open_driver().
Reviewed-by: Ashutosh Dixit
> Signed-off-by: Chris Wilson
> ---
> tests/i915/gem_ctx_thrash.c | 2 +-
> 1 file changed,
On Wed, 04 Nov 2020 16:21:23 -0800, Chris Wilson wrote:
>
> Reopen the existing device, rather than relying on the filtering in
> drm_open_driver().
Reviewed-by: Ashutosh Dixit
> Signed-off-by: Chris Wilson
> ---
> tests/i915/gem_exec_whisper.c | 8
> 1 file changed, 4 insertions(+),
== Series Details ==
Series: Re-enable FBC on TGL
URL : https://patchwork.freedesktop.org/series/83510/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9265_full -> Patchwork_18857_full
Summary
---
**FAILURE**
On Wed, Nov 04, 2020 at 11:55:15AM +0200, Joonas Lahtinen wrote:
Quoting Lucas De Marchi (2020-10-27 06:46:18)
GT_PERF_STATUS and RP_STATE_LIMITS were added a long time ago in
commit 3b8d8d91d51c ("drm/i915: dynamic render p-state support for Sandy
Bridge"). Other than printing their values in
Hi all,
Today's linux-next merge of the drm-msm tree got a conflict in:
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
between commit:
29b77ad7b9ca ("drm/atomic: Pass the full state to CRTC atomic_check")
from the drm-misc tree and commit:
91693cbc13c2 ("drm/msm/dpu: Add newline to printks")
Hi all,
On Wed, 28 Oct 2020 12:06:31 +1100 Stephen Rothwell
wrote:
>
> Today's linux-next merge of the drm-misc tree got a conflict in:
>
> drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
>
> between commit:
>
> ff72bc403170 ("drm/amdgpu: Add debugfs entry for printing VM info")
>
> from the
Use gem_reopen_driver() to always reopen the same device without relying
on the filtering in drm_open_driver().
Signed-off-by: Chris Wilson
---
tests/i915/gem_ctx_thrash.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/i915/gem_ctx_thrash.c
Reopen the existing device, rather than relying on the filtering in
drm_open_driver().
Signed-off-by: Chris Wilson
---
tests/i915/gem_exec_whisper.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tests/i915/gem_exec_whisper.c b/tests/i915/gem_exec_whisper.c
index
== Series Details ==
Series: series starting with [1/2] drm/i915/gem: Allow backends to override
pread implementation
URL : https://patchwork.freedesktop.org/series/83508/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9265_full -> Patchwork_18856_full
On Wed, 04 Nov 2020 14:23:21 -0800, Chris Wilson wrote:
>
> Avoid any unnecessary filtering inside drm_open_driver() by explicitly
> reopening the same device.
>
> Signed-off-by: Chris Wilson
> ---
> tests/i915/gem_exec_parallel.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff
Quoting Tvrtko Ursulin (2020-11-04 13:47:43)
> From: Tvrtko Ursulin
>
> Instead of printing out the internal engine mask, which can change between
> kernel versions making it difficult to map to actual engines, present a
> bitmask of hanging engines ABI classes. For example:
>
> [drm] GPU
== Series Details ==
Series: drm/i915/perf: replace idr_init() by idr_init_base()
URL : https://patchwork.freedesktop.org/series/83506/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9265_full -> Patchwork_18855_full
Avoid any unnecessary filtering inside drm_open_driver() by explicitly
reopening the same device.
Signed-off-by: Chris Wilson
---
tests/i915/gem_exec_parallel.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/i915/gem_exec_parallel.c b/tests/i915/gem_exec_parallel.c
== Series Details ==
Series: drm/i915: Prevent GGTT access if not available for pread/pwrite
URL : https://patchwork.freedesktop.org/series/83505/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9265_full -> Patchwork_18854_full
Check that everything works as expected with nohangcheck after a broken
app.
Signed-off-by: Chris Wilson
---
tests/i915/gem_userptr_blits.c | 148 +
1 file changed, 148 insertions(+)
diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
== Series Details ==
Series: Re-enable FBC on TGL
URL : https://patchwork.freedesktop.org/series/83510/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9265 -> Patchwork_18857
Summary
---
**SUCCESS**
No regressions
== Series Details ==
Series: series starting with [1/2] drm/i915/gem: Allow backends to override
pread implementation
URL : https://patchwork.freedesktop.org/series/83508/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9265 -> Patchwork_18856
== Series Details ==
Series: series starting with [1/2] drm/i915/gem: Allow backends to override
pread implementation
URL : https://patchwork.freedesktop.org/series/83508/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit
== Series Details ==
Series: drm/i915/perf: replace idr_init() by idr_init_base()
URL : https://patchwork.freedesktop.org/series/83506/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9265 -> Patchwork_18855
Summary
---
There are some corner cases wrt underrun when we enable
FBC with PSR2 on TGL. Recommendation from hardware is to
keep this combination disabled.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_fbc.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
FBC can be re-enabled on TGL with WA of keeping it disabled
while PSR2 is enabled.
This reverts commit 2982ded2ff5ce0cf1a49bc39a526da182782b664.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_fbc.c | 7 ---
1 file changed, 7 deletions(-)
diff --git
FBC was disabled on TGL due to random underruns. It has
been determined that FBC will not work reliably with PSR2.
This series re-enables fbc along with taking care of the
PSR2 limitations for TGL.
Test-with: 20201104195142.3223-1-uma.shan...@intel.com
Uma Shankar (2):
drm/i915/display/tgl:
== Series Details ==
Series: drm/i915: Prevent GGTT access if not available for pread/pwrite
URL : https://patchwork.freedesktop.org/series/83505/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9265 -> Patchwork_18854
== Series Details ==
Series: drm/i915/gvt: replace idr_init() by idr_init_base()
URL : https://patchwork.freedesktop.org/series/83498/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9263_full -> Patchwork_18853_full
Summary
From: Matthew Auld
As there are more complicated interactions between the different backing
stores and userspace, push the control into the backends rather than
accumulate them all inside the ioctl handlers.
Signed-off-by: Matthew Auld
Signed-off-by: Chris Wilson
---
More the specialised interation with the physical GEM object from the
pread/pwrite ioctl handler into the phys backend.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_phys.c | 55
drivers/gpu/drm/i915/i915_gem.c | 26 ---
2 files
idr_init() uses base 0 which is an invalid identifier. The new function
idr_init_base allows IDR to set the ID lookup from base 1. This avoids
all lookups that otherwise starts from 0 since 0 is always unused.
References: commit 6ce711f27500 ("idr: Make 1-based IDRs more efficient")
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915: Improve record of hung engines
in error state
URL : https://patchwork.freedesktop.org/series/83497/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9263_full -> Patchwork_18852_full
If there is no mappable GGTT aperture, trying to use it for
copy_(from|to)_user is a dangerous experience. Report ENODEV to indicate
the operation is not supported to the upper layer.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c | 3 +++
1 file changed, 3 insertions(+)
diff
Use MI_MATH and MI_COND_BBE we can construct a loop that runs for a
precise number of clock cycles, as measured by the CTX_TIMESTAMP. We use
the CTX_TIMESTAMP (as opposed to the CS_TIMESTAMP) so that the elapsed
time is measured local to the context, and the length of the batch is
unaffected by
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/display: Support PSR Multiple
Transcoders
URL : https://patchwork.freedesktop.org/series/83495/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9263_full -> Patchwork_18851_full
Op 02-11-2020 om 11:13 schreef Thomas Hellström:
>
> On 10/16/20 12:44 PM, Maarten Lankhorst wrote:
>> From: Thomas Hellström
>>
>> Stolen objects need to lock, and we may call put_pages when
>> refcount drops to 0, ensure all calls are handled correctly.
>>
>> Idea-from: Thomas Hellström
>>
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915: Improve record of hung engines
in error state
URL : https://patchwork.freedesktop.org/series/83493/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9263_full -> Patchwork_18850_full
On Tue, Oct 27, 2020 at 10:39:48PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> skl_ddb_get_pipe_allocation_limits() doesn't care how the weights
> for distributing the ddb are caclculated for each pipe. Put that
> calculation into a separate function so that such mundane details
> are
== Series Details ==
Series: drm/i915/gvt: replace idr_init() by idr_init_base()
URL : https://patchwork.freedesktop.org/series/83498/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9263 -> Patchwork_18853
Summary
---
On Wed, Nov 04, 2020 at 05:54:25AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/tgl: Fix typo during output setup
> URL : https://patchwork.freedesktop.org/series/83465/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_9258_full ->
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915: Improve record of hung engines
in error state
URL : https://patchwork.freedesktop.org/series/83497/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9263 -> Patchwork_18852
On Wed, 2020-11-04 at 13:26 +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [v3,1/2] drm/i915/display: Support PSR
> Multiple Transcoders
> URL : https://patchwork.freedesktop.org/series/83495/
> State : warning
>
> == Summary ==
>
> $ dim sparse --fast
On Wed, 2020-11-04 at 13:24 +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [v3,1/2] drm/i915/display: Support PSR
> Multiple Transcoders
> URL : https://patchwork.freedesktop.org/series/83495/
> State : warning
>
> == Summary ==
>
> $ dim checkpatch
On Wed, Nov 04, 2020 at 12:38:00PM +0200, Joonas Lahtinen wrote:
> + Rodrigo,
>
> Quoting Aditya Swarup (2020-10-21 16:32:08)
> > From: Anusha Srivatsa
> >
> > - Inherit the gen12 workarounds.
> > - Add placeholders to setup GT WA.
> > - Extend permanent driver WA Wa_1409767108 to adl-s and
> >
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915: Improve record of hung engines
in error state
URL : https://patchwork.freedesktop.org/series/83497/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/display: Support PSR Multiple
Transcoders
URL : https://patchwork.freedesktop.org/series/83495/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9263 -> Patchwork_18851
idr_init() uses base 0 which is an invalid identifier. The new function
idr_init_base allows IDR to set the ID lookup from base 1. This avoids
all lookups that otherwise starts from 0 since 0 is always unused.
References: commit 6ce711f27500 ("idr: Make 1-based IDRs more efficient")
From: Tvrtko Ursulin
Instead of printing out the internal engine mask, which can change between
kernel versions making it difficult to map to actual engines, present a
bitmask of hanging engines ABI classes. For example:
[drm] GPU HANG: ecode 9:24dd:8, in gem_exec_schedu [1334]
Notice
From: Tvrtko Ursulin
Between events which trigger engine and GPU resets and capturing the error
state we lose information on which engine triggered the reset. Improve
this by passing in the hung engine mask down to error capture.
Result is that the list of engines in user visible "GPU HANG:
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/display: Support PSR Multiple
Transcoders
URL : https://patchwork.freedesktop.org/series/83495/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/display: Support PSR Multiple
Transcoders
URL : https://patchwork.freedesktop.org/series/83495/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
215ae488cdd7 drm/i915/display: Support PSR Multiple Transcoders
Quoting Tvrtko Ursulin (2020-11-04 13:06:43)
>
> On 04/11/2020 12:33, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2020-11-04 12:20:43)
> >> From: Tvrtko Ursulin
> >>
> >> Instead of printing out the internal engine mask, which can change between
> >> kernel versions making it difficult to
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915: Improve record of hung engines
in error state
URL : https://patchwork.freedesktop.org/series/83493/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9263 -> Patchwork_18850
On 04/11/2020 12:33, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-11-04 12:20:43)
From: Tvrtko Ursulin
Instead of printing out the internal engine mask, which can change between
kernel versions making it difficult to map to actual engines, list user
friendly engine names in the ecode
On 04/11/2020 12:30, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-11-04 12:20:42)
From: Tvrtko Ursulin
Between events which trigger engine and GPU resets and capturing the error
state we lose information on which engine triggered the reset. Improve
this by passing in the hung engine
In order to support the PSR state of each transcoder, it adds
i915_psr_status to sub-directory of each transcoder.
v2: Change using of Symbolic permissions 'S_IRUGO' to using of octal
permissions '0444'
Signed-off-by: Gwan-gyeong Mun
Cc: José Roberto de Souza
---
It is a preliminary work for supporting multiple EDP PSR and
DP PanelReplay. And it refactors singleton PSR to Multi Transcoder
supportable PSR.
And this moves and renames the i915_psr structure of drm_i915_private's to
intel_dp's intel_psr structure.
It also causes changes in PSR interrupt
Quoting Tvrtko Ursulin (2020-11-04 12:20:43)
> From: Tvrtko Ursulin
>
> Instead of printing out the internal engine mask, which can change between
> kernel versions making it difficult to map to actual engines, list user
> friendly engine names in the ecode string. For example:
Nah. It's a
Quoting Tvrtko Ursulin (2020-11-04 12:20:42)
> From: Tvrtko Ursulin
>
> Between events which trigger engine and GPU resets and capturing the error
> state we lose information on which engine triggered the reset. Improve
> this by passing in the hung engine mask down to error capture.
>
> Result
From: Tvrtko Ursulin
Instead of printing out the internal engine mask, which can change between
kernel versions making it difficult to map to actual engines, list user
friendly engine names in the ecode string. For example:
[drm] GPU HANG: ecode 9:vcs1:a77ffefe, in gem_exec_captur [929]
From: Tvrtko Ursulin
Between events which trigger engine and GPU resets and capturing the error
state we lose information on which engine triggered the reset. Improve
this by passing in the hung engine mask down to error capture.
Result is that the list of engines in user visible "GPU HANG:
+ Rodrigo,
Quoting Aditya Swarup (2020-10-21 16:32:08)
> From: Anusha Srivatsa
>
> - Inherit the gen12 workarounds.
> - Add placeholders to setup GT WA.
> - Extend permanent driver WA Wa_1409767108 to adl-s and
> Wa_14010685332 to adl-s.
> - Extend permanent driver WA Wa_1606054188 to adl-s
>
Quoting Joonas Lahtinen (2020-11-04 10:05:32)
> Quoting Chris Wilson (2019-12-22 16:40:46)
> > From: Andi Shyti
> >
> > The GT system is becoming more and more a stand-alone system in
> > i915 and it's fair to assign it its own debugfs directory.
> >
> > rc6, rps and llc debugfs files are gt
Quoting Chris Wilson (2019-12-22 16:40:46)
> From: Andi Shyti
>
> The GT system is becoming more and more a stand-alone system in
> i915 and it's fair to assign it its own debugfs directory.
>
> rc6, rps and llc debugfs files are gt related, move them into the
> gt debugfs directory.
>
>
Quoting Lucas De Marchi (2020-10-27 06:46:18)
> GT_PERF_STATUS and RP_STATE_LIMITS were added a long time ago in
> commit 3b8d8d91d51c ("drm/i915: dynamic render p-state support for Sandy
> Bridge"). Other than printing their values in debugfs we don't do
> anything with them. There's not much
== Series Details ==
Series: Enable HDR on MCA LSPCON based Gen9 devices (rev10)
URL : https://patchwork.freedesktop.org/series/68081/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9260_full -> Patchwork_18849_full
Summary
On Tue, Nov 03, 2020 at 11:49:40AM -0500, Alex Deucher wrote:
> On Sun, Nov 1, 2020 at 5:01 AM Daniel Vetter wrote:
> >
> > On Sat, Oct 31, 2020 at 2:57 PM Daniel Vetter
> > wrote:
> > >
> > > On Fri, Oct 30, 2020 at 7:47 PM Alex Deucher
> > > wrote:
> > > >
> > > > On Fri, Oct 30, 2020 at
== Series Details ==
Series: drm/i915/ehl: Implement W/A 22010492432 (rev3)
URL : https://patchwork.freedesktop.org/series/83135/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9260_full -> Patchwork_18848_full
Summary
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