== Series Details ==
Series: tpm_tis: Detect interrupt storms
URL : https://patchwork.freedesktop.org/series/84608/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9445_full -> Patchwork_19068_full
Summary
---
== Series Details ==
Series: Introduce Alderlake-S (rev3)
URL : https://patchwork.freedesktop.org/series/82917/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9445_full -> Patchwork_19067_full
Summary
---
**SUCCESS**
== Series Details ==
Series: tpm_tis: Detect interrupt storms
URL : https://patchwork.freedesktop.org/series/84608/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9445 -> Patchwork_19068
Summary
---
**SUCCESS**
No
== Series Details ==
Series: tpm_tis: Detect interrupt storms
URL : https://patchwork.freedesktop.org/series/84608/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
== Series Details ==
Series: drm/i915: Add support for Intel's eDP backlight controls (rev3)
URL : https://patchwork.freedesktop.org/series/81702/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9444_full -> Patchwork_19066_full
== Series Details ==
Series: Introduce Alderlake-S (rev3)
URL : https://patchwork.freedesktop.org/series/82917/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9445 -> Patchwork_19067
Summary
---
**SUCCESS**
No
== Series Details ==
Series: drm/i915/gem: Drop false !i915_vma_is_closed assertion
URL : https://patchwork.freedesktop.org/series/84602/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9444_full -> Patchwork_19065_full
When enabling the interrupt code for the tpm_tis driver we have
noticed some systems have a bios issue causing an interrupt storm to
occur. The issue isn't limited to a single tpm or system manufacturer
so keeping a denylist of systems with the issue isn't optimal. Instead
try to detect the
Now that kstat_irqs is exported, get rid of count_interrupts in
i915_pmu.c
Cc: Thomas Gleixner
Cc: Jani Nikula
Cc: Rodrigo Vivi
Cc: David Airlie
Cc: Daniel Vetter
Cc: intel-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Cc: Jarkko Sakkinen
Cc: Jason Gunthorpe
Cc: Peter
The interrupt storm detection code detects the issue on the ThinkPad
T490s, but the L490 still hangs at initialization. So swap out the
T490s for the L490 in the dmi check.
Cc: Jarkko Sakkinen
Cc: Jason Gunthorpe
Cc: Peter Huewe
Cc: James Bottomley
Cc: Matthew Garrett
Cc: Hans de Goede
To try and detect potential interrupt storms that
have been occurring with tpm_tis devices it was suggested
to use kstat_irqs() to get the number of interrupts.
Since tpm_tis can be built as a module it needs kstat_irqs
exported.
Reported-by: kernel test robot
Cc: Thomas Gleixner
Cc: Jarkko
This patchset is an attempt to try and catch tpm_tis devices that have
interrupt storm issues, disable the interrupt, and use polling. In
2016 the tpm_tis interrupt code was accidently disabled, and polling
was just being used. When we initially tried to enable interrupts
again there were some
== Series Details ==
Series: Introduce Alderlake-S (rev3)
URL : https://patchwork.freedesktop.org/series/82917/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
== Series Details ==
Series: Introduce Alderlake-S (rev3)
URL : https://patchwork.freedesktop.org/series/82917/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d90e9bb9cd0e drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
deb53d194dbb drm/i915/tgl: Add bound
From: Tejas Upadhyay
Just like RKL, the ADL_S platform also has different memory
characteristics from past platforms. Update the values used
by our memory bandwidth calculations accordingly.
Bspec: 64631
Cc: Matt Roper
Cc: Lucas De Marchi
Cc: Jani Nikula
Cc: Ville Syrjälä
Cc: Imre Deak
From: Anusha Srivatsa
Load DMC on ADL_S v2.01. This is the first offcial
release of DMC for ADL_S.
Cc: Jani Nikula
Cc: Imre Deak
Cc: Matt Roper
Cc: Lucas De Marchi
Cc: Aditya Swarup
Signed-off-by: Anusha Srivatsa
Signed-off-by: Aditya Swarup
---
drivers/gpu/drm/i915/display/intel_csr.c
From: José Roberto de Souza
- As RKL and ADL-S only have 5 planes, primary and 4 sprites and
the cursor plane, let's group the handling together under
HAS_D12_PLANE_MINIMIZATION.
- Also use macro to select pipe irq fault error mask.
BSpec: 49251
Cc: Lucas De Marchi
Cc: Jani Nikula
Cc:
From: Lucas De Marchi
TGL power wells can be re-used for ADL-S with the exception of the fake
power well for TC_COLD, just like DG-1.
Bspec: 53597
Cc: Imre Deak
Cc: Matt Roper
Cc: Aditya Swarup
Signed-off-by: Lucas De Marchi
Signed-off-by: Aditya Swarup
---
From: Matt Roper
ADL-S switches up which PHYs are considered a master to other PHYs;
PHY-C is no longer a master, but PHY-D is now.
Bspec: 49291
Cc: Jani Nikula
Cc: Ville Syrjälä
Cc: Imre Deak
Cc: Lucas De Marchi
Signed-off-by: Matt Roper
Signed-off-by: Aditya Swarup
---
From: Matt Roper
ADL-S, like RKL, uses the same internal device ID for the GuC and HuC as
TGL did, making them all firmware-compatible. Let's re-use TGL's
firmware for ADL-S.
Bspec: 50668
Cc: John Harrison
Cc: Lucas De Marchi
Signed-off-by: Matt Roper
Signed-off-by: Aditya Swarup
From: Caz Yokoyama
The crwebview indicates on ADL-S that some of our MCHBAR
registers have moved from their traditional 0x50XX offsets to
new locations. The meaning and bit layout of the registers
remain same.
v2: Simplify logic to a single if else chain and fix indents.(Lucas)
Cc: Lucas De
- Add placeholders for gt and ctx WAs for ADL-S
- Extend Wa_1606931601 and Wa_1409804808 to ADL-S.
- Extend Wa_14010919138 and Wa_14010229206 to ADL-S (Madhumitha)
- Extend Wa_22010271021 to ADLS (cyokoyam)
Cc: Jani Nikula
Cc: Ville Syrjälä
Cc: Imre Deak
Cc: Matt Roper
Cc: Lucas De Marchi
- Extend permanent driver WA Wa_1409767108, Wa_14010685332
and Wa_14011294188 to adl-s.
- Extend permanent driver WA Wa_1606054188 to adl-s.
- Add Wa_14011765242 for adl-s A0 stepping.
Cc: Jani Nikula
Cc: Ville Syrjälä
Cc: Imre Deak
Cc: Matt Roper
Cc: Lucas De Marchi
Signed-off-by: Aditya
- ADL-S driver internal mapping uses PORT D, E, F, G for Combo phy B, C, D and
E.
- Add ADLS specific port mappings for vbt port dvo settings.
- Select appropriate AUX CH specific to ADLS based on port mapping.
Cc: Jani Nikula
Cc: Ville Syrjälä
Cc: Imre Deak
Cc: Matt Roper
Cc: Lucas De
From: Matt Roper
ADL-S switches up which PHYs are considered a master to other PHYs;
PHY-C is no longer a master, but PHY-D is now.
Bspec: 49291
Cc: Jani Nikula
Cc: Ville Syrjälä
Cc: Imre Deak
Cc: Lucas De Marchi
Signed-off-by: Matt Roper
Signed-off-by: Aditya Swarup
Reviewed-by: Anusha
ADL-S requires TC pins to set up ddc for Combo PHY B, C, D and E.
Combo PHY A still uses the old ddc pin mapping.
From VBT, ddc pin info suggests the following mapping:
VBTDRIVER
DDI B->ddc_pin=2 should translate to PORT_D->0x9
DDI C->ddc_pin=3 should translate
Initialize display outputs for ADL-S. ADL-S has 5 display
outputs -> 1 eDP, 2 HDMI and 2 DP++ outputs.
Cc: Jani Nikula
Cc: Ville Syrjälä
Cc: Imre Deak
Cc: Matt Roper
Cc: Lucas De Marchi
Signed-off-by: Aditya Swarup
---
drivers/gpu/drm/i915/display/intel_display.c | 8 +++-
1 file
Add changes to configure port clock registers for ADL-S. Combo phy port
clocks are configured by DPCLKA_CFGCR0 and DPCLKA_CFGCR1 registers.
The DDI to internal clock mappings in DPCLKA_CFGCR0 register for ADL-S
translates to
DDI A -> DDIA
DDI B -> USBC1
DDI I -> USBC2
For DPCLKA_CFGCR1
DDI J ->
From: Anusha Srivatsa
ADLS follows ICP/TGP like interrupts.
v2: Use "INTEL_PCH_TYPE(dev_priv) >= PCH_ICP" of hpd_icp (Lucas)
Cc: Lucas De Marchi
Cc: Jani Nikula
Cc: Ville Syrjälä
Cc: Imre Deak
Cc: Matt Roper
Cc: José Roberto de Souza
Signed-off-by: Anusha Srivatsa
Signed-off-by: Lucas
Rev 3 with all the comments addressed from Rev 2:
https://patchwork.freedesktop.org/series/82917/
Aditya Swarup (9):
drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
drm/i915/tgl: Add bound checks and simplify TGL REVID macros
drm/i915/adl_s: Configure DPLL for ADL-S
From: Anusha Srivatsa
Alderlake-S has 5 combo phys, add reg definitions for
combo phys and update the port to phy helper for ADL-S.
v2:
- Change IS_GEN() >= 12 to IS_TIGERLAKE() in intel_phy_is_tc()
and return false for platforms RKL,DG1 and ADLS.(mdroper)
Cc: Lucas De Marchi
Cc: Jani Nikula
Add changes for configuring DPLL for ADL-S
- Reusing DG1 DPLL 2 & DPLL 3 for ADL-S
- Extend CNL macro to choose DPLL_ENABLE
for ADL-S.
- Select CFGCR0 and CFGCR1 for ADL-S plls.
On BSpec: 53720 PLL arrangement dig for adls:
DPLL2 cfgcr is programmed using _ADLS_DPLL3_CFGCR(0/1)
DPLL3 cfgcr is
Fix TGL REVID macros to fetch correct display/gt stepping based
on SOC rev id from INTEL_REVID() macro. Previously, we were just
returning the first element of the revid array instead of using
the correct index based on SOC rev id.
Fixes: ("drm/i915/tgl: Fix stepping WA matching")
Cc: José
From: Anusha Srivatsa
Add support for Alderpoint(ADP) PCH used with Alderlake-S.
v2:
- Use drm_dbg_kms and drm_WARN_ON based on Jani's feedback.(aswarup)
Cc: Matt Roper
Cc: Lucas De Marchi
Cc: Caz Yokoyama
Cc: Jani Nikula
Cc: Ville Syrjälä
Cc: Imre Deak
Signed-off-by: Anusha Srivatsa
Add bound checks for TGL REV ID array. Since, there might
be a possibility of using older kernels on latest platform
revisions, resulting in out of bounds access for rev ID array.
In this scenario, use the latest rev ID available and apply
those WAs.
Also, simplify GT macros for TGL rev ID to
From: Caz Yokoyama
ADL_S re-uses the same stolen memory registers as TGL and ICL.
This patch has a dependency on:
("drm/i915/adl_s: Add ADL-S platform info and PCI ids")
Bspec: 52055
Bspec: 49589
Bspec: 49636
Cc: Lucas De Marchi
Cc: Jani Nikula
Cc: Ville Syrjälä
Cc: Imre Deak
Cc:
From: Caz Yokoyama
- Add the initial platform information for Alderlake-S.
- Specify ppgtt_size value
- Add dma_mask_size
- Add ADLS REVIDs
- HW tracking(Selective Update Tracking Enable) has been
removed from ADLS. Disable PSR2 till we enable software/
manual tracking.
v2:
- Add support
On Fri, Dec 4, 2020 at 10:23 AM Ville Syrjala
wrote:
>
> From: Ville Syrjälä
>
> With GEN11_HOTPLUG_CTL_LONG_DETECT(), SHOTPLUG_CTL_DDI_HPD_LONG_DETECT()
> and ICP_TC_HPD_LONG_DETECT() taking the hpd_pin as their argument
> we can remove some duplication in the long_detect() switch statements.
>
== Series Details ==
Series: drm/i915/display/dp: Compute the correct slice count for VDSC on DP
URL : https://patchwork.freedesktop.org/series/84599/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9444_full -> Patchwork_19064_full
== Series Details ==
Series: drm/i915/display: Inject a failure into the initial modeset (rev2)
URL : https://patchwork.freedesktop.org/series/84592/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9444_full -> Patchwork_19062_full
== Series Details ==
Series: drm/i915: Add support for Intel's eDP backlight controls (rev3)
URL : https://patchwork.freedesktop.org/series/81702/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9444 -> Patchwork_19066
== Series Details ==
Series: drm/i915: Disable outputs during unregister (rev2)
URL : https://patchwork.freedesktop.org/series/84371/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9444_full -> Patchwork_19060_full
Summary
== Series Details ==
Series: drm/i915: Add support for Intel's eDP backlight controls (rev3)
URL : https://patchwork.freedesktop.org/series/81702/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f28a72ff60f8 drm/i915/dp: Program source OUI on eDP panels
9233620226ff drm/i915:
== Series Details ==
Series: drm/i915/gem: Drop false !i915_vma_is_closed assertion
URL : https://patchwork.freedesktop.org/series/84602/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9444 -> Patchwork_19065
Summary
This reverts commit 0883ce8146ed6074c76399f4e70dbed788582e12. Originally
these quirks were added because of the issues with using the eDP
backlight interfaces on certain laptop panels, which made it impossible
to properly probe for DPCD backlight support without having a whitelist
for panels that
Since we now support controlling panel backlights through DPCD using
both the standard VESA interface, and Intel's proprietary HDR backlight
interface, we should allow the user to be able to explicitly choose
between one or the other in the event that we're wrong about panels
reliably reporting
So-recently a bunch of laptops on the market have started using DPCD
backlight controls instead of the traditional DDI backlight controls.
Originally we thought we had this handled by adding VESA backlight
control support to i915, but the story ended up being a lot more
complicated then that.
Currently, every different type of backlight hook that i915 supports is
pretty straight forward - you have a backlight, probably through PWM
(but maybe DPCD), with a single set of platform-specific hooks that are
used for controlling it.
HDR backlights, in particular VESA and Intel's HDR
Instead of using intel_panel->backlight.level, have the caller provide us
with the current panel backlight value. We'll need this for when we
separate PWM-related backlight callbacks from other means of backlight
control (like DPCD backlight controls), as the caller of each PWM callback
will be
Since we're about to add support for a second type of backlight control
interface over DP AUX (specifically, Intel's proprietary HDR backlight
controls) let's rename all of the current backlight hooks we have for
vesa to make it clear that they're specific to the VESA interface and
not Intel's.
No functional changes yet, this just adds definitions for all of the
known DPCD registers used by Intel's HDR backlight interface. Since
we'll only ever use this in i915, we just define them in
intel_dp_aux_backlight.c
Reviewed-by: Rodrigo Vivi
Signed-off-by: Lyude Paul
Cc: thay...@noraisin.net
Since we're going to need to add a set of lower-level PWM backlight
control hooks to be shared by normal backlight controls and HDR
backlight controls in SDR mode, let's add a prefix to the external PWM
backlight functions so that the difference between them and the high
level PWM-only backlight
Since we're about to start adding support for Intel's magic HDR
backlight interface over DPCD, we need to ensure we're properly
programming this field so that Intel specific sink services are exposed.
Otherwise, 0x300-0x3ff will just read zeroes.
We also take care not to reprogram the source OUI
A while ago we ran into issues while trying to enable the eDP backlight
control interface as defined by VESA, in order to make the DPCD
backlight controls on newer laptop panels work. The issue ended up being
much more complicated however, as we also apparently needed to add
support for an
On Fri, Dec 04 2020 at 08:05, Ira Weiny wrote:
> So I think I'm going to submit the base patch to Andrew today (with some
> cleanups per the comments in this thread).
Could you please base that on tip core/mm where the kmap_local() muck is
and use kmap_local() right away?
Thanks,
tglx
== Series Details ==
Series: drm/i915/display/dp: Compute the correct slice count for VDSC on DP
URL : https://patchwork.freedesktop.org/series/84599/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9444 -> Patchwork_19064
Closed vma are protected by the GT wakeref held as we lookup the vma, so
we know that the vma will not be freed as we process it for the execbuf.
Instead we expect to catch the closed status of the context, and simply
allow the close-race on an individual vma to be washed away.
Longer term, the
== Series Details ==
Series: drm/i915: Reduce duplicated switch cases in hpd code
URL : https://patchwork.freedesktop.org/series/84593/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9444 -> Patchwork_19063
Summary
---
This patch fixes the slice count computation algorithm
for calculating the slice count based on Peak pixel rate
and the max slice width allowed on the DSC engines.
We need to ensure slice count > min slice count req
as per DP spec based on peak pixel rate and that it is
greater than min slice
== Series Details ==
Series: drm/i915/display: Inject a failure into the initial modeset (rev2)
URL : https://patchwork.freedesktop.org/series/84592/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9444 -> Patchwork_19062
== Series Details ==
Series: dma-buf: Fix kerneldoc formatting
URL : https://patchwork.freedesktop.org/series/84585/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9444 -> Patchwork_19061
Summary
---
**FAILURE**
We may still be interested in results of a test even if it has tainted
the kernel. On the other hand, we need to kill the test on taint if no
other means of killing it on a jam is active.
If abort on both kernel taint or a timeout is requested, decrease all
potential timeouts significantly while
== Series Details ==
Series: dma-buf: Fix kerneldoc formatting
URL : https://patchwork.freedesktop.org/series/84585/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f9918c0f7808 dma-buf: Fix kerneldoc formatting
-:37: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email
== Series Details ==
Series: drm/i915: Disable outputs during unregister (rev2)
URL : https://patchwork.freedesktop.org/series/84371/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9444 -> Patchwork_19060
Summary
---
Hi Landwerlin,
Thanks for your feedback, Let me check with the commit owner. And I will upload
another reversion once it's done.
Hi Krishnaiah,
May I have your comment for this? Please let me know if there is new revision
path thanks.
Best regards,
Sean
-Original Message-
From:
From: Ville Syrjälä
With GEN11_HOTPLUG_CTL_LONG_DETECT(), SHOTPLUG_CTL_DDI_HPD_LONG_DETECT()
and ICP_TC_HPD_LONG_DETECT() taking the hpd_pin as their argument
we can remove some duplication in the long_detect() switch statements.
Signed-off-by: Ville Syrjälä
---
== Series Details ==
Series: drm/i915/gt: Add a comment about how to use udev for configuring engines
URL : https://patchwork.freedesktop.org/series/84578/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9442_full -> Patchwork_19057_full
Experiment with how fault tolerant we are if the initial modeset fails
and we need to abort the driver load.
Suggested-by: Tvrtko Ursulin
Signed-off-by: Chris Wilson
Cc: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
Experiment with how fault tolerant we are if the initial modeset fails
and we need to abort the driver load.
Suggested-by: Tvrtko Ursulin
Signed-off-by: Chris Wilson
Cc: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
== Series Details ==
Series: series starting with [CI,1/4] drm/i915/gt: Ignore repeated attempts to
suspend request flow across reset
URL : https://patchwork.freedesktop.org/series/84582/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9442 -> Patchwork_19059
On 2020-11-06 at 15:44:42 +0530, Gwan-gyeong Mun wrote:
> It is a preliminary work for supporting multiple EDP PSR and
> DP PanelReplay. And it refactors singleton PSR to Multi Transcoder
> supportable PSR.
> And this moves and renames the i915_psr structure of drm_i915_private's to
> intel_dp's
I wanted to look up something and noticed the hyperlink doesn't work.
While fixing that also noticed a trivial kerneldoc comment typo in the
same section, fix that too.
Signed-off-by: Daniel Vetter
---
Documentation/driver-api/dma-buf.rst | 2 +-
include/linux/dma-buf-map.h | 2 +-
2
== Series Details ==
Series: series starting with [CI,1/4] drm/i915/gt: Ignore repeated attempts to
suspend request flow across reset
URL : https://patchwork.freedesktop.org/series/84582/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used,
== Series Details ==
Series: series starting with [01/24] drm/i915: Disable outputs during unregister
URL : https://patchwork.freedesktop.org/series/84579/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9442 -> Patchwork_19058
== Series Details ==
Series: series starting with [CI,1/4] drm/i915/gt: Ignore repeated attempts to
suspend request flow across reset
URL : https://patchwork.freedesktop.org/series/84582/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6784cc924e25 drm/i915/gt: Ignore repeated
On 2020-11-18 at 16:42:29 +0530, Jani Nikula wrote:
> On Fri, 06 Nov 2020, Gwan-gyeong Mun wrote:
> > In order to support the PSR state of each transcoder, it adds
> > i915_psr_status to sub-directory of each transcoder.
> >
> > v2: Change using of Symbolic permissions 'S_IRUGO' to using of octal
Switch off the scanout during driver unregister, so we can shutdown the
HW immediately for unbind.
v2: Remove the old shutdown from remove, it should now be redundant.
Signed-off-by: Chris Wilson
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.c | 3 +--
1 file changed, 1
Quoting Ville Syrjälä (2020-12-04 16:01:11)
> On Tue, Dec 01, 2020 at 10:38:57PM +, Chris Wilson wrote:
> > Quoting Ville Syrjälä (2020-12-01 16:05:17)
> > > On Fri, Nov 27, 2020 at 10:05:48PM +, Chris Wilson wrote:
> > > > Switch off the scanout during driver unregister, so we can
On Fri, Nov 27, 2020 at 03:01:56PM +0200, Joonas Lahtinen wrote:
> + intel-gfx mailing list
>
> Quoting ira.we...@intel.com (2020-11-24 08:07:41)
> > From: Ira Weiny
> >
> > The pattern of kmap/mem*/kunmap is repeated. Use the new mem*_page()
> > calls instead.
> >
> > Cc: Patrik Jakobsson
>
On Tue, Dec 01, 2020 at 10:38:57PM +, Chris Wilson wrote:
> Quoting Ville Syrjälä (2020-12-01 16:05:17)
> > On Fri, Nov 27, 2020 at 10:05:48PM +, Chris Wilson wrote:
> > > Switch off the scanout during driver unregister, so we can shutdown the
> > > HW immediately for unbind.
> > >
> > >
== Series Details ==
Series: series starting with [01/24] drm/i915: Disable outputs during unregister
URL : https://patchwork.freedesktop.org/series/84579/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
== Series Details ==
Series: series starting with [01/24] drm/i915: Disable outputs during unregister
URL : https://patchwork.freedesktop.org/series/84579/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2bae8f3c30a7 drm/i915: Disable outputs during unregister
363bb75548d1
On Fri, Dec 04, 2020 at 01:40:03PM +0530, Anshuman Gupta wrote:
> On 2020-11-30 at 17:28:32 +0200, Imre Deak wrote:
> > On Mon, Nov 30, 2020 at 02:46:46PM +0530, Anshuman Gupta wrote:
> > > At usual case DC3CO exit happen automatically by DMC f/w whenever
> > > PSR2 clears idle. This happens
== Series Details ==
Series: drm/i915/gt: Add a comment about how to use udev for configuring engines
URL : https://patchwork.freedesktop.org/series/84578/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9442 -> Patchwork_19057
The GT and engine reset failures are completely invisible when looking at
a trace for a bug, but are vital to understanding the incomplete flow.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_reset.c | 22 ++
1 file changed, 10
Across a reset, we stop the engine but not the timers. This leaves a
window where the timers have inconsistent state with the engine, but
should only result in a spurious timeout. As we cancel the outstanding
events, also cancel their timers.
Signed-off-by: Chris Wilson
Reviewed-by: Mika
We currently presume that the engine reset is successful, cancelling the
expired preemption timer in the process. However, engine resets can
fail, leaving the timeout still pending and we will then respond to the
timeout again next time the tasklet fires. What we want is for the
failed engine
Before reseting the engine, we suspend the execution of the guilty
request, so that we can continue execution with a new context while we
slowly compress the captured error state for the guilty context. However,
if the reset fails, we will promptly attempt to reset the same request
again, and
Chris Wilson writes:
> We currently presume that the engine reset is successful, cancelling the
> expired preemption timer in the process. However, engine resets can
> fail, leaving the timeout still pending and we will then respond to the
> timeout again next time the tasklet fires. What we
Chris Wilson writes:
> Before reseting the engine, we suspend the execution of the guilty
> request, so that we can continue execution with a new context while we
> slowly compress the captured error state for the guilty context. However,
> if the reset fails, we will promptly attempt to reset
On 02/12/2020 06:03, Huang, Sean Z wrote:
From: Bommu Krishnaiah
This api allow user mode to create Protected buffer and context creation.
Signed-off-by: Bommu Krishnaiah
Cc: Telukuntla Sreedhar
Cc: Kondapally Kalyan
Cc: Gupta Anshuman
Cc: Huang Sean Z
---
The gvt component of this driver has ~120 pr_debugs, in 9 "classes".
Following model of drm.debug, add a parameter to map bits to these
classes.
In Makefile, add DYNAMIC_DEBUG_MODULE. This converts gvt's pr_debugs,
even if the rest of drm is not using CONFIG_DRM_USE_DYNAMIC_DEBUG.
Before reseting the engine, we suspend the execution of the guilty
request, so that we can continue execution with a new context while we
slowly compress the captured error state for the guilty context. However,
if the reset fails, we will promptly attempt to reset the same request
again, and
We currently presume that the engine reset is successful, cancelling the
expired preemption timer in the process. However, engine resets can
fail, leaving the timeout still pending and we will then respond to the
timeout again next time the tasklet fires. What we want is for the
failed engine
Since we wake the GT up before executing a request, and go to sleep as
soon as it is retired, the GT wake time not only represents how long the
device is powered up, but also provides a summary, albeit an overestimate,
of the device runtime (i.e. the rc0 time to compare against rc6 time).
v2:
Across a reset, we stop the engine but not the timers. This leaves a
window where the timers have inconsistent state with the engine, but
should only result in a spurious timeout. As we cancel the outstanding
events, also cancel their timers.
Signed-off-by: Chris Wilson
---
A quick test to verify that the backend accepts each type of timeline
and can use them to track and control request emission.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_timeline.c | 93 +
1 file changed, 93 insertions(+)
diff --git
Now that the tasklet completely controls scheduling of the requests, and
we postpone scheduling out the old requests, we can keep a hanging
virtual request bound to the engine on which it hung, and remove it from
te queue. On release, it will be returned to the same engine and remain
in its queue
Rather than going back and forth between the rb_node entry and the
virtual_engine type, store the ve local and reuse it. As the
container_of conversion from rb_node to virtual_engine requires a
variable offset, performing that conversion just once shaves off a bit
of code.
v2: Keep a single
Let's only wait for the list iterator when decoupling the virtual
breadcrumb, as the signaling of all the requests may take a long time,
during which we do not want to keep the tasklet spinning.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 2 ++
1 - 100 of 141 matches
Mail list logo
