Create the irq worker that serves as callback handler, those
callback stubs should be called while the hardware key teardown
occurs.
rev21:
- Fix bug, access i915 pointer before assigning the value at
intel_pxp_irq_handler()
- Writing register GEN11_CRYPTO_RSVD_INTR_ENABLE to enable the P
Implement the functions to allow PXP to send a GPU command, in
order to terminate the hardware session, so hardware can recycle
this session slot for the next usage.
rev21:
In intel_pxp_cmd.c:
- Remove the debug print as well as print_hex_dump()
- Should call i915_gem_object_flush_map(
Create the arbitrary session, with the fixed session id 0xf, after
system boot, for the case that application allocates the protected
buffer without establishing any protection session. Because the
hardware requires at least one alive session for protected buffer
creation. This arbitrary session n
Implement the intel_pxp_gem_object_status() to allow i915 display
querying the current PXP session state. In the design, display
should not perform protection flip on the protected buffers if
there is no PXP session alive. And Implement the funciton to set
the protected flag for gem context.
Signe
During the power event S3+ sleep/resume, hardware will lose all the
encryption keys for every hardware session, even though the
software session state was marked as alive after resume. So to
handle such case, PXP should terminate all the hardware sessions
and cleanup all the software states after t
From: Vitaly Lubart
Export PAVP client to work with i915_cp driver,
for binding it uses kernel component framework.
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/Kconfig | 2 +
drivers/misc/mei/Makefile | 1 +
drivers/misc/mei/pxp/Kconfig | 1
From: Bommu Krishnaiah
Same old gem_create but with now with extensions support. This is needed
to support various upcoming usecases. For now we use the extensions
mechanism to support PAVP.
rev21:
- Fix "Fi.CI.CHECKPATCH" warnings
Signed-off-by: Bommu Krishnaiah
Signed-off-by: Matthew Aul
From: Bommu Krishnaiah
This api allow user mode to create Protected buffer and context creation.
rev21:
- Only allow set I915_CONTEXT_PARAM_PROTECTED_CONTENT during context
creation (i915_gem_context_create_ioctl), but not allow during
context set param (i915_gem_context_setparam
From: Anshuman Gupta
Add support to enable/disable PLANE_SURF Decryption Request bit.
It requires only to enable plane decryption support when following
condition met.
1. PAVP session is enabled.
2. Buffer object is protected.
v2:
- Rebased to libva_cp-drm-tip_tgl_cp tree.
- Used gen fb obj user
Teardown is triggered when the display topology changes and no
long meets the secure playback requirement, and hardware trashes
all the encryption keys for display. So as a result, PXP should
handle such case and terminate the type0 sessions, which including
arb session
rev21:
- Bug fixing, we
Set the KCR init during the boot time, which is
required by hardware, to allow us doing further
protection operation such as sending commands to
GPU or TEE.
rev21:
- Remove "#define KCR_INIT_MASK_SHIFT (16)", but still keep the
macro in this .c file
- Write KCR_INIT reg inly for gen1
Implement the funcs to create the TEE channel, so kernel can
send the TEE commands directly to TEE for creating the arbitrary
(default) session.
rev21:
- Remove debug print_hex_dump() from intel_pxp_tee_io_message()
- In struct i915_pxp_component_ops, change "receive" to "recv"
Signed-off
PXP (Protected Xe Path) is an i915 componment, available on GEN12+,
that helps to establish the hardware protected session and manage
the status of the alive software session, as well as its life cycle.
This patch series is to allow the kernel space to create and
manage a single hardware session (
PXP (Protected Xe Path) is an i915 component, available on
GEN12+ that helps to establish the hardware protected session
and manage the status of the alive software session, as well
as its life cycle.
This patch series is to allow the kernel space to create and
manage a single hardware session (a.
== Series Details ==
Series: drm/i915/gt: Clear CACHE_MODE prior to clearing residuals (rev2)
URL : https://patchwork.freedesktop.org/series/85962/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9627 -> Patchwork_19381
Summa
Since we do a bare context switch with no restore, the clear residual
kernel runs on dirty state, and we must be careful to avoid executing
bad state from context registers inherited from a malicious client.
Fixes: 008ead6ef8f5 ("drm/i915/gt: Restore clear-residual mitigations for
Ivybridge, Bayt
== Series Details ==
Series: drm/i915/gt: Clear CACHE_MODE prior to clearing residuals
URL : https://patchwork.freedesktop.org/series/85962/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9627 -> Patchwork_19380
Summary
Since we do a bare context switch with no restore, the clear residual
kernel runs on dirty state, and we must be careful to avoid executing
bad state from context registers inherited from a malicious client.
Fixes: 008ead6ef8f5 ("drm/i915/gt: Restore clear-residual mitigations for
Ivybridge, Bayt
== Series Details ==
Series: drm/i915/gen12: Add display render clear color decompression support
(rev4)
URL : https://patchwork.freedesktop.org/series/85877/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9626_full -> Patchwork_19378_full
=
I just created a topic branch for adl-s enabling called
topic/adl-s-enabling, based on
git merge-base drm-intel/drm-intel-next drm-intel/drm-intel-gt-next
i.e.
fb5cfcaa2efb ("Merge tag 'drm-intel-gt-next-2021-01-14' of
git://anongit.freedesktop.org/drm/drm-intel into drm-next")
The idea is t
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