== Series Details ==
Series: series starting with [1/8] drm/i915: refactor ddi translations into a
separate file
URL : https://patchwork.freedesktop.org/series/86110/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650_full -> Patchwork_19436_full
== Series Details ==
Series: drm/i915/dp: Fix a logical vs bitwise OR bug
URL : https://patchwork.freedesktop.org/series/86114/
State : failure
== Summary ==
Applying: drm/i915/dp: Fix a logical vs bitwise OR bug
Using index info to reconstruct a base tree...
M
This was supposed to be | instead of ||.
Fixes: 522508b665df ("drm/i915/display: Let PCON convert from RGB to YCbCr if
it can")
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
== Series Details ==
Series: series starting with [1/8] drm/i915: refactor ddi translations into a
separate file
URL : https://patchwork.freedesktop.org/series/86110/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650 -> Patchwork_19436
== Series Details ==
Series: series starting with [1/8] drm/i915: refactor ddi translations into a
separate file
URL : https://patchwork.freedesktop.org/series/86110/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be
== Series Details ==
Series: series starting with [1/8] drm/i915: refactor ddi translations into a
separate file
URL : https://patchwork.freedesktop.org/series/86110/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8977ebfa68d5 drm/i915: refactor ddi translations into a
From: Dave Airlie
This moves the older i9xx/vlv/chv enable/disable to dpll file.
Signed-off-by: Dave Airlie
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 512 ---
drivers/gpu/drm/i915/display/intel_display.h | 3 -
From: Dave Airlie
Migrate this code out like the skylake code.
Signed-off-by: Dave Airlie
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/i9xx_plane.c| 119 +++
drivers/gpu/drm/i915/display/i9xx_plane.h| 4 +
drivers/gpu/drm/i915/display/intel_display.c
From: Dave Airlie
There is no need for this to be out of line.
Reviewed-by: Ville Syrjälä
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/i915/display/intel_display.c | 8
drivers/gpu/drm/i915/display/intel_display.h | 1 -
From: Dave Airlie
Daniel suggested this should move here.
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_crtc.c | 230
drivers/gpu/drm/i915/display/intel_sprite.c | 228 ---
2
From: Dave Airlie
This just cleans these up a bit.
Signed-off-by: Dave Airlie
Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_sprite.c| 7 +++
drivers/gpu/drm/i915/display/skl_universal_plane.c | 4 ++--
2 files changed, 5
From: Dave Airlie
Daniel asked for this, but it's a bit messy and I'm not sure
how best to clean it up yet.
Signed-off-by: Dave Airlie
[Jani: also moved fdi buf trans to intel_fdi.c.]
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_crt.c | 1 +
This rebases, fixes up the headers (thanks Jani, for pointing that out),
and adds missing tags and review tags.
I think only patch 3 is missing an r-b, I've fixed the header issues
he pointed out.
Dave.
___
Intel-gfx mailing list
On 2021.01.20 14:21:53 +0200, Joonas Lahtinen wrote:
> Quoting Zhenyu Wang (2021-01-18 07:07:39)
> >
> > Hi,
> >
> > This is GVT next for 5.12 against drm-intel-gt-next which is mostly
> > for cmd parser enhancement which adds extra check on register load
> > depending on initial context and
== Series Details ==
Series: drm/i915/gt: Move execlists_reset() out of line
URL : https://patchwork.freedesktop.org/series/86106/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9650_full -> Patchwork_19435_full
Summary
On Fri, 15 Jan 2021 at 01:57, Ville Syrjälä
wrote:
>
> On Thu, Jan 14, 2021 at 01:13:50PM +0200, Jani Nikula wrote:
> > From: Dave Airlie
> >
> > Rework the plane init calls to do the gen test one level higher.
> >
> > Rework some of the plane helpers so they can live in new file,
> > there is
== Series Details ==
Series: drm/i915/gt: Call stop_ring() from ring resume, again
URL : https://patchwork.freedesktop.org/series/86103/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9650_full -> Patchwork_19434_full
== Series Details ==
Series: drm/i915/gt: Move execlists_reset() out of line
URL : https://patchwork.freedesktop.org/series/86106/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650 -> Patchwork_19435
Summary
---
== Series Details ==
Series: drm/i915/uc: Use platform specific defaults for GuC/HuC enabling
URL : https://patchwork.freedesktop.org/series/86100/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9650_full -> Patchwork_19432_full
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/ttm/ttm_pool.c
between commit:
bb52cb0dec8d ("drm/ttm: make the pool shrinker lock a mutex")
from Linus' tree and commits:
ba051901d10f ("drm/ttm: add a debugfs file for the global page pools")
Hi all,
On Wed, 20 Jan 2021 10:57:15 +1100 Stephen Rothwell
wrote:
>
> After merging the drm-intel tree, today's linux-next build (arm
> multi_v7_defconfig) failed like this:
>
> drivers/gpu/drm/msm/dp/dp_ctrl.c: In function 'dp_ctrl_use_fixed_nvid':
> drivers/gpu/drm/msm/dp/dp_ctrl.c:1425:16:
Reduce the bulk of execlists_submission_tasklet by moving the unlikely
reset function out of line.
add/remove: 1/0 grow/shrink: 0/1 up/down: 960/-935 (25)
Function old new delta
execlists_reset- 960+960
== Series Details ==
Series: drm/i915/gt: Call stop_ring() from ring resume, again
URL : https://patchwork.freedesktop.org/series/86103/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650 -> Patchwork_19434
Summary
---
== Series Details ==
Series: series starting with [v12,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86091/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9650_full -> Patchwork_19428_full
For reasons I cannot explain, except to say this is Sandybridge after
all, call stop_ring() again dring ring resume in order to prevent
mysterious hard hangs.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
If this survives the night on my snb-2500, I declare victory.
---
== Series Details ==
Series: drm/i915/gen12: Add display render clear color decompression support
(rev5)
URL : https://patchwork.freedesktop.org/series/85877/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9650 -> Patchwork_19433
== Series Details ==
Series: series starting with [01/10] drm/i915/gt: Do not suspend bonded
requests if one hangs
URL : https://patchwork.freedesktop.org/series/86088/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650_full -> Patchwork_19427_full
== Series Details ==
Series: drm/i915/gen12: Add display render clear color decompression support
(rev5)
URL : https://patchwork.freedesktop.org/series/85877/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
== Series Details ==
Series: drm/i915/gen12: Add display render clear color decompression support
(rev5)
URL : https://patchwork.freedesktop.org/series/85877/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
249da006ed76 drm/framebuffer: Format modifier for Intel Gen 12 render
== Series Details ==
Series: drm/i915/uc: Use platform specific defaults for GuC/HuC enabling
URL : https://patchwork.freedesktop.org/series/86100/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650 -> Patchwork_19432
== Series Details ==
Series: series starting with [1/2] drm/i915/gt: Do not suspend bonded requests
if one hangs
URL : https://patchwork.freedesktop.org/series/86087/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650_full -> Patchwork_19426_full
== Series Details ==
Series: kbuild: use always-y instead of extra-y
URL : https://patchwork.freedesktop.org/series/86094/
State : failure
== Summary ==
Applying: kbuild: use always-y instead of extra-y
error: sha1 information is lacking or useless (scripts/Makefile.lib).
error: could not
On Wed, Jan 20, 2021 at 03:23:51PM +0900, Masahiro Yamada wrote:
> As commit d0e628cd817f ("kbuild: doc: clarify the difference between
> extra-y and always-y") explained, extra-y should be used for listing
> the prerequsites of vmlinux. always-y is a better fix here.
prerequisites
Glad to see
Add a simple helper to read data with the CPU from the page of a GEM
object. Do the read either via a kmap if the object has struct pages
or an iomap otherwise. This is needed by the next patch, reading a u64
value from the object (w/o requiring the obj to be mapped to the GPU).
Suggested by
== Series Details ==
Series: series starting with [1/4] drm/i915: Nuke not needed members of
dram_info
URL : https://patchwork.freedesktop.org/series/86092/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9650 -> Patchwork_19429
== Series Details ==
Series: drm/i915/gem: Allow importing of shmemfs objects into any device
URL : https://patchwork.freedesktop.org/series/86093/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK
Quoting Chris Wilson (2021-01-20 18:06:08)
> Quoting Matthew Auld (2021-01-20 17:46:10)
> > On Wed, 20 Jan 2021 at 15:40, Chris Wilson wrote:
> > >
> > > If we import a shmemfs object between devices, for example from
> > > Tigerlake to DG1, we can simply reuse the native object and its backing
>
== Series Details ==
Series: series starting with [v12,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86091/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650 -> Patchwork_19428
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip v5.11-rc4 next-20210120]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use
Hi Daniel,
On Wed, 20 Jan 2021 13:12:21 +0100 Daniel Vetter wrote:
>
> I've pulled drm-misc-next into drm-next now, so as long as all other
> drm trees are merged after drm, this should be solved now.
> drm-intel-next also has their msm build breakage fixed (I acked the
> patch already), so
== Series Details ==
Series: drm/msm/dp: fix build after dp quirk helper change
URL : https://patchwork.freedesktop.org/series/86079/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650_full -> Patchwork_19424_full
Summary
From: John Harrison
The meaning of 'default' for the enable_guc module parameter has been
updated to accurately reflect what is supported on current platforms.
So start using the defaults instead of forcing everything off.
Signed-off-by: John Harrison
CC: Daniele Ceraolo Spurio
---
== Series Details ==
Series: series starting with [v12,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86091/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be
== Series Details ==
Series: series starting with [v12,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86091/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ca6ecae10b15 drm/i915/display: Support PSR Multiple Instances
On Wed, Jan 20, 2021 at 09:25:10PM +0200, Jani Nikula wrote:
> On Wed, 20 Jan 2021, Rodrigo Vivi wrote:
> > On Wed, Jan 20, 2021 at 12:18:33PM +0200, Jani Nikula wrote:
> >> Add some namespacing to highlight what belongs where. No functional
> >> changes.
> >>
> >> Cc: Anshuman Gupta
> >>
== Series Details ==
Series: series starting with [01/10] drm/i915/gt: Do not suspend bonded
requests if one hangs
URL : https://patchwork.freedesktop.org/series/86088/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650 -> Patchwork_19427
On Wed, Jan 20, 2021 at 12:02:49PM +, Chris Wilson wrote:
> Quoting Imre Deak (2021-01-15 19:41:00)
> > Add a simple helper to read data with the CPU from the page of a GEM
> > object. Do the read either via a kmap if the object has struct pages
> > or an iomap otherwise. This is needed by the
== Series Details ==
Series: drm/i915/region: don't leak the object on error
URL : https://patchwork.freedesktop.org/series/86077/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650_full -> Patchwork_19423_full
Summary
On Wed, 2021-01-20 at 10:52 -0800, Lucas De Marchi wrote:
> On Wed, Jan 20, 2021 at 10:42:46AM -0800, Jose Souza wrote:
> > On Wed, 2021-01-20 at 10:31 -0800, Lucas De Marchi wrote:
> > > On Wed, Jan 20, 2021 at 07:16:08AM -0800, Jose Souza wrote:
> > > > Valid, ranks and bandwidth_kbps are set
On Wed, 20 Jan 2021, Rodrigo Vivi wrote:
> On Wed, Jan 20, 2021 at 12:18:33PM +0200, Jani Nikula wrote:
>> Add some namespacing to highlight what belongs where. No functional
>> changes.
>>
>> Cc: Anshuman Gupta
>> Signed-off-by: Jani Nikula
>> ---
>>
== Series Details ==
Series: series starting with [01/10] drm/i915/gt: Do not suspend bonded
requests if one hangs
URL : https://patchwork.freedesktop.org/series/86088/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't
On Mon, 2020-12-07 at 22:35 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Get rid of the "I like my random new style best" approach and unify
> the handling for the DDI buf trans table sanity checks once again.
Reviewed-by: José Roberto de Souza
>
> Signed-off-by: Ville Syrjälä
>
== Series Details ==
Series: series starting with [01/10] drm/i915/gt: Do not suspend bonded
requests if one hangs
URL : https://patchwork.freedesktop.org/series/86088/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ed0915405628 drm/i915/gt: Do not suspend bonded requests if
On Mon, 2020-12-07 at 22:35 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The MH PHY vswing table does have all the entries these days. Get
> rid of the old hacks in the code which claim otherwise.
>
> This hack was totally bogus anyway. The correct way to handle the
> lack of those two
== Series Details ==
Series: series starting with [1/2] drm/i915/gt: Do not suspend bonded requests
if one hangs
URL : https://patchwork.freedesktop.org/series/86087/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650 -> Patchwork_19426
== Series Details ==
Series: series starting with [CI,1/6] drm/i915/gem: Almagamate clflushes on
suspend (rev2)
URL : https://patchwork.freedesktop.org/series/86058/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9650_full -> Patchwork_19421_full
On Wed, 20 Jan 2021 at 15:40, Chris Wilson wrote:
>
> If we import a shmemfs object between devices, for example from
> Tigerlake to DG1, we can simply reuse the native object and its backing
> store.
Hmmm interesting, so does that include re-using the actual sg mapping
for the backing pages?
== Series Details ==
Series: drm/msm/dp: fix build after dp quirk helper change
URL : https://patchwork.freedesktop.org/series/86079/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650 -> Patchwork_19424
Summary
---
On Wed, Jan 20, 2021 at 12:18:34PM +0200, Jani Nikula wrote:
> Split out the DP aux functionality to a new intel_dp_aux.[ch]. This is a
> surprisingly clean cut.
I had wondered about this split in the past... surprisingly clean cut indeed...
>
> v2:
> - Remove intel_dp_pack_aux declaration from
On Wed, Jan 20, 2021 at 12:18:33PM +0200, Jani Nikula wrote:
> Add some namespacing to highlight what belongs where. No functional
> changes.
>
> Cc: Anshuman Gupta
> Signed-off-by: Jani Nikula
> ---
> .../drm/i915/display/intel_display_debugfs.c | 8 +-
>
Reviewed-by: Lyude Paul
On Wed, 2021-01-20 at 13:07 +0200, Jani Nikula wrote:
> Commit 7c553f8b5a7d ("drm/dp: Revert "drm/dp: Introduce EDID-based
> quirks"") removed drm_dp_get_edid_quirks() and changed the signature of
> drm_dp_has_quirk() while they were still being used in msm. Fix the
>
Both patches applied to topic/adl-s-enabling branch.
Lucas De Marchi
On Tue, Jan 19, 2021 at 11:29:30AM -0800, Lucas De Marchi wrote:
From: Aditya Swarup
TGL adds another level of indirection for applying WA based on stepping
information rather than PCI REVID. So change TGL_REVID enum into
== Series Details ==
Series: drm/msm/dp: fix build after dp quirk helper change
URL : https://patchwork.freedesktop.org/series/86079/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
85c10923c0f6 drm/msm/dp: fix build after dp quirk helper change
-:6: ERROR:GIT_COMMIT_ID: Please
== Series Details ==
Series: drm/i915/region: don't leak the object on error
URL : https://patchwork.freedesktop.org/series/86077/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650 -> Patchwork_19423
Summary
---
== Series Details ==
Series: HDCP misc fixes (rev2)
URL : https://patchwork.freedesktop.org/series/86025/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650 -> Patchwork_19422
Summary
---
**SUCCESS**
No
== Series Details ==
Series: series starting with [1/4] drm/i915/pps: refactor init abstractions
URL : https://patchwork.freedesktop.org/series/86076/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650_full -> Patchwork_19420_full
As commit d0e628cd817f ("kbuild: doc: clarify the difference between
extra-y and always-y") explained, extra-y should be used for listing
the prerequsites of vmlinux. always-y is a better fix here.
Signed-off-by: Masahiro Yamada
---
Documentation/devicetree/bindings/Makefile | 8
On Wed, 2021-01-20 at 14:21 +0200, Joonas Lahtinen wrote:
> Quoting Zhenyu Wang (2021-01-18 07:07:39)
> >
> > Hi,
> >
> > This is GVT next for 5.12 against drm-intel-gt-next which is mostly
> > for cmd parser enhancement which adds extra check on register load
> > depending on initial context
== Series Details ==
Series: series starting with [CI,1/6] drm/i915/gem: Almagamate clflushes on
suspend (rev2)
URL : https://patchwork.freedesktop.org/series/86058/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650 -> Patchwork_19421
If we import a shmemfs object between devices, for example from
Tigerlake to DG1, we can simply reuse the native object and its backing
store.
Suggested-by: Imre Deak
Signed-off-by: Chris Wilson
Cc: Matthew Auld
Cc: Imre Deak
---
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 7 +++
1 file
== Series Details ==
Series: series starting with [CI,1/6] drm/i915/gem: Almagamate clflushes on
suspend (rev2)
URL : https://patchwork.freedesktop.org/series/86058/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
12342e09d0d8 drm/i915/gem: Almagamate clflushes on suspend
-:24:
== Series Details ==
Series: series starting with [v12,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86072/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650_full -> Patchwork_19419_full
As it now it is always required for GEN12+ the is_16gb_dimm name
do not make sense for GEN12+.
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/intel_dram.c | 10 +-
drivers/gpu/drm/i915/intel_pm.c | 2 +-
3 files changed, 7
DRAM information is required to properly program display.
Before "drm/i915/gen11+: Only load DRAM information from pcode" we
were failing driver load if unable to fetch DRAM information from
pcode form GEN11+ but we should also extend it to GEN9 plaforms.
Signed-off-by: José Roberto de Souza
---
Up to now we were reading some DRAM information from MCHBAR register
and from pcode what is already not good but some GEN12(TGL-H and ADL-S)
platforms have MCHBAR DRAM information in different offsets.
This was notified to HW team that decided that the best alternative is
always apply the
Valid, ranks and bandwidth_kbps are set into dram_info but are not
used anywhere else so nuking it.
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_drv.c | 4 +--
drivers/gpu/drm/i915/i915_drv.h | 3 --
drivers/gpu/drm/i915/intel_dram.c | 47
== Series Details ==
Series: series starting with [1/4] drm/i915/pps: refactor init abstractions
URL : https://patchwork.freedesktop.org/series/86076/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650 -> Patchwork_19420
In order to support the PSR state of each transcoder, it adds
i915_psr_status to sub-directory of each transcoder.
v2: Change using of Symbolic permissions 'S_IRUGO' to using of octal
permissions '0444'
v5: Addressed JJani Nikula's review comments
- Remove checking of Gen12 for
It is a preliminary work for supporting multiple EDP PSR and
DP PanelReplay. And it refactors singleton PSR to Multi Transcoder
supportable PSR.
And this moves and renames the i915_psr structure of drm_i915_private's to
intel_dp's intel_psr structure.
It also causes changes in PSR interrupt
== Series Details ==
Series: series starting with [1/4] drm/i915/pps: refactor init abstractions
URL : https://patchwork.freedesktop.org/series/86076/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
== Series Details ==
Series: series starting with [1/4] drm/i915/pps: refactor init abstractions
URL : https://patchwork.freedesktop.org/series/86076/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3210f99b0871 drm/i915/pps: refactor init abstractions
b59f412b98d3 drm/i915/pps:
== Series Details ==
Series: series starting with [v12,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86072/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9650 -> Patchwork_19419
On 1/18/21 1:55 PM, Thomas Hellström (Intel) wrote:
On 1/18/21 1:43 PM, Maarten Lankhorst wrote:
Op 18-01-2021 om 12:30 schreef Thomas Hellström (Intel):
Hi,
On 1/5/21 4:35 PM, Maarten Lankhorst wrote:
Instead of doing what we do currently, which will never work with
PROVE_LOCKING, do the
== Series Details ==
Series: series starting with [v12,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86072/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be
== Series Details ==
Series: series starting with [v12,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86072/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
25db9a3ad7a1 drm/i915/display: Support PSR Multiple Instances
Now that we are careful to always force-restore contexts upon rewinding
(where necessary), we can restore our optimisation to skip over
completed active execlists when dequeuing.
Referenecs: 35f3fd8182ba ("drm/i915/execlists: Workaround switching back to a
completed context")
References:
Exercise rescheduling priority inheritance around a sequence of requests
that wrap around all the engines.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i915/selftests/i915_scheduler.c | 219 ++
1 file changed, 219 insertions(+)
diff --git
Currently, we construct and teardown the i915_dependency chains using a
global spinlock. As the lists are entirely local, it should be possible
to use an double-lock with an explicit nesting [signaler -> waiter,
always] and so avoid the costly convenience of a global spinlock.
Signed-off-by:
Looking to the future, we want to set the scheduling attributes
explicitly and so replace the generic engine->schedule() with the more
direct i915_request_set_priority()
What it loses in removing the 'schedule' name from the function, it
gains in having an explicit entry point with a stated goal.
Quoting Zhenyu Wang (2021-01-18 07:07:39)
>
> Hi,
>
> This is GVT next for 5.12 against drm-intel-gt-next which is mostly
> for cmd parser enhancement which adds extra check on register load
> depending on initial context and handles vGPU register state
> accordingly.
I think we were bit
In anticipation of wanting to be able to call pi from underneath an
engine's active.lock, rework the priority inheritance to primarily work
along an engine's priority queue, delegating any other engine that the
chain may traverse to a worker. This reduces the global spinlock from
governing the
The core of the scheduling algorithm is that we compute the topological
order of the fence DAG. Knowing that we have a DAG, we should be able to
use a DFS to compute the topological sort in linear time. However,
during the conversion of the recursive algorithm into an iterative one,
the
As a topological sort, we expect it to run in linear graph time,
O(V+E). In removing the recursion, it is no longer a DFS but rather a
BFS, and performs as O(VE). Let's demonstrate how bad this is with a few
examples, and build a few test cases to verify a potential fix.
Signed-off-by: Chris
As we do not have any internal priority levels, the priority can be set
directed from the user values.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/display/intel_display.c | 4 +-
drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 +--
.../i915/gem/selftests/i915_gem_object_blt.c |
Since we are not using any internal priority levels, and in the next few
patches will introduce a new index for which the optimisation is not so
lear cut, discard the small table within the priolist.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i915/gt/intel_engine_heartbeat.c | 2 +-
Treat the dependency between bonded requests as weak and leave the
remainder of the pair on the GPU if one hangs.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
Now that we are careful to always force-restore contexts upon rewinding
(where necessary), we can restore our optimisation to skip over
completed active execlists when dequeuing.
Referenecs: 35f3fd8182ba ("drm/i915/execlists: Workaround switching back to a
completed context")
References:
Treat the dependency between bonded requests as weak and leave the
remainder of the pair on the GPU if one hangs.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
Since we are not using any internal priority levels, and in the next few
patches will introduce a new index for which the optimisation is not so
lear cut, discard the small table within the priolist.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i915/gt/intel_engine_heartbeat.c | 2 +-
As we do not have any internal priority levels, the priority can be set
directed from the user values.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/display/intel_display.c | 4 +-
drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 +--
.../i915/gem/selftests/i915_gem_object_blt.c |
1 - 100 of 129 matches
Mail list logo
