Re: [Intel-gfx] [RFC PATCH 0/9] drm/i915/spi: discrete graphics internal spi

2021-02-22 Thread Winkler, Tomas
> - Ursprüngliche Mail - > >> > I'm not sure whether we want to take that path. > > > > Hi Richard is there any way we can try to unclutter this ? > > Of course there is a way. :-) > Your use-case really seems to be special and MTD needs an improvement. > Miquel, Vignesh and I just need

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: Do not allow DC3CO if PSR SF is enabled (rev4)

2021-02-22 Thread Patchwork
== Series Details == Series: drm/i915/display: Do not allow DC3CO if PSR SF is enabled (rev4) URL : https://patchwork.freedesktop.org/series/87283/ State : success == Summary == CI Bug Log - changes from CI_DRM_9796_full -> Patchwork_19719_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Do not allow DC3CO if PSR SF is enabled (rev4)

2021-02-22 Thread Patchwork
== Series Details == Series: drm/i915/display: Do not allow DC3CO if PSR SF is enabled (rev4) URL : https://patchwork.freedesktop.org/series/87283/ State : success == Summary == CI Bug Log - changes from CI_DRM_9796 -> Patchwork_19719

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Do not allow DC3CO if PSR SF is enabled (rev3)

2021-02-22 Thread Patchwork
== Series Details == Series: drm/i915/display: Do not allow DC3CO if PSR SF is enabled (rev3) URL : https://patchwork.freedesktop.org/series/87283/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9795_full -> Patchwork_19718_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names

2021-02-22 Thread Patchwork
== Series Details == Series: drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names URL : https://patchwork.freedesktop.org/series/87299/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9795_full -> Patchwork_19717_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Do not allow DC3CO if PSR SF is enabled (rev3)

2021-02-22 Thread Patchwork
== Series Details == Series: drm/i915/display: Do not allow DC3CO if PSR SF is enabled (rev3) URL : https://patchwork.freedesktop.org/series/87283/ State : success == Summary == CI Bug Log - changes from CI_DRM_9795 -> Patchwork_19718

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: Do not allow DC3CO if PSR SF is enabled (rev2)

2021-02-22 Thread Patchwork
== Series Details == Series: drm/i915/display: Do not allow DC3CO if PSR SF is enabled (rev2) URL : https://patchwork.freedesktop.org/series/87283/ State : success == Summary == CI Bug Log - changes from CI_DRM_9795_full -> Patchwork_19716_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names

2021-02-22 Thread Patchwork
== Series Details == Series: drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names URL : https://patchwork.freedesktop.org/series/87299/ State : success == Summary == CI Bug Log - changes from CI_DRM_9795 -> Patchwork_19717

Re: [Intel-gfx] [PATCH v3] drm/i915/display: Do not allow DC3CO if PSR SF is enabled

2021-02-22 Thread Souza, Jose
On Mon, 2021-02-22 at 23:30 +0200, Gwan-gyeong Mun wrote: > Even though GEN12+ HW supports PSR + DC3CO, DMC's HW DC3CO exit mechanism > has an issue with using of Selective Fecth and PSR2 manual tracking. > And as some GEN12+ platforms (RKL, ADL-S) don't support PSR2 HW tracking, > Selective Fetch

[Intel-gfx] [PATCH v3] drm/i915/display: Do not allow DC3CO if PSR SF is enabled

2021-02-22 Thread Gwan-gyeong Mun
Even though GEN12+ HW supports PSR + DC3CO, DMC's HW DC3CO exit mechanism has an issue with using of Selective Fecth and PSR2 manual tracking. And as some GEN12+ platforms (RKL, ADL-S) don't support PSR2 HW tracking, Selective Fetch will be enabled by default on that platforms. Therefore if the

[Intel-gfx] 2021 X.Org Board of Directors Elections Nomination period is NOW

2021-02-22 Thread Harry Wentland
We are seeking nominations for candidates for election to the X.Org Foundation Board of Directors. All X.Org Foundation members are eligible for election to the board. Nominations for the 2021 election are now open and will remain open until Sunday, the 7th of March. The Board consists of

[Intel-gfx] [PATCH] drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names

2021-02-22 Thread Imre Deak
In Bspec the TGL TypeC ports are TC1-6, the AUX power well request flags are USBC1-6/TBT1-6, so for clarity use these names in the port power domain names instead of the D-I terminology (which Bspec uses only for the ICL TypeC ports). No functional change. Cc: Souza Jose Signed-off-by: Imre

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Do not allow DC3CO if PSR SF is enabled (rev2)

2021-02-22 Thread Patchwork
== Series Details == Series: drm/i915/display: Do not allow DC3CO if PSR SF is enabled (rev2) URL : https://patchwork.freedesktop.org/series/87283/ State : success == Summary == CI Bug Log - changes from CI_DRM_9795 -> Patchwork_19716

Re: [Intel-gfx] [PATCH v2] drm/i915/display: Do not allow DC3CO if PSR SF is enabled

2021-02-22 Thread Souza, Jose
On Mon, 2021-02-22 at 21:05 +0200, Gwan-gyeong Mun wrote: > Even though GEN12+ HW supports PSR + DC3CO, DMC's HW DC3CO exit mechanism > has an issue with using of Selective Fecth and PSR2 manual tracking. > And as some GEN12+ platforms (RKL, ADL-S) don't support PSR2 HW tracking, > Selective Fetch

[Intel-gfx] [PATCH v2] drm/i915/display: Do not allow DC3CO if PSR SF is enabled

2021-02-22 Thread Gwan-gyeong Mun
Even though GEN12+ HW supports PSR + DC3CO, DMC's HW DC3CO exit mechanism has an issue with using of Selective Fecth and PSR2 manual tracking. And as some GEN12+ platforms (RKL, ADL-S) don't support PSR2 HW tracking, Selective Fetch will be enabled by default on that platforms. Therefore if the

Re: [Intel-gfx] [PATCH 03/12] drm/i915/bios: limit default outputs by platform on missing VBT

2021-02-22 Thread Ville Syrjälä
On Wed, Feb 17, 2021 at 07:03:33PM +0200, Jani Nikula wrote: > Pre-DDI and non-CHV aren't using the information created here anyway, so > don't bother setting the defaults for them. This should be a > non-functional change, but is separated here to catch any regressions in > a single commit. > >

Re: [Intel-gfx] [PATCH 02/12] drm/i915/bios: store bdb version in i915

2021-02-22 Thread Ville Syrjälä
On Wed, Feb 17, 2021 at 07:03:32PM +0200, Jani Nikula wrote: > We'll be needing the version in more places in the future, so avoid the > need to pass it around. No functional changes. > > Cc: Lucas De Marchi > Cc: Ville Syrjälä > Signed-off-by: Jani Nikula Reviewed-by: Ville Syrjälä > --- >

Re: [Intel-gfx] [PATCH 01/12] drm/i915/bios: mass convert dev_priv to i915

2021-02-22 Thread Ville Syrjälä
On Wed, Feb 17, 2021 at 07:03:31PM +0200, Jani Nikula wrote: > Time to just yank out the bandage. No functional changes. > > Cc: Lucas De Marchi > Cc: Ville Syrjälä > Signed-off-by: Jani Nikula Reviewed-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/display/intel_bios.c | 766

Re: [Intel-gfx] [PATCH v3 6/9] drm/i915/mso: add splitter state readout for platforms that support it

2021-02-22 Thread Shankar, Uma
> -Original Message- > From: Nikula, Jani > Sent: Monday, February 22, 2021 10:25 PM > To: Shankar, Uma ; intel-gfx@lists.freedesktop.org > Cc: Varide, Nischal > Subject: RE: [Intel-gfx] [PATCH v3 6/9] drm/i915/mso: add splitter state > readout for > platforms that support it > > On

Re: [Intel-gfx] [PATCH v3 6/9] drm/i915/mso: add splitter state readout for platforms that support it

2021-02-22 Thread Jani Nikula
On Mon, 22 Feb 2021, "Shankar, Uma" wrote: >> -Original Message- >> From: Intel-gfx On Behalf Of Jani >> Nikula >> Sent: Thursday, February 11, 2021 8:22 PM >> To: intel-gfx@lists.freedesktop.org >> Cc: Nikula, Jani ; Varide, Nischal >> >> Subject: [Intel-gfx] [PATCH v3 6/9]

Re: [Intel-gfx] [PATCH v3 5/9] drm/i915/reg: add stream splitter configuration definitions

2021-02-22 Thread Jani Nikula
On Mon, 22 Feb 2021, "Shankar, Uma" wrote: >> -Original Message- >> From: Intel-gfx On Behalf Of Jani >> Nikula >> Sent: Thursday, February 11, 2021 8:22 PM >> To: intel-gfx@lists.freedesktop.org >> Cc: Nikula, Jani ; Varide, Nischal >> >> Subject: [Intel-gfx] [PATCH v3 5/9]

[Intel-gfx] ✓ Fi.CI.IGT: success for drivers: gnu: drm: i915: gvt: Fixed couple of spellings in the file gtt.c

2021-02-22 Thread Patchwork
== Series Details == Series: drivers: gnu: drm: i915: gvt: Fixed couple of spellings in the file gtt.c URL : https://patchwork.freedesktop.org/series/87286/ State : success == Summary == CI Bug Log - changes from CI_DRM_9793_full -> Patchwork_19715_full

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: Do not allow DC3CO if PSR SF is enabled

2021-02-22 Thread Patchwork
== Series Details == Series: drm/i915/display: Do not allow DC3CO if PSR SF is enabled URL : https://patchwork.freedesktop.org/series/87283/ State : success == Summary == CI Bug Log - changes from CI_DRM_9793_full -> Patchwork_19714_full

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/compat: Clear bounce structures

2021-02-22 Thread Patchwork
== Series Details == Series: drm/compat: Clear bounce structures URL : https://patchwork.freedesktop.org/series/87281/ State : success == Summary == CI Bug Log - changes from CI_DRM_9793_full -> Patchwork_19713_full Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/compat: more dummy implementations

2021-02-22 Thread Patchwork
== Series Details == Series: drm/compat: more dummy implementations URL : https://patchwork.freedesktop.org/series/87280/ State : success == Summary == CI Bug Log - changes from CI_DRM_9793_full -> Patchwork_19712_full Summary ---

Re: [Intel-gfx] i915 dma faults on Xen

2021-02-22 Thread Roger Pau Monné
On Fri, Feb 19, 2021 at 12:30:23PM -0500, Jason Andryuk wrote: > On Wed, Oct 21, 2020 at 9:59 AM Jan Beulich wrote: > > > > On 21.10.2020 15:36, Jason Andryuk wrote: > > > On Wed, Oct 21, 2020 at 8:53 AM Jan Beulich wrote: > > >> > > >> On 21.10.2020 14:45, Jason Andryuk wrote: > > >>> On Wed,

Re: [Intel-gfx] [PATCH] drivers: gnu: drm: i915: gvt: Fixed couple of spellings in the file gtt.c

2021-02-22 Thread Randy Dunlap
On 2/22/21 6:21 AM, Randy Dunlap wrote: > On 2/22/21 12:18 AM, Bhaskar Chowdhury wrote: >> >> s/negtive/negative/ >> s/possilbe/possible/ >> >> Signed-off-by: Bhaskar Chowdhury > > Acked-by: Randy Dunlap except the Subject has a typo in it. s/gnu/gpu/ >> --- >> drivers/gpu/drm/i915/gvt/gtt.c

Re: [Intel-gfx] [PATCH] drivers: gnu: drm: i915: gvt: Fixed couple of spellings in the file gtt.c

2021-02-22 Thread Randy Dunlap
On 2/22/21 12:18 AM, Bhaskar Chowdhury wrote: > > s/negtive/negative/ > s/possilbe/possible/ > > Signed-off-by: Bhaskar Chowdhury Acked-by: Randy Dunlap > --- > drivers/gpu/drm/i915/gvt/gtt.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Allow PSR2 selective fetch to be enabled at run-time (rev2)

2021-02-22 Thread Souza, Jose
On Wed, 2021-02-10 at 00:27 +, Patchwork wrote: Patch Details Series: drm/i915/display: Allow PSR2 selective fetch to be enabled at run-time (rev2) URL:https://patchwork.freedesktop.org/series/86773/ State: failure Details:

Re: [Intel-gfx] [PATCH] drm/i915/display: Do not allow DC3CO if PSR SF is enabled

2021-02-22 Thread Souza, Jose
On Mon, 2021-02-22 at 13:24 +0200, Gwan-gyeong Mun wrote: > Even though GEN12+ HW supports PSR + DC3CO, DMC's HW DC3CO exitmachanism typo and missing space between exit and mechanism > has an issue with using of SelectiveFecth and PSR2 ManualTracking. manual tracking. > And as new GEN12+

[Intel-gfx] ✓ Fi.CI.BAT: success for drivers: gnu: drm: i915: gvt: Fixed couple of spellings in the file gtt.c

2021-02-22 Thread Patchwork
== Series Details == Series: drivers: gnu: drm: i915: gvt: Fixed couple of spellings in the file gtt.c URL : https://patchwork.freedesktop.org/series/87286/ State : success == Summary == CI Bug Log - changes from CI_DRM_9793 -> Patchwork_19715

Re: [Intel-gfx] [PATCH RFC v1 5/6] xen-swiotlb: convert variables to arrays

2021-02-22 Thread Boris Ostrovsky
On 2/19/21 3:32 PM, Konrad Rzeszutek Wilk wrote: > On Sun, Feb 07, 2021 at 04:56:01PM +0100, Christoph Hellwig wrote: >> On Thu, Feb 04, 2021 at 09:40:23AM +0100, Christoph Hellwig wrote: >>> So one thing that has been on my mind for a while: I'd really like >>> to kill the separate dma ops in

[Intel-gfx] [PATCH] drivers: gnu: drm: i915: gvt: Fixed couple of spellings in the file gtt.c

2021-02-22 Thread Bhaskar Chowdhury
s/negtive/negative/ s/possilbe/possible/ Signed-off-by: Bhaskar Chowdhury --- drivers/gpu/drm/i915/gvt/gtt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c index 897c007ea96a..dc5834bf4de2 100644 ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Do not allow DC3CO if PSR SF is enabled

2021-02-22 Thread Patchwork
== Series Details == Series: drm/i915/display: Do not allow DC3CO if PSR SF is enabled URL : https://patchwork.freedesktop.org/series/87283/ State : success == Summary == CI Bug Log - changes from CI_DRM_9793 -> Patchwork_19714 Summary

Re: [Intel-gfx] i915 dma faults on Xen

2021-02-22 Thread Jason Andryuk
On Mon, Feb 22, 2021 at 5:18 AM Roger Pau Monné wrote: > > On Fri, Feb 19, 2021 at 12:30:23PM -0500, Jason Andryuk wrote: > > On Wed, Oct 21, 2020 at 9:59 AM Jan Beulich wrote: > > > > > > On 21.10.2020 15:36, Jason Andryuk wrote: > > > > On Wed, Oct 21, 2020 at 8:53 AM Jan Beulich wrote: > > >

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display: Do not allow DC3CO if PSR SF is enabled

2021-02-22 Thread Patchwork
== Series Details == Series: drm/i915/display: Do not allow DC3CO if PSR SF is enabled URL : https://patchwork.freedesktop.org/series/87283/ State : warning == Summary == $ dim checkpatch origin/drm-tip 64ad41f78f8f drm/i915/display: Do not allow DC3CO if PSR SF is enabled -:12:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/compat: Clear bounce structures

2021-02-22 Thread Patchwork
== Series Details == Series: drm/compat: Clear bounce structures URL : https://patchwork.freedesktop.org/series/87281/ State : success == Summary == CI Bug Log - changes from CI_DRM_9793 -> Patchwork_19713 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/compat: Clear bounce structures

2021-02-22 Thread Patchwork
== Series Details == Series: drm/compat: Clear bounce structures URL : https://patchwork.freedesktop.org/series/87281/ State : warning == Summary == $ dim checkpatch origin/drm-tip 3f5e3da95ed8 drm/compat: Clear bounce structures -:69: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/compat: more dummy implementations

2021-02-22 Thread Patchwork
== Series Details == Series: drm/compat: more dummy implementations URL : https://patchwork.freedesktop.org/series/87280/ State : success == Summary == CI Bug Log - changes from CI_DRM_9793 -> Patchwork_19712 Summary --- **SUCCESS**

Re: [Intel-gfx] [RFC PATCH 2/9] drm/i915/spi: intel_spi_region map

2021-02-22 Thread Winkler, Tomas
> On Wed, 17 Feb 2021, "Winkler, Tomas" wrote: > >> On Tue, 16 Feb 2021, Tomas Winkler wrote: > >> > Add the dGFX spi region map and convey it via mfd cell platform > >> > data to the spi child device. > >> > > >> > Cc: Rodrigo Vivi > >> > Cc: Lucas De Marchi > >> > Signed-off-by: Tomas

[Intel-gfx] [PATCH] drm/i915/display: Do not allow DC3CO if PSR SF is enabled

2021-02-22 Thread Gwan-gyeong Mun
Even though GEN12+ HW supports PSR + DC3CO, DMC's HW DC3CO exitmachanism has an issue with using of SelectiveFecth and PSR2 ManualTracking. And as new GEN12+ platform like RKL, ADL-S/P don't have PSR2 HW tracking, Selective Fetch wiil be enabled by default. Therefore if the system enables PSR

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/compat: more dummy implementations

2021-02-22 Thread Patchwork
== Series Details == Series: drm/compat: more dummy implementations URL : https://patchwork.freedesktop.org/series/87280/ State : warning == Summary == $ dim checkpatch origin/drm-tip 49f0011150a1 drm/compat: more dummy implementations -:6: WARNING:TYPO_SPELLING: 'doesnt' may be misspelled -

Re: [Intel-gfx] [PATCH v2] drm/i915/display: Allow PSR2 selective fetch to be enabled at run-time

2021-02-22 Thread Mun, Gwan-gyeong
On Tue, 2021-02-09 at 12:50 -0800, José Roberto de Souza wrote: > Right now CI is blacklisting module reload, so we need to be able to > enable PSR2 selective fetch in run time to test this feature before > enable it by default. > Changes in IGT will also be needed. > > v2: > - Fixed handling of

Re: [Intel-gfx] [RFC PATCH 2/9] drm/i915/spi: intel_spi_region map

2021-02-22 Thread Jani Nikula
On Wed, 17 Feb 2021, "Winkler, Tomas" wrote: >> On Tue, 16 Feb 2021, Tomas Winkler wrote: >> > Add the dGFX spi region map and convey it via mfd cell platform data >> > to the spi child device. >> > >> > Cc: Rodrigo Vivi >> > Cc: Lucas De Marchi >> > Signed-off-by: Tomas Winkler >> > --- >> >

[Intel-gfx] [PATCH] drm/compat: Clear bounce structures

2021-02-22 Thread Daniel Vetter
Some of them have gaps, or fields we don't clear. Native ioctl code does full copies plus zero-extends on size mismatch, so nothing can leak. But compat is more hand-rolled so need to be careful. None of these matter for performance, so just memset. Also I didn't fix up the CONFIG_DRM_LEGACY or

[Intel-gfx] [PATCH] drm/compat: more dummy implementations

2021-02-22 Thread Daniel Vetter
drm_noop really doesnt do much, and who cares about the permission checks. So let's delete some code. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/drm_ioc32.c | 15 +++ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/drm_ioc32.c

Re: [Intel-gfx] [PATCH v3 9/9] drm/i915/edp: enable eDP MSO during link training

2021-02-22 Thread Shankar, Uma
> -Original Message- > From: Intel-gfx On Behalf Of Jani > Nikula > Sent: Thursday, February 11, 2021 8:22 PM > To: intel-gfx@lists.freedesktop.org > Cc: Nikula, Jani ; Varide, Nischal > > Subject: [Intel-gfx] [PATCH v3 9/9] drm/i915/edp: enable eDP MSO during link > training > >

Re: [Intel-gfx] [PATCH 4/4] drm/i915/display: Set source_support even if panel do not support PSR

2021-02-22 Thread Mun, Gwan-gyeong
On Tue, 2021-02-09 at 10:14 -0800, José Roberto de Souza wrote: > This will set the right value of source_support when the port > encoder/port supports PSR but sink don't. > > This change will also be needed in future for panel replay as psr > struct needs to be initialized even if disconnected

Re: [Intel-gfx] [PATCH 3/4] drm/i915/display: Remove some redundancy around CAN_PSR()

2021-02-22 Thread Mun, Gwan-gyeong
On Tue, 2021-02-09 at 10:14 -0800, José Roberto de Souza wrote: > If source_support is set the platform supports PSR so no need to > check > it again at every CAN_PSR(). > > Also removing the intel_dp_is_edp() calls, if sink_support is set > the sink connected is for sure a eDP panel. > > Cc:

Re: [Intel-gfx] [PATCH v3 8/9] drm/i915/edp: modify fixed and downclock modes for MSO

2021-02-22 Thread Shankar, Uma
> -Original Message- > From: Intel-gfx On Behalf Of Jani > Nikula > Sent: Thursday, February 11, 2021 8:22 PM > To: intel-gfx@lists.freedesktop.org > Cc: Nikula, Jani ; Varide, Nischal > > Subject: [Intel-gfx] [PATCH v3 8/9] drm/i915/edp: modify fixed and downclock > modes for MSO >

Re: [Intel-gfx] [PATCH v3 7/9] drm/i915/mso: add splitter state check

2021-02-22 Thread Shankar, Uma
> -Original Message- > From: Intel-gfx On Behalf Of Jani > Nikula > Sent: Thursday, February 11, 2021 8:22 PM > To: intel-gfx@lists.freedesktop.org > Cc: Nikula, Jani ; Varide, Nischal > > Subject: [Intel-gfx] [PATCH v3 7/9] drm/i915/mso: add splitter state check > > For starters,

Re: [Intel-gfx] [PATCH v3 6/9] drm/i915/mso: add splitter state readout for platforms that support it

2021-02-22 Thread Shankar, Uma
> -Original Message- > From: Intel-gfx On Behalf Of Jani > Nikula > Sent: Thursday, February 11, 2021 8:22 PM > To: intel-gfx@lists.freedesktop.org > Cc: Nikula, Jani ; Varide, Nischal > > Subject: [Intel-gfx] [PATCH v3 6/9] drm/i915/mso: add splitter state readout > for >

[Intel-gfx] [PULL] gvt-next-fixes

2021-02-22 Thread Zhenyu Wang
Hi, Looks last gvt pull missed -gt-next window before CNY holiday. So here're left three changes for fixing ww locking, cmd parser fix for i915 state use and one left cleanup fix. Thanks! -- The following changes since commit 81ce8f04aa96f7f6cae05770f68b5d15be91f5a2: drm/i915/gt: Correct

Re: [Intel-gfx] linux-next: build warning after merge of the pm tree

2021-02-22 Thread Stephen Rothwell
Hi all, On Mon, 15 Feb 2021 11:39:39 +1100 Stephen Rothwell wrote: > > Hi all, > > After merging the pm tree, today's linux-next build (x86_64 allmodconfig) > produced this warning: > > In file included from drivers/gpu/drm/gma500/mdfld_output.c:28: >